2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Register param constraints and some other register handling tools.
23 * @author Christian Wuerdig
35 #include "ia32_map_regs.h"
36 #include "ia32_new_nodes.h"
37 #include "ia32_architecture.h"
38 #include "gen_ia32_regalloc_if.h"
39 #include "bearch_ia32_t.h"
40 #include "../benodesets.h"
42 #define MAXNUM_GPREG_ARGS 3
43 #define MAXNUM_SSE_ARGS 5
45 /* this is the order of the assigned registers usesd for parameter passing */
47 const arch_register_t *gpreg_param_reg_std[] = {
48 &ia32_gp_regs[REG_EAX],
49 &ia32_gp_regs[REG_EDX],
50 &ia32_gp_regs[REG_ECX],
51 &ia32_gp_regs[REG_EBX],
52 &ia32_gp_regs[REG_EDI],
53 &ia32_gp_regs[REG_ESI]
56 const arch_register_t *gpreg_param_reg_this[] = {
57 &ia32_gp_regs[REG_ECX],
58 &ia32_gp_regs[REG_EAX],
59 &ia32_gp_regs[REG_EDX],
60 &ia32_gp_regs[REG_EBX],
61 &ia32_gp_regs[REG_EDI],
62 &ia32_gp_regs[REG_ESI]
65 const arch_register_t *fpreg_sse_param_reg_std[] = {
66 &ia32_xmm_regs[REG_XMM0],
67 &ia32_xmm_regs[REG_XMM1],
68 &ia32_xmm_regs[REG_XMM2],
69 &ia32_xmm_regs[REG_XMM3],
70 &ia32_xmm_regs[REG_XMM4],
71 &ia32_xmm_regs[REG_XMM5],
72 &ia32_xmm_regs[REG_XMM6],
73 &ia32_xmm_regs[REG_XMM7]
76 const arch_register_t *fpreg_sse_param_reg_this[] = {
77 NULL, /* in case of a "this" pointer, the first parameter must not be a float */
78 &ia32_xmm_regs[REG_XMM0],
79 &ia32_xmm_regs[REG_XMM1],
80 &ia32_xmm_regs[REG_XMM2],
81 &ia32_xmm_regs[REG_XMM3],
82 &ia32_xmm_regs[REG_XMM4],
83 &ia32_xmm_regs[REG_XMM5],
84 &ia32_xmm_regs[REG_XMM6],
85 &ia32_xmm_regs[REG_XMM7]
90 /* Mapping to store registers in firm nodes */
92 struct ia32_irn_reg_assoc {
94 const arch_register_t *reg;
97 int ia32_cmp_irn_reg_assoc(const void *a, const void *b, size_t len) {
98 const struct ia32_irn_reg_assoc *x = a;
99 const struct ia32_irn_reg_assoc *y = b;
102 return x->irn != y->irn;
105 static struct ia32_irn_reg_assoc *get_irn_reg_assoc(const ir_node *irn, set *reg_set) {
106 struct ia32_irn_reg_assoc templ;
111 hash = nodeset_hash(irn);
113 return set_insert(reg_set, &templ, sizeof(templ), hash);
116 void ia32_set_firm_reg(ir_node *irn, const arch_register_t *reg, set *reg_set) {
117 struct ia32_irn_reg_assoc *assoc = get_irn_reg_assoc(irn, reg_set);
121 const arch_register_t *ia32_get_firm_reg(const ir_node *irn, set *reg_set) {
122 struct ia32_irn_reg_assoc *assoc = get_irn_reg_assoc(irn, reg_set);
126 void ia32_build_16bit_reg_map(pmap *reg_map) {
127 pmap_insert(reg_map, &ia32_gp_regs[REG_EAX], "ax");
128 pmap_insert(reg_map, &ia32_gp_regs[REG_EBX], "bx");
129 pmap_insert(reg_map, &ia32_gp_regs[REG_ECX], "cx");
130 pmap_insert(reg_map, &ia32_gp_regs[REG_EDX], "dx");
131 pmap_insert(reg_map, &ia32_gp_regs[REG_ESI], "si");
132 pmap_insert(reg_map, &ia32_gp_regs[REG_EDI], "di");
133 pmap_insert(reg_map, &ia32_gp_regs[REG_EBP], "bp");
134 pmap_insert(reg_map, &ia32_gp_regs[REG_ESP], "sp");
137 void ia32_build_8bit_reg_map(pmap *reg_map) {
138 pmap_insert(reg_map, &ia32_gp_regs[REG_EAX], "al");
139 pmap_insert(reg_map, &ia32_gp_regs[REG_EBX], "bl");
140 pmap_insert(reg_map, &ia32_gp_regs[REG_ECX], "cl");
141 pmap_insert(reg_map, &ia32_gp_regs[REG_EDX], "dl");
144 void ia32_build_8bit_reg_map_high(pmap *reg_map) {
145 pmap_insert(reg_map, &ia32_gp_regs[REG_EAX], "ah");
146 pmap_insert(reg_map, &ia32_gp_regs[REG_EBX], "bh");
147 pmap_insert(reg_map, &ia32_gp_regs[REG_ECX], "ch");
148 pmap_insert(reg_map, &ia32_gp_regs[REG_EDX], "dh");
151 const char *ia32_get_mapped_reg_name(pmap *reg_map, const arch_register_t *reg) {
152 pmap_entry *e = pmap_find(reg_map, (void *)reg);
154 //assert(e && "missing map init?");
156 printf("FIXME: ia32map_regs.c:122: returning fake register name for ia32 with 32 register\n");
164 * Returns the register for parameter nr.
166 const arch_register_t *ia32_get_RegParam_reg(unsigned cc, size_t nr,
169 if(! (cc & cc_reg_param))
172 if(mode_is_float(mode)) {
173 if(!ia32_cg_config.use_sse2)
175 if(nr >= MAXNUM_SSE_ARGS)
178 if(cc & cc_this_call) {
179 return fpreg_sse_param_reg_this[nr];
181 return fpreg_sse_param_reg_std[nr];
182 } else if(mode_is_int(mode) || mode_is_reference(mode)) {
183 if(get_mode_size_bits(mode) > 32)
186 if(nr >= MAXNUM_GPREG_ARGS)
189 if(cc & cc_this_call) {
190 return gpreg_param_reg_this[nr];
192 return gpreg_param_reg_std[nr];
195 panic("unknown argument mode");