2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handles fpu rounding modes
23 * @author Matthias Braun
26 * The problem we deal with here is that the x86 ABI says the user can control
27 * the fpu rounding mode, which means that when we do some operations like float
28 * to int conversion which are specified as truncation in the C standard we have
29 * to spill, change and restore the fpu rounding mode between spills.
36 #include "ia32_new_nodes.h"
37 #include "gen_ia32_regalloc_if.h"
44 #include "../beirgmod.h"
45 #include "../bearch_t.h"
46 #include "../besched.h"
48 #include "../benode_t.h"
49 #include "../bestate.h"
50 #include "../beutil.h"
51 #include "../bessaconstr.h"
52 #include "../beirg_t.h"
54 static ir_entity *fpcw_round = NULL;
55 static ir_entity *fpcw_truncate = NULL;
57 static ir_entity *create_ent(int value, const char *name)
59 ir_mode *mode = mode_Hu;
60 ir_type *type = new_type_primitive(new_id_from_str("_fpcw_type"), mode);
61 ir_type *glob = get_glob_type();
67 set_type_alignment_bytes(type, 4);
69 tv = new_tarval_from_long(value, mode);
70 ent = new_entity(glob, new_id_from_str(name), type);
71 set_entity_ld_ident(ent, get_entity_ident(ent));
72 set_entity_visibility(ent, visibility_local);
73 set_entity_variability(ent, variability_constant);
74 set_entity_allocation(ent, allocation_static);
76 cnst_irg = get_const_code_irg();
77 cnst = new_r_Const(cnst_irg, get_irg_start_block(cnst_irg), mode, tv);
78 set_atomic_ent_value(ent, cnst);
83 static void create_fpcw_entities(void)
85 fpcw_round = create_ent(0xc7f, "_fpcw_round");
86 fpcw_truncate = create_ent(0x37f, "_fpcw_truncate");
89 static ir_node *create_fpu_mode_spill(void *env, ir_node *state, int force,
92 ia32_code_gen_t *cg = env;
93 ir_node *spill = NULL;
95 /* we don't spill the fpcw in unsafe mode */
96 if(cg->opt & IA32_OPT_UNSAFE_FLOATCONV) {
97 ir_graph *irg = get_irn_irg(state);
98 ir_node *block = get_nodes_block(state);
99 if(force == 1 || !is_ia32_ChangeCW(state)) {
100 ir_node *spill = new_rd_ia32_FnstCWNOP(NULL, irg, block, state);
101 sched_add_after(after, spill);
107 if(force == 1 || !is_ia32_ChangeCW(state)) {
108 ir_graph *irg = get_irn_irg(state);
109 ir_node *block = get_nodes_block(state);
110 ir_node *noreg = ia32_new_NoReg_gp(cg);
111 ir_node *nomem = new_NoMem();
112 ir_node *frame = get_irg_frame(irg);
114 spill = new_rd_ia32_FnstCW(NULL, irg, block, frame, noreg, nomem, state);
115 set_ia32_op_type(spill, ia32_AddrModeD);
116 /* use mode_Iu, as movl has a shorter opcode than movw */
117 set_ia32_ls_mode(spill, mode_Iu);
118 set_ia32_use_frame(spill);
120 sched_add_after(after, spill);
126 static ir_node *create_fldcw_ent(ia32_code_gen_t *cg, ir_node *block,
129 ir_graph *irg = get_irn_irg(block);
130 ir_node *nomem = new_NoMem();
131 ir_node *noreg = ia32_new_NoReg_gp(cg);
134 reload = new_rd_ia32_FldCW(NULL, irg, block, noreg, noreg, nomem);
135 set_ia32_op_type(reload, ia32_AddrModeS);
136 set_ia32_ls_mode(reload, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
137 set_ia32_am_sc(reload, entity);
138 set_ia32_use_frame(reload);
139 arch_set_irn_register(cg->arch_env, reload, &ia32_fp_cw_regs[REG_FPCW]);
144 static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
145 ir_node *spill, ir_node *before,
148 ia32_code_gen_t *cg = env;
149 ir_graph *irg = get_irn_irg(state);
150 ir_node *block = get_nodes_block(before);
151 ir_node *frame = get_irg_frame(irg);
152 ir_node *noreg = ia32_new_NoReg_gp(cg);
153 ir_node *reload = NULL;
155 if(cg->opt & IA32_OPT_UNSAFE_FLOATCONV) {
156 if(fpcw_round == NULL) {
157 create_fpcw_entities();
160 reload = create_fldcw_ent(cg, block, fpcw_round);
162 reload = create_fldcw_ent(cg, block, fpcw_truncate);
164 sched_add_before(before, reload);
169 reload = new_rd_ia32_FldCW(NULL, irg, block, frame, noreg, spill);
170 set_ia32_op_type(reload, ia32_AddrModeS);
171 set_ia32_ls_mode(reload, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
172 set_ia32_use_frame(reload);
173 arch_set_irn_register(cg->arch_env, reload, &ia32_fp_cw_regs[REG_FPCW]);
175 sched_add_before(before, reload);
177 ir_mode *lsmode = ia32_reg_classes[CLASS_ia32_fp_cw].mode;
178 ir_node *nomem = new_NoMem();
179 ir_node *cwstore, *load, *load_res, *or, *store, *fldcw;
182 assert(last_state != NULL);
183 cwstore = new_rd_ia32_FnstCW(NULL, irg, block, frame, noreg, nomem,
185 set_ia32_op_type(cwstore, ia32_AddrModeD);
186 set_ia32_ls_mode(cwstore, lsmode);
187 set_ia32_use_frame(cwstore);
188 sched_add_before(before, cwstore);
190 load = new_rd_ia32_Load(NULL, irg, block, frame, noreg, cwstore);
191 set_ia32_op_type(load, ia32_AddrModeS);
192 set_ia32_ls_mode(load, lsmode);
193 set_ia32_use_frame(load);
194 sched_add_before(before, load);
196 load_res = new_r_Proj(irg, block, load, mode_Iu, pn_ia32_Load_res);
198 /* TODO: make the actual mode configurable in ChangeCW... */
199 or_const = new_rd_ia32_Immediate(NULL, irg, get_irg_start_block(irg),
201 arch_set_irn_register(cg->arch_env, or_const,
202 &ia32_gp_regs[REG_GP_NOREG]);
203 or = new_rd_ia32_Or(NULL, irg, block, noreg, noreg, nomem, load_res,
205 sched_add_before(before, or);
207 store = new_rd_ia32_Store(NULL, irg, block, frame, noreg, nomem, or);
208 set_ia32_op_type(store, ia32_AddrModeD);
209 /* use mode_Iu, as movl has a shorter opcode than movw */
210 set_ia32_ls_mode(store, mode_Iu);
211 set_ia32_use_frame(store);
212 sched_add_before(before, store);
214 fldcw = new_rd_ia32_FldCW(NULL, irg, block, frame, noreg, store);
215 set_ia32_op_type(fldcw, ia32_AddrModeS);
216 set_ia32_ls_mode(fldcw, lsmode);
217 set_ia32_use_frame(fldcw);
218 arch_set_irn_register(cg->arch_env, fldcw, &ia32_fp_cw_regs[REG_FPCW]);
219 sched_add_before(before, fldcw);
227 typedef struct collect_fpu_mode_nodes_env_t {
228 const arch_env_t *arch_env;
229 ir_node **state_nodes;
230 } collect_fpu_mode_nodes_env_t;
232 static void collect_fpu_mode_nodes_walker(ir_node *node, void *data)
234 collect_fpu_mode_nodes_env_t *env = data;
235 const arch_register_t *reg;
237 if(!mode_is_data(get_irn_mode(node)))
240 reg = arch_get_irn_register(env->arch_env, node);
241 if(reg == &ia32_fp_cw_regs[REG_FPCW] && !is_ia32_ChangeCW(node)) {
242 ARR_APP1(ir_node*, env->state_nodes, node);
247 void rewire_fpu_mode_nodes(be_irg_t *birg)
249 collect_fpu_mode_nodes_env_t env;
250 be_ssa_construction_env_t senv;
251 const arch_register_t *reg = &ia32_fp_cw_regs[REG_FPCW];
252 ir_graph *irg = be_get_birg_irg(birg);
253 ir_node *initial_value;
255 be_lv_t *lv = be_get_birg_liveness(birg);
258 /* do ssa construction for the fpu modes */
259 env.arch_env = be_get_birg_arch_env(birg);
260 env.state_nodes = NEW_ARR_F(ir_node*, 0);
261 irg_walk_graph(irg, collect_fpu_mode_nodes_walker, NULL, &env);
263 initial_value = be_abi_get_ignore_irn(birg->abi, reg);
265 /* nothing needs to be done, in fact we must not continue as for endless
266 * loops noone is using the initial_value and it will point to a bad node
269 if(ARR_LEN(env.state_nodes) == 0) {
270 DEL_ARR_F(env.state_nodes);
274 be_ssa_construction_init(&senv, birg);
275 be_ssa_construction_add_copies(&senv, env.state_nodes,
276 ARR_LEN(env.state_nodes));
277 be_ssa_construction_fix_users(&senv, initial_value);
280 be_ssa_construction_update_liveness_phis(&senv, lv);
281 be_liveness_update(lv, initial_value);
282 len = ARR_LEN(env.state_nodes);
283 for(i = 0; i < len; ++i) {
284 be_liveness_update(lv, env.state_nodes[i]);
287 be_liveness_invalidate(birg->lv);
290 /* set registers for the phis */
291 phis = be_ssa_construction_get_new_phis(&senv);
293 for(i = 0; i < len; ++i) {
294 ir_node *phi = phis[i];
295 be_set_phi_flags(env.arch_env, phi, arch_irn_flags_ignore);
296 arch_set_irn_register(env.arch_env, phi, reg);
298 be_ssa_construction_destroy(&senv);
299 DEL_ARR_F(env.state_nodes);
301 be_liveness_invalidate(be_get_birg_liveness(birg));
304 void ia32_setup_fpu_mode(ia32_code_gen_t *cg)
306 /* do ssa construction for the fpu modes */
307 rewire_fpu_mode_nodes(cg->birg);
309 /* ensure correct fpu mode for operations */
310 be_assure_state(cg->birg, &ia32_fp_cw_regs[REG_FPCW],
311 cg, create_fpu_mode_spill, create_fpu_mode_reload);