2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handles fpu rounding modes
23 * @author Matthias Braun
26 * The problem we deal with here is that the x86 ABI says the user can control
27 * the fpu rounding mode, which means that when we do some operations like float
28 * to int conversion which are specified as truncation in the C standard we have
29 * to spill, change and restore the fpu rounding mode between spills.
36 #include "ia32_new_nodes.h"
37 #include "gen_ia32_regalloc_if.h"
44 #include "../beirgmod.h"
45 #include "../bearch_t.h"
46 #include "../besched.h"
48 #include "../benode_t.h"
49 #include "../bestate.h"
50 #include "../beutil.h"
51 #include "../bessaconstr.h"
52 #include "../beirg_t.h"
54 static ir_node *create_fpu_mode_spill(void *env, ir_node *state, int force,
57 ia32_code_gen_t *cg = env;
58 ir_node *spill = NULL;
60 if(force == 1 || !is_ia32_ChangeCW(state)) {
61 ir_graph *irg = get_irn_irg(state);
62 ir_node *block = get_nodes_block(state);
63 ir_node *noreg = ia32_new_NoReg_gp(cg);
64 ir_node *nomem = new_NoMem();
65 ir_node *frame = get_irg_frame(irg);
67 spill = new_rd_ia32_FnstCW(NULL, irg, block, frame, noreg, nomem, state);
68 set_ia32_op_type(spill, ia32_AddrModeD);
69 set_ia32_ls_mode(spill, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
70 set_ia32_use_frame(spill);
72 sched_add_after(after, spill);
78 static ir_node *create_fpu_mode_reload(void *env, ir_node *state,
79 ir_node *spill, ir_node *before,
82 ia32_code_gen_t *cg = env;
83 ir_graph *irg = get_irn_irg(state);
84 ir_node *block = get_nodes_block(before);
85 ir_node *frame = get_irg_frame(irg);
86 ir_node *noreg = ia32_new_NoReg_gp(cg);
87 ir_node *reload = NULL;
90 reload = new_rd_ia32_FldCW(NULL, irg, block, frame, noreg, spill);
91 set_ia32_op_type(reload, ia32_AddrModeS);
92 set_ia32_ls_mode(reload, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
93 set_ia32_use_frame(reload);
94 arch_set_irn_register(cg->arch_env, reload, &ia32_fp_cw_regs[REG_FPCW]);
96 sched_add_before(before, reload);
98 ir_mode *lsmode = ia32_reg_classes[CLASS_ia32_fp_cw].mode;
99 ir_node *nomem = new_NoMem();
100 ir_node *cwstore, *load, *load_res, *or, *store, *fldcw;
103 assert(last_state != NULL);
104 cwstore = new_rd_ia32_FnstCW(NULL, irg, block, frame, noreg, nomem,
106 set_ia32_op_type(cwstore, ia32_AddrModeD);
107 set_ia32_ls_mode(cwstore, lsmode);
108 set_ia32_use_frame(cwstore);
109 sched_add_before(before, cwstore);
111 load = new_rd_ia32_Load(NULL, irg, block, frame, noreg, cwstore);
112 set_ia32_op_type(load, ia32_AddrModeS);
113 set_ia32_ls_mode(load, lsmode);
114 set_ia32_use_frame(load);
115 sched_add_before(before, load);
117 load_res = new_r_Proj(irg, block, load, mode_Iu, pn_ia32_Load_res);
119 /* TODO: make the actual mode configurable in ChangeCW... */
120 or_const = new_rd_ia32_Immediate(NULL, irg, get_irg_start_block(irg),
122 arch_set_irn_register(cg->arch_env, or_const,
123 &ia32_gp_regs[REG_GP_NOREG]);
124 or = new_rd_ia32_Or(NULL, irg, block, noreg, noreg, nomem, load_res,
126 sched_add_before(before, or);
128 store = new_rd_ia32_Store(NULL, irg, block, frame, noreg, nomem, or);
129 set_ia32_op_type(store, ia32_AddrModeD);
130 set_ia32_ls_mode(store, lsmode);
131 set_ia32_use_frame(store);
132 sched_add_before(before, store);
134 fldcw = new_rd_ia32_FldCW(NULL, irg, block, frame, noreg, store);
135 set_ia32_op_type(fldcw, ia32_AddrModeS);
136 set_ia32_ls_mode(fldcw, lsmode);
137 set_ia32_use_frame(fldcw);
138 arch_set_irn_register(cg->arch_env, fldcw, &ia32_fp_cw_regs[REG_FPCW]);
139 sched_add_before(before, fldcw);
147 typedef struct collect_fpu_mode_nodes_env_t {
148 const arch_env_t *arch_env;
149 ir_node **state_nodes;
150 } collect_fpu_mode_nodes_env_t;
153 void collect_fpu_mode_nodes_walker(ir_node *node, void *data)
155 collect_fpu_mode_nodes_env_t *env = data;
157 const arch_register_t *reg = arch_get_irn_register(env->arch_env, node);
158 if(reg == &ia32_fp_cw_regs[REG_FPCW] && !is_ia32_ChangeCW(node)) {
159 ARR_APP1(ir_node*, env->state_nodes, node);
164 void rewire_fpu_mode_nodes(be_irg_t *birg)
166 collect_fpu_mode_nodes_env_t env;
167 be_ssa_construction_env_t senv;
168 const arch_register_t *reg = &ia32_fp_cw_regs[REG_FPCW];
169 ir_graph *irg = be_get_birg_irg(birg);
170 ir_node *initial_value;
172 be_lv_t *lv = be_get_birg_liveness(birg);
175 /* do ssa construction for the fpu modes */
176 env.arch_env = be_get_birg_arch_env(birg);
177 env.state_nodes = NEW_ARR_F(ir_node*, 0);
178 irg_walk_graph(irg, collect_fpu_mode_nodes_walker, NULL, &env);
180 initial_value = be_abi_get_ignore_irn(birg->abi, reg);
182 /* nothing needs to be done, in fact we must not continue as for endless
183 * loops noone is using the initial_value and it will point to a bad node
186 if(ARR_LEN(env.state_nodes) == 0) {
187 DEL_ARR_F(env.state_nodes);
191 be_ssa_construction_init(&senv, birg);
192 be_ssa_construction_add_copies(&senv, env.state_nodes,
193 ARR_LEN(env.state_nodes));
194 be_ssa_construction_fix_users(&senv, initial_value);
197 be_ssa_construction_update_liveness_phis(&senv, lv);
198 be_liveness_update(lv, initial_value);
199 len = ARR_LEN(env.state_nodes);
200 for(i = 0; i < len; ++i) {
201 be_liveness_update(lv, env.state_nodes[i]);
204 be_liveness_invalidate(birg->lv);
207 /* set registers for the phis */
208 phis = be_ssa_construction_get_new_phis(&senv);
210 for(i = 0; i < len; ++i) {
211 ir_node *phi = phis[i];
212 be_set_phi_flags(env.arch_env, phi, arch_irn_flags_ignore);
213 arch_set_irn_register(env.arch_env, phi, reg);
215 be_ssa_construction_destroy(&senv);
216 DEL_ARR_F(env.state_nodes);
218 be_liveness_invalidate(be_get_birg_liveness(birg));
221 void ia32_setup_fpu_mode(ia32_code_gen_t *cg)
223 /* do ssa construction for the fpu modes */
224 rewire_fpu_mode_nodes(cg->birg);
226 /* ensure correct fpu mode for operations */
227 be_assure_state(cg->birg, &ia32_fp_cw_regs[REG_FPCW],
228 cg, create_fpu_mode_spill, create_fpu_mode_reload);