2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 /* in case of a joker register: just return a valid register */
90 if (arch_register_type_is(reg, joker)) {
91 const arch_register_req_t *req;
93 /* ask for the requirements */
94 req = arch_get_register_req(arch_env, irn, pos);
96 if (arch_register_req_is(req, limited)) {
97 /* in case of limited requirements: get the first allowed register */
98 unsigned idx = rbitset_next(req->limited, 0, 1);
99 reg = arch_register_for_index(req->cls, idx);
101 /* otherwise get first register in class */
102 reg = arch_register_for_index(req->cls, 0);
110 * Returns the register at out position pos.
113 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
116 const arch_env_t *arch_env = env->arch_env;
118 const arch_register_t *reg = NULL;
120 /* 1st case: irn is not of mode_T, so it has only */
121 /* one OUT register -> good */
122 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
123 /* Proj with the corresponding projnum for the register */
125 if (get_irn_mode(irn) != mode_T) {
126 reg = arch_get_irn_register(arch_env, irn);
127 } else if (is_ia32_irn(irn)) {
128 reg = get_ia32_out_reg(irn, pos);
130 const ir_edge_t *edge;
132 foreach_out_edge(irn, edge) {
133 proj = get_edge_src_irn(edge);
134 assert(is_Proj(proj) && "non-Proj from mode_T node");
135 if (get_Proj_proj(proj) == pos) {
136 reg = arch_get_irn_register(arch_env, proj);
142 assert(reg && "no out register found");
147 * Determine the gnu assembler suffix that indicates a mode
150 char get_mode_suffix(const ir_mode *mode) {
151 if(mode_is_float(mode)) {
152 switch(get_mode_size_bits(mode)) {
161 assert(mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode));
162 switch(get_mode_size_bits(mode)) {
173 panic("Can't output mode_suffix for %+F\n", mode);
177 int produces_result(const ir_node *node) {
178 return !(is_ia32_St(node) ||
179 is_ia32_Store8Bit(node) ||
180 is_ia32_CondJmp(node) ||
181 is_ia32_xCondJmp(node) ||
182 is_ia32_CmpSet(node) ||
183 is_ia32_xCmpSet(node) ||
184 is_ia32_SwitchJmp(node));
188 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
189 const arch_register_t *reg) {
190 switch(get_mode_size_bits(mode)) {
192 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
194 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
196 return (char *)arch_register_get_name(reg);
201 * Add a number to a prefix. This number will not be used a second time.
204 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
205 static unsigned long id = 0;
206 snprintf(buf, buflen, "%s%lu", prefix, ++id);
210 /*************************************************************
212 * (_) | | / _| | | | |
213 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
214 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
215 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
216 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
219 *************************************************************/
221 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
222 // be_emit_env_t* so we cheat a bit...
223 #define be_emit_char(env,c) be_emit_char(env->emit,c)
224 #define be_emit_string(env,s) be_emit_string(env->emit,s)
225 #undef be_emit_cstring
226 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
227 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
228 #define be_emit_write_line(env) be_emit_write_line(env->emit)
229 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
230 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
232 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
234 const arch_register_t *reg = get_in_reg(env, node, pos);
235 const char *reg_name = arch_register_get_name(reg);
237 assert(pos < get_irn_arity(node));
239 be_emit_char(env, '%');
240 be_emit_string(env, reg_name);
243 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
244 const arch_register_t *reg = get_out_reg(env, node, pos);
245 const char *reg_name = arch_register_get_name(reg);
247 be_emit_char(env, '%');
248 be_emit_string(env, reg_name);
251 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
253 ia32_attr_t *attr = get_ia32_attr(node);
256 be_emit_char(env, '%');
257 be_emit_string(env, attr->x87[pos]->name);
260 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
266 be_emit_char(env, '$');
268 switch(get_ia32_immop_type(node)) {
270 tv = get_ia32_Immop_tarval(node);
271 be_emit_tarval(env->emit, tv);
273 case ia32_ImmSymConst:
274 ent = get_ia32_Immop_symconst(node);
275 mark_entity_visited(ent);
276 id = get_entity_ld_ident(ent);
277 be_emit_ident(env, id);
284 be_emit_string(env, "BAD");
288 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode)
290 be_emit_char(env, get_mode_suffix(mode));
293 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
295 ir_mode *mode = get_ia32_ls_mode(node);
297 ia32_emit_mode_suffix(env, mode);
301 char get_xmm_mode_suffix(ir_mode *mode)
303 assert(mode_is_float(mode));
304 switch(get_mode_size_bits(mode)) {
315 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
317 ir_mode *mode = get_ia32_ls_mode(node);
318 assert(mode != NULL);
319 be_emit_char(env, 's');
320 be_emit_char(env, get_xmm_mode_suffix(mode));
323 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
325 ir_mode *mode = get_ia32_ls_mode(node);
326 assert(mode != NULL);
327 be_emit_char(env, get_xmm_mode_suffix(mode));
330 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
332 if(get_mode_size_bits(mode) == 32)
334 if(mode_is_signed(mode)) {
335 be_emit_char(env, 's');
337 be_emit_char(env, 'z');
342 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
344 switch (be_gas_flavour) {
345 case GAS_FLAVOUR_NORMAL:
346 be_emit_cstring(env, "\t.type\t");
347 be_emit_string(env, name);
348 be_emit_cstring(env, ", @function\n");
349 be_emit_write_line(env);
351 case GAS_FLAVOUR_MINGW:
352 be_emit_cstring(env, "\t.def\t");
353 be_emit_string(env, name);
354 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
355 be_emit_write_line(env);
363 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
365 switch (be_gas_flavour) {
366 case GAS_FLAVOUR_NORMAL:
367 be_emit_cstring(env, "\t.size\t");
368 be_emit_string(env, name);
369 be_emit_cstring(env, ", .-");
370 be_emit_string(env, name);
371 be_emit_char(env, '\n');
372 be_emit_write_line(env);
382 * Emits registers and/or address mode of a binary operation.
384 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
385 switch(get_ia32_op_type(node)) {
387 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
388 ia32_emit_immediate(env, node);
389 be_emit_cstring(env, ", ");
390 ia32_emit_source_register(env, node, 2);
392 const arch_register_t *in1 = get_in_reg(env, node, 2);
393 const arch_register_t *in2 = get_in_reg(env, node, 3);
394 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
395 const arch_register_t *in;
398 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
399 out = out ? out : in1;
400 in_name = arch_register_get_name(in);
402 if (is_ia32_emit_cl(node)) {
403 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
407 be_emit_char(env, '%');
408 be_emit_string(env, in_name);
409 be_emit_cstring(env, ", %");
410 be_emit_string(env, arch_register_get_name(out));
414 ia32_emit_am(env, node);
415 be_emit_cstring(env, ", ");
416 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
417 assert(!produces_result(node) && "Source AM with Const must not produce result");
418 ia32_emit_immediate(env, node);
419 } else if (produces_result(node)) {
420 ia32_emit_dest_register(env, node, 0);
422 ia32_emit_source_register(env, node, 2);
426 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
427 ia32_emit_immediate(env, node);
428 be_emit_cstring(env, ", ");
429 ia32_emit_am(env, node);
431 const arch_register_t *in1 = get_in_reg(env, node,
432 get_irn_arity(node) == 5 ? 3 : 2);
433 ir_mode *mode = get_ia32_ls_mode(node);
436 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
438 if (is_ia32_emit_cl(node)) {
439 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
443 be_emit_char(env, '%');
444 be_emit_string(env, in_name);
445 be_emit_cstring(env, ", ");
446 ia32_emit_am(env, node);
450 assert(0 && "unsupported op type");
455 * Emits registers and/or address mode of a binary operation.
457 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
458 switch(get_ia32_op_type(node)) {
460 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
461 // should not happen...
464 ia32_attr_t *attr = get_ia32_attr(node);
465 const arch_register_t *in1 = attr->x87[0];
466 const arch_register_t *in2 = attr->x87[1];
467 const arch_register_t *out = attr->x87[2];
468 const arch_register_t *in;
470 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
471 out = out ? out : in1;
473 be_emit_char(env, '%');
474 be_emit_string(env, arch_register_get_name(in));
475 be_emit_cstring(env, ", %");
476 be_emit_string(env, arch_register_get_name(out));
481 ia32_emit_am(env, node);
484 assert(0 && "unsupported op type");
489 * Emits registers and/or address mode of a unary operation.
491 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
492 switch(get_ia32_op_type(node)) {
494 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
495 ia32_emit_immediate(env, node);
497 if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
498 ia32_emit_source_register(env, node, 3);
499 } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
500 ia32_emit_source_register(env, node, 4);
501 } else if(is_ia32_Push(node)) {
502 ia32_emit_source_register(env, node, 2);
503 } else if(is_ia32_Pop(node)) {
504 ia32_emit_dest_register(env, node, 1);
506 ia32_emit_dest_register(env, node, 0);
512 ia32_emit_am(env, node);
515 assert(0 && "unsupported op type");
520 * Emits address mode.
522 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
523 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
524 ir_entity *ent = get_ia32_am_sc(node);
525 int offs = get_ia32_am_offs_int(node);
527 /* just to be sure... */
528 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
534 mark_entity_visited(ent);
535 id = get_entity_ld_ident(ent);
536 if (is_ia32_am_sc_sign(node))
537 be_emit_char(env, '-');
538 be_emit_ident(env, id);
540 if(get_entity_owner(ent) == get_tls_type()) {
541 if (get_entity_visibility(ent) == visibility_external_allocated) {
542 be_emit_cstring(env, "@INDNTPOFF");
544 be_emit_cstring(env, "@NTPOFF");
551 be_emit_irprintf(env->emit, "%+d", offs);
553 be_emit_irprintf(env->emit, "%d", offs);
557 if (am_flav & (ia32_B | ia32_I)) {
558 be_emit_char(env, '(');
561 if (am_flav & ia32_B) {
562 ia32_emit_source_register(env, node, 0);
565 /* emit index + scale */
566 if (am_flav & ia32_I) {
567 be_emit_char(env, ',');
568 ia32_emit_source_register(env, node, 1);
570 if (am_flav & ia32_S) {
571 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
574 be_emit_char(env, ')');
578 /*************************************************
581 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
582 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
583 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
584 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
586 *************************************************/
589 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
592 * coding of conditions
594 struct cmp2conditon_t {
600 * positive conditions for signed compares
603 const struct cmp2conditon_t cmp2condition_s[] = {
604 { NULL, pn_Cmp_False }, /* always false */
605 { "e", pn_Cmp_Eq }, /* == */
606 { "l", pn_Cmp_Lt }, /* < */
607 { "le", pn_Cmp_Le }, /* <= */
608 { "g", pn_Cmp_Gt }, /* > */
609 { "ge", pn_Cmp_Ge }, /* >= */
610 { "ne", pn_Cmp_Lg }, /* != */
611 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
612 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
613 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
614 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
615 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
616 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
617 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
618 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
619 { NULL, pn_Cmp_True }, /* always true */
623 * positive conditions for unsigned compares
626 const struct cmp2conditon_t cmp2condition_u[] = {
627 { NULL, pn_Cmp_False }, /* always false */
628 { "e", pn_Cmp_Eq }, /* == */
629 { "b", pn_Cmp_Lt }, /* < */
630 { "be", pn_Cmp_Le }, /* <= */
631 { "a", pn_Cmp_Gt }, /* > */
632 { "ae", pn_Cmp_Ge }, /* >= */
633 { "ne", pn_Cmp_Lg }, /* != */
634 { NULL, pn_Cmp_True }, /* always true */
638 * returns the condition code
641 const char *get_cmp_suffix(int cmp_code)
643 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
644 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
646 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
647 return cmp2condition_u[cmp_code & 7].name;
649 return cmp2condition_s[cmp_code & 15].name;
653 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
655 be_emit_string(env, get_cmp_suffix(pnc));
660 * Returns the target block for a control flow node.
663 ir_node *get_cfop_target_block(const ir_node *irn) {
664 return get_irn_link(irn);
668 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
670 be_emit_cstring(env, BLOCK_PREFIX);
671 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
675 * Returns the target label for a control flow node.
678 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
679 ir_node *block = get_cfop_target_block(node);
681 ia32_emit_block_name(env, block);
684 /** Return the next block in Block schedule */
685 static ir_node *next_blk_sched(const ir_node *block) {
686 return get_irn_link(block);
690 * Returns the Proj with projection number proj and NOT mode_M
693 ir_node *get_proj(const ir_node *node, long proj) {
694 const ir_edge_t *edge;
697 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
699 foreach_out_edge(node, edge) {
700 src = get_edge_src_irn(edge);
702 assert(is_Proj(src) && "Proj expected");
703 if (get_irn_mode(src) == mode_M)
706 if (get_Proj_proj(src) == proj)
713 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
716 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
718 const ir_node *proj_true;
719 const ir_node *proj_false;
720 const ir_node *block;
721 const ir_node *next_block;
724 /* get both Proj's */
725 proj_true = get_proj(node, pn_Cond_true);
726 assert(proj_true && "CondJmp without true Proj");
728 proj_false = get_proj(node, pn_Cond_false);
729 assert(proj_false && "CondJmp without false Proj");
731 /* for now, the code works for scheduled and non-schedules blocks */
732 block = get_nodes_block(node);
734 /* we have a block schedule */
735 next_block = next_blk_sched(block);
737 if (get_cfop_target_block(proj_true) == next_block) {
738 /* exchange both proj's so the second one can be omitted */
739 const ir_node *t = proj_true;
741 proj_true = proj_false;
744 pnc = get_negated_pnc(pnc, mode);
747 /* in case of unordered compare, check for parity */
748 if (pnc & pn_Cmp_Uo) {
749 be_emit_cstring(env, "\tjp ");
750 ia32_emit_cfop_target(env, proj_true);
751 be_emit_finish_line_gas(env, proj_true);
754 be_emit_cstring(env, "\tj");
755 ia32_emit_cmp_suffix(env, pnc);
756 be_emit_char(env, ' ');
757 ia32_emit_cfop_target(env, proj_true);
758 be_emit_finish_line_gas(env, proj_true);
760 /* the second Proj might be a fallthrough */
761 if (get_cfop_target_block(proj_false) != next_block) {
762 be_emit_cstring(env, "\tjmp ");
763 ia32_emit_cfop_target(env, proj_false);
764 be_emit_finish_line_gas(env, proj_false);
766 be_emit_cstring(env, "\t/* fallthrough to ");
767 ia32_emit_cfop_target(env, proj_false);
768 be_emit_cstring(env, " */");
769 be_emit_finish_line_gas(env, proj_false);
774 * Emits code for conditional jump.
777 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
778 be_emit_cstring(env, "\tcmp ");
779 ia32_emit_binop(env, node);
780 be_emit_finish_line_gas(env, node);
782 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
786 * Emits code for conditional jump with two variables.
789 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
790 CondJmp_emitter(env, node);
794 * Emits code for conditional test and jump.
797 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
798 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
799 be_emit_cstring(env, "\ttest ");
800 ia32_emit_immediate(env, node);
801 be_emit_cstring(env, ", ");
802 ia32_emit_source_register(env, node, 0);
803 be_emit_finish_line_gas(env, node);
805 be_emit_cstring(env, "\ttest ");
806 ia32_emit_source_register(env, node, 1);
807 be_emit_cstring(env, ", ");
808 ia32_emit_source_register(env, node, 0);
809 be_emit_finish_line_gas(env, node);
811 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
815 * Emits code for conditional test and jump with two variables.
818 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
819 TestJmp_emitter(env, node);
823 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
824 be_emit_cstring(env, "/* omitted redundant test */");
825 be_emit_finish_line_gas(env, node);
827 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
831 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
832 be_emit_cstring(env, "/* omitted redundant test/cmp */");
833 be_emit_finish_line_gas(env, node);
835 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
839 * Emits code for conditional SSE floating point jump with two variables.
842 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
843 be_emit_cstring(env, "\tucomi");
844 ia32_emit_xmm_mode_suffix(env, node);
845 be_emit_char(env, ' ');
846 ia32_emit_binop(env, node);
847 be_emit_finish_line_gas(env, node);
849 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
853 * Emits code for conditional x87 floating point jump with two variables.
856 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
857 ia32_attr_t *attr = get_ia32_attr(node);
858 const char *reg = attr->x87[1]->name;
859 long pnc = get_ia32_pncode(node);
861 switch (get_ia32_irn_opcode(node)) {
862 case iro_ia32_fcomrJmp:
863 pnc = get_inversed_pnc(pnc);
864 reg = attr->x87[0]->name;
865 case iro_ia32_fcomJmp:
867 be_emit_cstring(env, "\tfucom ");
869 case iro_ia32_fcomrpJmp:
870 pnc = get_inversed_pnc(pnc);
871 reg = attr->x87[0]->name;
872 case iro_ia32_fcompJmp:
873 be_emit_cstring(env, "\tfucomp ");
875 case iro_ia32_fcomrppJmp:
876 pnc = get_inversed_pnc(pnc);
877 case iro_ia32_fcomppJmp:
878 be_emit_cstring(env, "\tfucompp ");
884 be_emit_char(env, '%');
885 be_emit_string(env, reg);
887 be_emit_finish_line_gas(env, node);
889 be_emit_cstring(env, "\tfnstsw %ax");
890 be_emit_finish_line_gas(env, node);
891 be_emit_cstring(env, "\tsahf");
892 be_emit_finish_line_gas(env, node);
894 finish_CondJmp(env, node, mode_E, pnc);
898 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
899 long pnc = get_ia32_pncode(node);
900 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
901 int idx_left = 2 - is_PsiCondCMov;
902 int idx_right = 3 - is_PsiCondCMov;
903 const arch_register_t *in1, *in2, *out;
905 out = arch_get_irn_register(env->arch_env, node);
906 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
907 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
909 /* we have to emit the cmp first, because the destination register */
910 /* could be one of the compare registers */
911 if (is_ia32_CmpCMov(node)) {
912 be_emit_cstring(env, "\tcmp ");
913 ia32_emit_source_register(env, node, 1);
914 be_emit_cstring(env, ", ");
915 ia32_emit_source_register(env, node, 0);
916 } else if (is_ia32_xCmpCMov(node)) {
917 be_emit_cstring(env, "\tucomis");
918 ia32_emit_mode_suffix(env, get_irn_mode(node));
919 be_emit_char(env, ' ');
920 ia32_emit_source_register(env, node, 1);
921 be_emit_cstring(env, ", ");
922 ia32_emit_source_register(env, node, 0);
923 } else if (is_PsiCondCMov) {
924 /* omit compare because flags are already set by And/Or */
925 be_emit_cstring(env, "\ttest ");
926 ia32_emit_source_register(env, node, 0);
927 be_emit_cstring(env, ", ");
928 ia32_emit_source_register(env, node, 0);
930 assert(0 && "unsupported CMov");
932 be_emit_finish_line_gas(env, node);
934 if (REGS_ARE_EQUAL(out, in2)) {
935 /* best case: default in == out -> do nothing */
936 } else if (REGS_ARE_EQUAL(out, in1)) {
937 ir_node *n = (ir_node*) node;
938 /* true in == out -> need complement compare and exchange true and default in */
939 ir_node *t = get_irn_n(n, idx_left);
940 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
941 set_irn_n(n, idx_right, t);
943 pnc = get_negated_pnc(pnc, get_irn_mode(node));
945 /* out is different from in: need copy default -> out */
946 if (is_PsiCondCMov) {
947 be_emit_cstring(env, "\tmovl ");
948 ia32_emit_dest_register(env, node, 2);
949 be_emit_cstring(env, ", ");
950 ia32_emit_dest_register(env, node, 0);
952 be_emit_cstring(env, "\tmovl ");
953 ia32_emit_source_register(env, node, 3);
954 be_emit_cstring(env, ", ");
955 ia32_emit_dest_register(env, node, 0);
957 be_emit_finish_line_gas(env, node);
960 if (is_PsiCondCMov) {
961 be_emit_cstring(env, "\tcmov");
962 ia32_emit_cmp_suffix(env, pnc);
963 be_emit_cstring(env, "l ");
964 ia32_emit_source_register(env, node, 1);
965 be_emit_cstring(env, ", ");
966 ia32_emit_dest_register(env, node, 0);
968 be_emit_cstring(env, "\tcmov");
969 ia32_emit_cmp_suffix(env, pnc);
970 be_emit_cstring(env, "l ");
971 ia32_emit_source_register(env, node, 2);
972 be_emit_cstring(env, ", ");
973 ia32_emit_dest_register(env, node, 0);
975 be_emit_finish_line_gas(env, node);
979 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
980 CMov_emitter(env, node);
984 void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
985 CMov_emitter(env, node);
989 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
990 CMov_emitter(env, node);
994 void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
995 int pnc = get_ia32_pncode(node);
997 const arch_register_t *out;
999 out = arch_get_irn_register(env->arch_env, node);
1000 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1002 if (is_ia32_CmpSet(node)) {
1003 be_emit_cstring(env, "\tcmp ");
1004 ia32_emit_binop(env, node);
1005 } else if (is_ia32_xCmpSet(node)) {
1006 be_emit_cstring(env, "\tucomis");
1007 ia32_emit_mode_suffix(env, get_irn_mode(get_irn_n(node, 2)));
1008 be_emit_char(env, ' ');
1009 ia32_emit_binop(env, node);
1010 } else if (is_ia32_PsiCondSet(node)) {
1011 be_emit_cstring(env, "\tcmp $0, ");
1012 ia32_emit_source_register(env, node, 0);
1014 assert(0 && "unsupported Set");
1016 be_emit_finish_line_gas(env, node);
1018 /* use mov to clear target because it doesn't affect the eflags */
1019 be_emit_cstring(env, "\tmovl $0, %");
1020 be_emit_string(env, arch_register_get_name(out));
1021 be_emit_finish_line_gas(env, node);
1023 be_emit_cstring(env, "\tset");
1024 ia32_emit_cmp_suffix(env, pnc);
1025 be_emit_cstring(env, " %");
1026 be_emit_string(env, reg8bit);
1027 be_emit_finish_line_gas(env, node);
1031 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1032 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1036 void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
1037 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
1041 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1042 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1046 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1048 long pnc = get_ia32_pncode(node);
1049 long unord = pnc & pn_Cmp_Uo;
1051 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1054 case pn_Cmp_Leg: /* odered */
1057 case pn_Cmp_Uo: /* unordered */
1061 case pn_Cmp_Eq: /* == */
1065 case pn_Cmp_Lt: /* < */
1069 case pn_Cmp_Le: /* <= */
1073 case pn_Cmp_Gt: /* > */
1077 case pn_Cmp_Ge: /* >= */
1081 case pn_Cmp_Lg: /* != */
1086 assert(sse_pnc >= 0 && "unsupported compare");
1088 if (unord && sse_pnc != 3) {
1090 We need a separate compare against unordered.
1091 Quick and Dirty solution:
1092 - get some memory on stack
1096 - and result and stored result
1099 be_emit_cstring(env, "\tsubl $8, %esp");
1100 be_emit_finish_line_gas(env, node);
1102 be_emit_cstring(env, "\tcmpsd $3, ");
1103 ia32_emit_binop(env, node);
1104 be_emit_finish_line_gas(env, node);
1106 be_emit_cstring(env, "\tmovsd ");
1107 ia32_emit_dest_register(env, node, 0);
1108 be_emit_cstring(env, ", (%esp)");
1109 be_emit_finish_line_gas(env, node);
1112 be_emit_cstring(env, "\tcmpsd ");
1113 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1114 ia32_emit_binop(env, node);
1115 be_emit_finish_line_gas(env, node);
1117 if (unord && sse_pnc != 3) {
1118 be_emit_cstring(env, "\tandpd (%esp), ");
1119 ia32_emit_dest_register(env, node, 0);
1120 be_emit_finish_line_gas(env, node);
1122 be_emit_cstring(env, "\taddl $8, %esp");
1123 be_emit_finish_line_gas(env, node);
1127 /*********************************************************
1130 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1131 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1132 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1133 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1136 *********************************************************/
1138 /* jump table entry (target and corresponding number) */
1139 typedef struct _branch_t {
1144 /* jump table for switch generation */
1145 typedef struct _jmp_tbl_t {
1146 ir_node *defProj; /**< default target */
1147 int min_value; /**< smallest switch case */
1148 int max_value; /**< largest switch case */
1149 int num_branches; /**< number of jumps */
1150 char *label; /**< label of the jump table */
1151 branch_t *branches; /**< jump array */
1155 * Compare two variables of type branch_t. Used to sort all switch cases
1158 int ia32_cmp_branch_t(const void *a, const void *b) {
1159 branch_t *b1 = (branch_t *)a;
1160 branch_t *b2 = (branch_t *)b;
1162 if (b1->value <= b2->value)
1169 * Emits code for a SwitchJmp (creates a jump table if
1170 * possible otherwise a cmp-jmp cascade). Port from
1174 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1175 unsigned long interval;
1180 const ir_edge_t *edge;
1182 /* fill the table structure */
1183 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1184 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1186 tbl.num_branches = get_irn_n_edges(node);
1187 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1188 tbl.min_value = INT_MAX;
1189 tbl.max_value = INT_MIN;
1192 /* go over all proj's and collect them */
1193 foreach_out_edge(node, edge) {
1194 proj = get_edge_src_irn(edge);
1195 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1197 pnc = get_Proj_proj(proj);
1199 /* create branch entry */
1200 tbl.branches[i].target = proj;
1201 tbl.branches[i].value = pnc;
1203 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1204 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1206 /* check for default proj */
1207 if (pnc == get_ia32_pncode(node)) {
1208 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1215 /* sort the branches by their number */
1216 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1218 /* two-complement's magic make this work without overflow */
1219 interval = tbl.max_value - tbl.min_value;
1221 /* emit the table */
1222 be_emit_cstring(env, "\tcmpl $");
1223 be_emit_irprintf(env->emit, "%u, ", interval);
1224 ia32_emit_source_register(env, node, 0);
1225 be_emit_finish_line_gas(env, node);
1227 be_emit_cstring(env, "\tja ");
1228 ia32_emit_cfop_target(env, tbl.defProj);
1229 be_emit_finish_line_gas(env, node);
1231 if (tbl.num_branches > 1) {
1233 be_emit_cstring(env, "\tjmp *");
1234 be_emit_string(env, tbl.label);
1235 be_emit_cstring(env, "(,");
1236 ia32_emit_source_register(env, node, 0);
1237 be_emit_cstring(env, ",4)");
1238 be_emit_finish_line_gas(env, node);
1240 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1241 be_emit_cstring(env, "\t.align 4\n");
1242 be_emit_write_line(env);
1244 be_emit_string(env, tbl.label);
1245 be_emit_cstring(env, ":\n");
1246 be_emit_write_line(env);
1248 be_emit_cstring(env, ".long ");
1249 ia32_emit_cfop_target(env, tbl.branches[0].target);
1250 be_emit_finish_line_gas(env, NULL);
1252 last_value = tbl.branches[0].value;
1253 for (i = 1; i < tbl.num_branches; ++i) {
1254 while (++last_value < tbl.branches[i].value) {
1255 be_emit_cstring(env, ".long ");
1256 ia32_emit_cfop_target(env, tbl.defProj);
1257 be_emit_finish_line_gas(env, NULL);
1259 be_emit_cstring(env, ".long ");
1260 ia32_emit_cfop_target(env, tbl.branches[i].target);
1261 be_emit_finish_line_gas(env, NULL);
1263 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1265 /* one jump is enough */
1266 be_emit_cstring(env, "\tjmp ");
1267 ia32_emit_cfop_target(env, tbl.branches[0].target);
1268 be_emit_finish_line_gas(env, node);
1278 * Emits code for a unconditional jump.
1281 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1282 ir_node *block, *next_block;
1284 /* for now, the code works for scheduled and non-schedules blocks */
1285 block = get_nodes_block(node);
1287 /* we have a block schedule */
1288 next_block = next_blk_sched(block);
1289 if (get_cfop_target_block(node) != next_block) {
1290 be_emit_cstring(env, "\tjmp ");
1291 ia32_emit_cfop_target(env, node);
1293 be_emit_cstring(env, "\t/* fallthrough to ");
1294 ia32_emit_cfop_target(env, node);
1295 be_emit_cstring(env, " */");
1297 be_emit_finish_line_gas(env, node);
1300 /**********************************
1303 * | | ___ _ __ _ _| |_) |
1304 * | | / _ \| '_ \| | | | _ <
1305 * | |___| (_) | |_) | |_| | |_) |
1306 * \_____\___/| .__/ \__, |____/
1309 **********************************/
1312 * Emit movsb/w instructions to make mov count divideable by 4
1315 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1316 be_emit_cstring(env, "\tcld");
1317 be_emit_finish_line_gas(env, NULL);
1321 be_emit_cstring(env, "\tmovsb");
1322 be_emit_finish_line_gas(env, NULL);
1325 be_emit_cstring(env, "\tmovsw");
1326 be_emit_finish_line_gas(env, NULL);
1329 be_emit_cstring(env, "\tmovsb");
1330 be_emit_finish_line_gas(env, NULL);
1331 be_emit_cstring(env, "\tmovsw");
1332 be_emit_finish_line_gas(env, NULL);
1338 * Emit rep movsd instruction for memcopy.
1341 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1342 tarval *tv = get_ia32_Immop_tarval(node);
1343 int rem = get_tarval_long(tv);
1345 emit_CopyB_prolog(env, rem);
1347 be_emit_cstring(env, "\trep movsd");
1348 be_emit_finish_line_gas(env, node);
1352 * Emits unrolled memcopy.
1355 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1356 tarval *tv = get_ia32_Immop_tarval(node);
1357 int size = get_tarval_long(tv);
1359 emit_CopyB_prolog(env, size & 0x3);
1363 be_emit_cstring(env, "\tmovsd");
1364 be_emit_finish_line_gas(env, NULL);
1370 /***************************
1374 * | | / _ \| '_ \ \ / /
1375 * | |___| (_) | | | \ V /
1376 * \_____\___/|_| |_|\_/
1378 ***************************/
1381 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1384 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1385 ir_mode *ls_mode = get_ia32_ls_mode(node);
1386 int ls_bits = get_mode_size_bits(ls_mode);
1388 be_emit_cstring(env, "\tcvt");
1390 if(is_ia32_Conv_I2FP(node)) {
1392 be_emit_cstring(env, "si2ss");
1394 be_emit_cstring(env, "si2sd");
1396 } else if(is_ia32_Conv_FP2I(node)) {
1398 be_emit_cstring(env, "ss2si");
1400 be_emit_cstring(env, "sd2si");
1403 assert(is_ia32_Conv_FP2FP(node));
1405 be_emit_cstring(env, "sd2ss");
1407 be_emit_cstring(env, "ss2sd");
1410 be_emit_char(env, ' ');
1412 switch(get_ia32_op_type(node)) {
1414 ia32_emit_source_register(env, node, 2);
1415 be_emit_cstring(env, ", ");
1416 ia32_emit_dest_register(env, node, 0);
1418 case ia32_AddrModeS:
1419 ia32_emit_dest_register(env, node, 0);
1420 be_emit_cstring(env, ", ");
1421 ia32_emit_am(env, node);
1424 assert(0 && "unsupported op type for Conv");
1426 be_emit_finish_line_gas(env, node);
1430 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1431 emit_ia32_Conv_with_FP(env, node);
1435 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1436 emit_ia32_Conv_with_FP(env, node);
1440 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1441 emit_ia32_Conv_with_FP(env, node);
1445 * Emits code for an Int conversion.
1448 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1449 const char *sign_suffix;
1450 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1451 int smaller_bits = get_mode_size_bits(smaller_mode);
1453 const arch_register_t *in_reg, *out_reg;
1455 assert(!mode_is_float(smaller_mode));
1456 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1458 signed_mode = mode_is_signed(smaller_mode);
1459 if(smaller_bits == 32) {
1460 // this should not happen as it's no convert
1464 sign_suffix = signed_mode ? "s" : "z";
1467 switch(get_ia32_op_type(node)) {
1469 in_reg = get_in_reg(env, node, 2);
1470 out_reg = get_out_reg(env, node, 0);
1472 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1473 REGS_ARE_EQUAL(out_reg, in_reg) &&
1476 /* argument and result are both in EAX and */
1477 /* signedness is ok: -> use converts */
1478 if (smaller_bits == 8) {
1479 be_emit_cstring(env, "\tcbtw");
1480 } else if (smaller_bits == 16) {
1481 be_emit_cstring(env, "\tcwtl");
1485 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1486 /* argument and result are in the same register */
1487 /* and signedness is ok: -> use and with mask */
1488 int mask = (1 << smaller_bits) - 1;
1489 be_emit_cstring(env, "\tandl $0x");
1490 be_emit_irprintf(env->emit, "%x, ", mask);
1491 ia32_emit_dest_register(env, node, 0);
1493 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1495 be_emit_cstring(env, "\tmov");
1496 be_emit_string(env, sign_suffix);
1497 ia32_emit_mode_suffix(env, smaller_mode);
1498 be_emit_cstring(env, "l %");
1499 be_emit_string(env, sreg);
1500 be_emit_cstring(env, ", ");
1501 ia32_emit_dest_register(env, node, 0);
1504 case ia32_AddrModeS: {
1505 be_emit_cstring(env, "\tmov");
1506 be_emit_string(env, sign_suffix);
1507 ia32_emit_mode_suffix(env, smaller_mode);
1508 be_emit_cstring(env, "l %");
1509 ia32_emit_am(env, node);
1510 be_emit_cstring(env, ", ");
1511 ia32_emit_dest_register(env, node, 0);
1515 assert(0 && "unsupported op type for Conv");
1517 be_emit_finish_line_gas(env, node);
1521 * Emits code for an 8Bit Int conversion.
1523 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1524 emit_ia32_Conv_I2I(env, node);
1528 /*******************************************
1531 * | |__ ___ _ __ ___ __| | ___ ___
1532 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1533 * | |_) | __/ | | | (_) | (_| | __/\__ \
1534 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1536 *******************************************/
1539 * Emits a backend call
1542 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1543 ir_entity *ent = be_Call_get_entity(node);
1545 be_emit_cstring(env, "\tcall ");
1547 mark_entity_visited(ent);
1548 be_emit_string(env, get_entity_ld_name(ent));
1550 be_emit_char(env, '*');
1551 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1553 be_emit_finish_line_gas(env, node);
1557 * Emits code to increase stack pointer.
1560 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1561 int offs = be_get_IncSP_offset(node);
1567 be_emit_cstring(env, "\tsubl $");
1568 be_emit_irprintf(env->emit, "%u, ", offs);
1569 ia32_emit_source_register(env, node, 0);
1571 be_emit_cstring(env, "\taddl $");
1572 be_emit_irprintf(env->emit, "%u, ", -offs);
1573 ia32_emit_source_register(env, node, 0);
1575 be_emit_finish_line_gas(env, node);
1579 * Emits code to set stack pointer.
1582 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1583 be_emit_cstring(env, "\tmovl ");
1584 ia32_emit_source_register(env, node, 2);
1585 be_emit_cstring(env, ", ");
1586 ia32_emit_dest_register(env, node, 0);
1587 be_emit_finish_line_gas(env, node);
1591 * Emits code for Copy/CopyKeep.
1594 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1596 const arch_env_t *aenv = env->arch_env;
1599 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1600 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1603 mode = get_irn_mode(node);
1604 if (mode == mode_E) {
1605 be_emit_cstring(env, "\tmovsd ");
1606 ia32_emit_source_register(env, node, 0);
1607 be_emit_cstring(env, ", ");
1608 ia32_emit_dest_register(env, node, 0);
1610 be_emit_cstring(env, "\tmovl ");
1611 ia32_emit_source_register(env, node, 0);
1612 be_emit_cstring(env, ", ");
1613 ia32_emit_dest_register(env, node, 0);
1615 be_emit_finish_line_gas(env, node);
1619 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1620 Copy_emitter(env, node, be_get_Copy_op(node));
1624 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1625 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1629 * Emits code for exchange.
1632 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1633 const arch_register_t *in1, *in2;
1634 const arch_register_class_t *cls1, *cls2;
1636 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1637 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1639 cls1 = arch_register_get_class(in1);
1640 cls2 = arch_register_get_class(in2);
1642 assert(cls1 == cls2 && "Register class mismatch at Perm");
1644 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1645 be_emit_cstring(env, "\txchg ");
1646 ia32_emit_source_register(env, node, 1);
1647 be_emit_cstring(env, ", ");
1648 ia32_emit_source_register(env, node, 0);
1649 be_emit_finish_line_gas(env, node);
1650 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1651 be_emit_cstring(env, "\txorpd ");
1652 ia32_emit_source_register(env, node, 1);
1653 be_emit_cstring(env, ", ");
1654 ia32_emit_source_register(env, node, 0);
1655 be_emit_finish_line_gas(env, NULL);
1657 be_emit_cstring(env, "\txorpd ");
1658 ia32_emit_source_register(env, node, 0);
1659 be_emit_cstring(env, ", ");
1660 ia32_emit_source_register(env, node, 1);
1661 be_emit_finish_line_gas(env, NULL);
1663 be_emit_cstring(env, "\txorpd ");
1664 ia32_emit_source_register(env, node, 1);
1665 be_emit_cstring(env, ", ");
1666 ia32_emit_source_register(env, node, 0);
1667 be_emit_finish_line_gas(env, node);
1668 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1670 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1676 * Emits code for Constant loading.
1679 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1680 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1682 if (imm_tp == ia32_ImmSymConst) {
1683 be_emit_cstring(env, "\tmovl ");
1684 ia32_emit_immediate(env, node);
1685 be_emit_cstring(env, ", ");
1686 ia32_emit_dest_register(env, node, 0);
1688 tarval *tv = get_ia32_Immop_tarval(node);
1689 assert(get_irn_mode(node) == mode_Iu);
1690 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1691 if (tarval_is_null(tv)) {
1692 if (env->isa->opt_arch == arch_pentium_4) {
1693 /* P4 prefers sub r, r, others xor r, r */
1694 be_emit_cstring(env, "\tsubl ");
1696 be_emit_cstring(env, "\txorl ");
1698 ia32_emit_dest_register(env, node, 0);
1699 be_emit_cstring(env, ", ");
1700 ia32_emit_dest_register(env, node, 0);
1702 be_emit_cstring(env, "\tmovl ");
1703 ia32_emit_immediate(env, node);
1704 be_emit_cstring(env, ", ");
1705 ia32_emit_dest_register(env, node, 0);
1708 be_emit_finish_line_gas(env, node);
1712 * Emits code to load the TLS base
1715 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1716 be_emit_cstring(env, "\tmovl %gs:0, ");
1717 ia32_emit_dest_register(env, node, 0);
1718 be_emit_finish_line_gas(env, node);
1722 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1723 be_emit_cstring(env, "\tret");
1724 be_emit_finish_line_gas(env, node);
1728 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1732 /***********************************************************************************
1735 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1736 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1737 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1738 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1740 ***********************************************************************************/
1743 * Enters the emitter functions for handled nodes into the generic
1744 * pointer of an opcode.
1747 void ia32_register_emitters(void) {
1749 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1750 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1751 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1752 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1753 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1754 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1756 /* first clear the generic function pointer for all ops */
1757 clear_irp_opcodes_generic_func();
1759 /* register all emitter functions defined in spec */
1760 ia32_register_spec_emitters();
1762 /* other ia32 emitter functions */
1768 IA32_EMIT(PsiCondCMov);
1770 IA32_EMIT(PsiCondSet);
1771 IA32_EMIT(SwitchJmp);
1774 IA32_EMIT(Conv_I2FP);
1775 IA32_EMIT(Conv_FP2I);
1776 IA32_EMIT(Conv_FP2FP);
1777 IA32_EMIT(Conv_I2I);
1778 IA32_EMIT(Conv_I2I8Bit);
1783 IA32_EMIT(xCmpCMov);
1784 IA32_EMIT(xCondJmp);
1785 IA32_EMIT2(fcomJmp, x87CondJmp);
1786 IA32_EMIT2(fcompJmp, x87CondJmp);
1787 IA32_EMIT2(fcomppJmp, x87CondJmp);
1788 IA32_EMIT2(fcomrJmp, x87CondJmp);
1789 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1790 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1792 /* benode emitter */
1818 static const char *last_name = NULL;
1819 static unsigned last_line = -1;
1820 static unsigned num = -1;
1823 * Emit the debug support for node node.
1826 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1827 dbg_info *db = get_irn_dbg_info(node);
1829 const char *fname = be_retrieve_dbg_info(db, &lineno);
1831 if (! env->cg->birg->main_env->options->stabs_debug_support)
1835 if (last_name != fname) {
1837 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1840 if (last_line != lineno) {
1843 snprintf(name, sizeof(name), ".LM%u", ++num);
1845 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1846 be_emit_string(env, name);
1847 be_emit_cstring(env, ":\n");
1848 be_emit_write_line(env);
1853 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1856 * Emits code for a node.
1859 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1860 ir_op *op = get_irn_op(node);
1862 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
1864 if (op->ops.generic) {
1865 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1866 ia32_emit_dbg(env, node);
1867 (*func) (env, node);
1869 emit_Nothing(env, node);
1870 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1875 * Emits gas alignment directives
1878 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1879 be_emit_cstring(env, "\t.p2align ");
1880 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
1881 be_emit_write_line(env);
1885 * Emits gas alignment directives for Functions depended on cpu architecture.
1888 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1890 unsigned maximum_skip;
1905 maximum_skip = (1 << align) - 1;
1906 ia32_emit_alignment(env, align, maximum_skip);
1910 * Emits gas alignment directives for Labels depended on cpu architecture.
1913 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1914 unsigned align; unsigned maximum_skip;
1929 maximum_skip = (1 << align) - 1;
1930 ia32_emit_alignment(env, align, maximum_skip);
1934 * Test wether a block should be aligned.
1935 * For cpus in the P4/Athlon class it is usefull to align jump labels to
1936 * 16 bytes. However we should only do that if the alignment nops before the
1937 * label aren't executed more often than we have jumps to the label.
1940 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
1941 static const double DELTA = .0001;
1942 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1944 double prev_freq = 0; /**< execfreq of the fallthrough block */
1945 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
1946 cpu_support cpu = env->isa->opt_arch;
1949 if(exec_freq == NULL)
1951 if(cpu == arch_i386 || cpu == arch_i486)
1954 block_freq = get_block_execfreq(exec_freq, block);
1955 if(block_freq < DELTA)
1958 n_cfgpreds = get_Block_n_cfgpreds(block);
1959 for(i = 0; i < n_cfgpreds; ++i) {
1960 ir_node *pred = get_Block_cfgpred_block(block, i);
1961 double pred_freq = get_block_execfreq(exec_freq, pred);
1964 assert(prev_freq == 0);
1965 prev_freq += pred_freq;
1967 jmp_freq += pred_freq;
1971 if(prev_freq < DELTA && !(jmp_freq < DELTA))
1974 jmp_freq /= prev_freq;
1978 case arch_athlon_64:
1980 return jmp_freq > 3;
1982 return jmp_freq > 2;
1987 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
1992 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1995 n_cfgpreds = get_Block_n_cfgpreds(block);
1996 if (n_cfgpreds == 0) {
1998 } else if (n_cfgpreds == 1) {
1999 ir_node *pred = get_Block_cfgpred(block, 0);
2000 ir_node *pred_block = get_nodes_block(pred);
2002 /* we don't need labels for fallthrough blocks, however switch-jmps
2003 * are no fallthoughs */
2004 if(pred_block == prev &&
2005 !(is_Proj(pred) && is_ia32_SwitchJmp(get_Proj_pred(pred)))) {
2014 if (should_align_block(env, block, prev)) {
2016 ia32_emit_align_label(env, env->isa->opt_arch);
2020 ia32_emit_block_name(env, block);
2021 be_emit_char(env, ':');
2023 be_emit_pad_comment(env);
2024 be_emit_cstring(env, " /* preds:");
2026 /* emit list of pred blocks in comment */
2027 arity = get_irn_arity(block);
2028 for (i = 0; i < arity; ++i) {
2029 ir_node *predblock = get_Block_cfgpred_block(block, i);
2030 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2033 if (exec_freq != NULL) {
2034 be_emit_irprintf(env->emit, " freq: %f",
2035 get_block_execfreq(exec_freq, block));
2037 be_emit_cstring(env, " */\n");
2039 be_emit_cstring(env, "\t/* ");
2040 ia32_emit_block_name(env, block);
2041 be_emit_cstring(env, ": */\n");
2043 be_emit_write_line(env);
2047 * Walks over the nodes in a block connected by scheduling edges
2048 * and emits code for each node.
2051 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2053 const ir_node *node;
2055 ia32_emit_block_header(env, block, last_block);
2057 /* emit the contents of the block */
2058 ia32_emit_dbg(env, block);
2059 sched_foreach(block, node) {
2060 ia32_emit_node(env, node);
2065 * Emits code for function start.
2068 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2069 ir_entity *irg_ent = get_irg_entity(irg);
2070 const char *irg_name = get_entity_ld_name(irg_ent);
2071 cpu_support cpu = env->isa->opt_arch;
2072 const be_irg_t *birg = env->cg->birg;
2074 be_emit_write_line(env);
2075 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2076 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2077 ia32_emit_align_func(env, cpu);
2078 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2079 be_emit_cstring(env, ".global ");
2080 be_emit_string(env, irg_name);
2081 be_emit_char(env, '\n');
2082 be_emit_write_line(env);
2084 ia32_emit_function_object(env, irg_name);
2085 be_emit_string(env, irg_name);
2086 be_emit_cstring(env, ":\n");
2087 be_emit_write_line(env);
2091 * Emits code for function end
2094 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2095 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2096 const be_irg_t *birg = env->cg->birg;
2098 ia32_emit_function_size(env, irg_name);
2099 be_dbg_method_end(birg->main_env->db_handle);
2100 be_emit_char(env, '\n');
2101 be_emit_write_line(env);
2106 * Sets labels for control flow nodes (jump target)
2109 void ia32_gen_labels(ir_node *block, void *data) {
2111 int n = get_Block_n_cfgpreds(block);
2113 for (n--; n >= 0; n--) {
2114 pred = get_Block_cfgpred(block, n);
2115 set_irn_link(pred, block);
2120 * Main driver. Emits the code for one routine.
2122 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2123 ia32_emit_env_t env;
2125 ir_node *last_block = NULL;
2128 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2129 env.emit = &env.isa->emit;
2130 env.arch_env = cg->arch_env;
2133 ia32_register_emitters();
2135 ia32_emit_func_prolog(&env, irg);
2136 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2138 n = ARR_LEN(cg->blk_sched);
2139 for (i = 0; i < n;) {
2142 block = cg->blk_sched[i];
2144 next_bl = i < n ? cg->blk_sched[i] : NULL;
2146 /* set here the link. the emitter expects to find the next block here */
2147 set_irn_link(block, next_bl);
2148 ia32_gen_block(&env, block, last_block);
2152 ia32_emit_func_epilog(&env, irg);
2155 void ia32_init_emitter(void)
2157 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");