2 * This file implements the node emitter.
22 #include "iredges_t.h"
24 #include "../besched_t.h"
25 #include "../benode_t.h"
27 #include "ia32_emitter.h"
28 #include "gen_ia32_emitter.h"
29 #include "gen_ia32_regalloc_if.h"
30 #include "ia32_nodes_attr.h"
31 #include "ia32_new_nodes.h"
32 #include "ia32_map_regs.h"
34 #define BLOCK_PREFIX(x) ".L" x
36 #define SNPRINTF_BUF_LEN 128
38 /* global arch_env for lc_printf functions */
39 static const arch_env_t *arch_env = NULL;
41 /*************************************************************
43 * (_) | | / _| | | | |
44 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
45 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
46 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
47 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
50 *************************************************************/
53 * returns true if a node has x87 registers
55 static int has_x87_register(const ir_node *n)
57 return get_irn_op(n)->flags & (irop_flag_machine << 1);
60 /* We always pass the ir_node which is a pointer. */
61 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
62 return lc_arg_type_ptr;
67 * Returns the register at in position pos.
69 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
71 const arch_register_t *reg = NULL;
73 assert(get_irn_arity(irn) > pos && "Invalid IN position");
75 /* The out register of the operator at position pos is the
76 in register we need. */
77 op = get_irn_n(irn, pos);
79 reg = arch_get_irn_register(arch_env, op);
81 assert(reg && "no in register found");
86 * Returns the register at out position pos.
88 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
90 const arch_register_t *reg = NULL;
92 /* 1st case: irn is not of mode_T, so it has only */
93 /* one OUT register -> good */
94 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
95 /* Proj with the corresponding projnum for the register */
97 if (get_irn_mode(irn) != mode_T) {
98 reg = arch_get_irn_register(arch_env, irn);
100 else if (is_ia32_irn(irn)) {
101 reg = get_ia32_out_reg(irn, pos);
104 const ir_edge_t *edge;
106 foreach_out_edge(irn, edge) {
107 proj = get_edge_src_irn(edge);
108 assert(is_Proj(proj) && "non-Proj from mode_T node");
109 if (get_Proj_proj(proj) == pos) {
110 reg = arch_get_irn_register(arch_env, proj);
116 assert(reg && "no out register found");
126 * Returns the name of the in register at position pos.
128 static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
129 const arch_register_t *reg;
131 if (in_out == IN_REG) {
132 reg = get_in_reg(irn, pos);
134 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
135 /* FIXME: works for binop only */
136 assert(2 <= pos && pos <= 3);
137 reg = get_ia32_attr(irn)->x87[pos - 2];
141 /* destination address mode nodes don't have outputs */
142 if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
146 reg = get_out_reg(irn, pos);
147 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
148 reg = get_ia32_attr(irn)->x87[pos + 2];
150 return arch_register_get_name(reg);
154 * Get the register name for a node.
156 static int ia32_get_reg_name(lc_appendable_t *app,
157 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
160 ir_node *X = arg->v_ptr;
161 int nr = occ->width - 1;
164 return lc_appendable_snadd(app, "(null)", 6);
166 buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
168 /* append the stupid % to register names */
169 lc_appendable_chadd(app, '%');
170 return lc_appendable_snadd(app, buf, strlen(buf));
174 * Get the x87 register name for a node.
176 static int ia32_get_x87_name(lc_appendable_t *app,
177 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
180 ir_node *X = arg->v_ptr;
181 int nr = occ->width - 1;
185 return lc_appendable_snadd(app, "(null)", 6);
187 attr = get_ia32_attr(X);
188 buf = attr->x87[nr]->name;
189 lc_appendable_chadd(app, '%');
190 return lc_appendable_snadd(app, buf, strlen(buf));
194 * Returns the tarval, offset or scale of an ia32 as a string.
196 static int ia32_const_to_str(lc_appendable_t *app,
197 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
200 ir_node *X = arg->v_ptr;
203 return lc_arg_append(app, occ, "(null)", 6);
205 if (occ->conversion == 'C') {
206 buf = get_ia32_cnst(X);
209 buf = get_ia32_am_offs(X);
212 return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
216 * Determines the SSE suffix depending on the mode.
218 static int ia32_get_mode_suffix(lc_appendable_t *app,
219 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
221 ir_node *X = arg->v_ptr;
222 ir_mode *mode = get_irn_mode(X);
224 if (mode == mode_T) {
225 mode = is_ia32_AddrModeS(X) || is_ia32_AddrModeD(X) ? get_ia32_ls_mode(X) : get_ia32_res_mode(X);
229 return lc_arg_append(app, occ, "(null)", 6);
231 if (mode_is_float(mode)) {
232 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
235 return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
240 * Return the ia32 printf arg environment.
241 * We use the firm environment with some additional handlers.
243 const lc_arg_env_t *ia32_get_arg_env(void) {
244 static lc_arg_env_t *env = NULL;
246 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
247 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
248 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
249 static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
252 /* extend the firm printer */
253 env = firm_get_arg_env();
255 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
256 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
257 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
258 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
259 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
260 lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
266 static char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
267 switch(get_mode_size_bits(mode)) {
269 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
271 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
273 return (char *)arch_register_get_name(reg);
278 * Emits registers and/or address mode of a binary operation.
280 char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
281 static char *buf = NULL;
283 /* verify that this function is never called on non-AM supporting operations */
284 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
286 #define PRODUCES_RESULT(n) \
287 (!(is_ia32_St(n) || \
288 is_ia32_Store8Bit(n) || \
289 is_ia32_CondJmp(n) || \
290 is_ia32_fCondJmp(n) || \
291 is_ia32_SwitchJmp(n)))
294 buf = xcalloc(1, SNPRINTF_BUF_LEN);
297 memset(buf, 0, SNPRINTF_BUF_LEN);
300 switch(get_ia32_op_type(n)) {
302 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
303 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
306 const arch_register_t *in1 = get_in_reg(n, 2);
307 const arch_register_t *in2 = get_in_reg(n, 3);
308 const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
309 const arch_register_t *in;
312 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
313 out = out ? out : in1;
314 in_name = arch_register_get_name(in);
316 if (is_ia32_emit_cl(n)) {
317 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
321 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
325 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
326 assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
327 snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
330 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S, %s", n, ia32_emit_am(n, env));
334 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
335 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
336 ia32_emit_am(n, env),
337 is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
338 get_ia32_cnst(n)); /* tell the assembler to store it's address. */
341 const arch_register_t *in1 = get_in_reg(n, 2);
342 ir_mode *mode = get_ia32_res_mode(n);
345 mode = mode ? mode : get_ia32_ls_mode(n);
346 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
348 if (is_ia32_emit_cl(n)) {
349 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
353 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
357 assert(0 && "unsupported op type");
360 #undef PRODUCES_RESULT
366 * Emits registers and/or address mode of a binary operation.
368 char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
369 static char *buf = NULL;
371 /* verify that this function is never called on non-AM supporting operations */
372 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
375 buf = xcalloc(1, SNPRINTF_BUF_LEN);
378 memset(buf, 0, SNPRINTF_BUF_LEN);
381 switch(get_ia32_op_type(n)) {
383 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
384 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
387 ia32_attr_t *attr = get_ia32_attr(n);
388 const arch_register_t *in1 = attr->x87[0];
389 const arch_register_t *in2 = attr->x87[1];
390 const arch_register_t *out = attr->x87[2];
391 const arch_register_t *in;
394 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
395 out = out ? out : in1;
396 in_name = arch_register_get_name(in);
398 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
403 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
406 assert(0 && "unsupported op type");
409 #undef PRODUCES_RESULT
415 * Emits registers and/or address mode of a unary operation.
417 char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
418 static char *buf = NULL;
421 buf = xcalloc(1, SNPRINTF_BUF_LEN);
424 memset(buf, 0, SNPRINTF_BUF_LEN);
427 switch(get_ia32_op_type(n)) {
429 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
430 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
433 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
437 snprintf(buf, SNPRINTF_BUF_LEN, ia32_emit_am(n, env));
440 assert(0 && "unsupported op type");
447 * Emits address mode.
449 char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
450 ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
454 static struct obstack *obst = NULL;
455 ir_mode *mode = get_ia32_ls_mode(n);
457 if (! is_ia32_Lea(n))
458 assert(mode && "AM node must have ls_mode attribute set.");
461 obst = xcalloc(1, sizeof(*obst));
464 obstack_free(obst, NULL);
467 /* obstack_free with NULL results in an uninitialized obstack */
471 switch (get_mode_size_bits(mode)) {
473 obstack_printf(obst, "BYTE PTR ");
476 obstack_printf(obst, "WORD PTR ");
479 obstack_printf(obst, "DWORD PTR ");
482 if (has_x87_register(n))
483 /* ARGHHH: stupid gas x87 wants QWORD PTR but SSE must be WITHOUT */
484 obstack_printf(obst, "QWORD PTR ");
488 obstack_printf(obst, "XWORD PTR ");
495 /* emit address mode symconst */
496 if (get_ia32_am_sc(n)) {
497 if (is_ia32_am_sc_sign(n))
498 obstack_printf(obst, "-");
499 obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
502 if (am_flav & ia32_B) {
503 obstack_printf(obst, "[");
504 lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
508 if (am_flav & ia32_I) {
510 obstack_printf(obst, "+");
513 obstack_printf(obst, "[");
516 lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
518 if (am_flav & ia32_S) {
519 obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
525 if (am_flav & ia32_O) {
526 s = get_ia32_am_offs(n);
529 /* omit explicit + if there was no base or index */
531 obstack_printf(obst, "[");
536 obstack_printf(obst, s);
542 obstack_printf(obst, "] ");
544 size = obstack_object_size(obst);
545 s = obstack_finish(obst);
554 * Formated print of commands and comments.
556 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
558 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
561 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
563 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
569 * Add a number to a prefix. This number will not be used a second time.
571 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
572 static unsigned long id = 0;
573 snprintf(buf, buflen, "%s%lu", prefix, ++id);
579 /*************************************************
582 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
583 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
584 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
585 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
587 *************************************************/
590 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
593 * coding of conditions
595 struct cmp2conditon_t {
601 * positive conditions for signed compares
603 static const struct cmp2conditon_t cmp2condition_s[] = {
604 { NULL, pn_Cmp_False }, /* always false */
605 { "e", pn_Cmp_Eq }, /* == */
606 { "l", pn_Cmp_Lt }, /* < */
607 { "le", pn_Cmp_Le }, /* <= */
608 { "g", pn_Cmp_Gt }, /* > */
609 { "ge", pn_Cmp_Ge }, /* >= */
610 { "ne", pn_Cmp_Lg }, /* != */
611 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
612 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
613 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
614 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
615 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
616 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
617 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
618 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
619 { NULL, pn_Cmp_True }, /* always true */
623 * positive conditions for unsigned compares
625 static const struct cmp2conditon_t cmp2condition_u[] = {
626 { NULL, pn_Cmp_False }, /* always false */
627 { "e", pn_Cmp_Eq }, /* == */
628 { "b", pn_Cmp_Lt }, /* < */
629 { "be", pn_Cmp_Le }, /* <= */
630 { "a", pn_Cmp_Gt }, /* > */
631 { "ae", pn_Cmp_Ge }, /* >= */
632 { "ne", pn_Cmp_Lg }, /* != */
633 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
634 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
635 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
636 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
637 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
638 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
639 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
640 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
641 { NULL, pn_Cmp_True }, /* always true */
645 * returns the condition code
647 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
649 assert(cmp2condition_s[cmp_code].num == cmp_code);
650 assert(cmp2condition_u[cmp_code].num == cmp_code);
652 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
656 * Returns the target block for a control flow node.
658 static ir_node *get_cfop_target_block(const ir_node *irn) {
659 return get_irn_link(irn);
663 * Returns the target label for a control flow node.
665 static char *get_cfop_target(const ir_node *irn, char *buf) {
666 ir_node *bl = get_cfop_target_block(irn);
668 snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
672 /** Return the next block in Block schedule */
673 static ir_node *next_blk_sched(const ir_node *block) {
674 return get_irn_link(block);
678 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
680 static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
681 const ir_node *proj1, *proj2 = NULL;
682 const ir_node *block, *next_bl = NULL;
683 const ir_edge_t *edge;
684 char buf[SNPRINTF_BUF_LEN];
685 char cmd_buf[SNPRINTF_BUF_LEN];
686 char cmnt_buf[SNPRINTF_BUF_LEN];
688 /* get both Proj's */
689 edge = get_irn_out_edge_first(irn);
690 proj1 = get_edge_src_irn(edge);
691 assert(is_Proj(proj1) && "CondJmp with a non-Proj");
693 edge = get_irn_out_edge_next(irn, edge);
695 proj2 = get_edge_src_irn(edge);
696 assert(is_Proj(proj2) && "CondJmp with a non-Proj");
699 /* for now, the code works for scheduled and non-schedules blocks */
700 block = get_nodes_block(irn);
702 /* we have a block schedule */
703 next_bl = next_blk_sched(block);
705 if (get_cfop_target_block(proj1) == next_bl) {
706 /* exchange both proj's so the second one can be omitted */
707 const ir_node *t = proj1;
713 /* the first Proj must always be created */
714 if (get_Proj_proj(proj1) == pn_Cond_true) {
715 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
716 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
717 get_cfop_target(proj1, buf));
718 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
721 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
722 get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
723 !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
724 get_cfop_target(proj1, buf));
725 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
729 /* the second Proj might be a fallthrough */
731 if (get_cfop_target_block(proj2) != next_bl) {
732 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
733 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
737 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrogh %s */", get_cfop_target(proj2, buf));
744 * Emits code for conditional jump.
746 static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
748 char cmd_buf[SNPRINTF_BUF_LEN];
749 char cmnt_buf[SNPRINTF_BUF_LEN];
751 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
752 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
754 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
758 * Emits code for conditional jump with two variables.
760 static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
761 CondJmp_emitter(irn, env);
765 * Emits code for conditional test and jump.
767 static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
769 #define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
772 const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
773 const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
774 char cmd_buf[SNPRINTF_BUF_LEN];
775 char cmnt_buf[SNPRINTF_BUF_LEN];
778 op2 = arch_register_get_name(get_in_reg(irn, 1));
780 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
781 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
784 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
790 * Emits code for conditional test and jump with two variables.
792 static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
793 TestJmp_emitter(irn, env);
796 static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
798 char cmd_buf[SNPRINTF_BUF_LEN];
799 char cmnt_buf[SNPRINTF_BUF_LEN];
801 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
802 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
804 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
807 static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
809 char cmd_buf[SNPRINTF_BUF_LEN];
810 char cmnt_buf[SNPRINTF_BUF_LEN];
812 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
813 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
815 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
818 /*********************************************************
821 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
822 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
823 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
824 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
827 *********************************************************/
829 /* jump table entry (target and corresponding number) */
830 typedef struct _branch_t {
835 /* jump table for switch generation */
836 typedef struct _jmp_tbl_t {
837 ir_node *defProj; /**< default target */
838 int min_value; /**< smallest switch case */
839 int max_value; /**< largest switch case */
840 int num_branches; /**< number of jumps */
841 char *label; /**< label of the jump table */
842 branch_t *branches; /**< jump array */
846 * Compare two variables of type branch_t. Used to sort all switch cases
848 static int ia32_cmp_branch_t(const void *a, const void *b) {
849 branch_t *b1 = (branch_t *)a;
850 branch_t *b2 = (branch_t *)b;
852 if (b1->value <= b2->value)
859 * Emits code for a SwitchJmp (creates a jump table if
860 * possible otherwise a cmp-jmp cascade). Port from
863 static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
864 unsigned long interval;
865 char buf[SNPRINTF_BUF_LEN];
866 int last_value, i, pn;
869 const ir_edge_t *edge;
870 const lc_arg_env_t *env = ia32_get_arg_env();
871 FILE *F = emit_env->out;
872 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
874 /* fill the table structure */
875 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
876 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
878 tbl.num_branches = get_irn_n_edges(irn);
879 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
880 tbl.min_value = INT_MAX;
881 tbl.max_value = INT_MIN;
884 /* go over all proj's and collect them */
885 foreach_out_edge(irn, edge) {
886 proj = get_edge_src_irn(edge);
887 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
889 pn = get_Proj_proj(proj);
891 /* create branch entry */
892 tbl.branches[i].target = proj;
893 tbl.branches[i].value = pn;
895 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
896 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
898 /* check for default proj */
899 if (pn == get_ia32_pncode(irn)) {
900 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
907 /* sort the branches by their number */
908 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
910 /* two-complement's magic make this work without overflow */
911 interval = tbl.max_value - tbl.min_value;
914 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
915 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
918 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
919 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
922 if (tbl.num_branches > 1) {
925 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
926 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
929 fprintf(F, "\t.section\t.rodata\n");
930 fprintf(F, "\t.align 4\n");
932 fprintf(F, "%s:\n", tbl.label);
934 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
935 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
938 last_value = tbl.branches[0].value;
939 for (i = 1; i < tbl.num_branches; ++i) {
940 while (++last_value < tbl.branches[i].value) {
941 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
942 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
945 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
946 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
950 fprintf(F, "\n\t.text\n\n");
953 /* one jump is enough */
954 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
955 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
966 * Emits code for a unconditional jump.
968 static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
969 ir_node *block, *next_bl;
971 char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
973 /* for now, the code works for scheduled and non-schedules blocks */
974 block = get_nodes_block(irn);
976 /* we have a block schedule */
977 next_bl = next_blk_sched(block);
978 if (get_cfop_target_block(irn) != next_bl) {
979 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
980 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
984 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
989 /****************************
992 * _ __ _ __ ___ _ ___
993 * | '_ \| '__/ _ \| |/ __|
994 * | |_) | | | (_) | |\__ \
995 * | .__/|_| \___/| ||___/
998 ****************************/
1001 * Emits code for a proj -> node
1003 static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
1004 ir_node *pred = get_Proj_pred(irn);
1006 if (get_irn_op(pred) == op_Start) {
1007 switch(get_Proj_proj(irn)) {
1008 case pn_Start_X_initial_exec:
1017 /**********************************
1020 * | | ___ _ __ _ _| |_) |
1021 * | | / _ \| '_ \| | | | _ <
1022 * | |___| (_) | |_) | |_| | |_) |
1023 * \_____\___/| .__/ \__, |____/
1026 **********************************/
1029 * Emit movsb/w instructions to make mov count divideable by 4
1031 static void emit_CopyB_prolog(FILE *F, int rem, int size) {
1032 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1034 fprintf(F, "\t/* memcopy %d bytes*/\n", size);
1036 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
1037 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
1042 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1043 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
1046 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1047 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
1050 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1051 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1053 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1054 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1062 * Emit rep movsd instruction for memcopy.
1064 static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
1065 FILE *F = emit_env->out;
1066 tarval *tv = get_ia32_Immop_tarval(irn);
1067 int rem = get_tarval_long(tv);
1068 int size = get_tarval_long(get_ia32_Immop_tarval(get_irn_n(irn, 2)));
1069 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1071 emit_CopyB_prolog(F, rem, size);
1073 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
1074 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
1079 * Emits unrolled memcopy.
1081 static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
1082 tarval *tv = get_ia32_Immop_tarval(irn);
1083 int size = get_tarval_long(tv);
1084 FILE *F = emit_env->out;
1085 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1087 emit_CopyB_prolog(F, size & 0x3, size);
1091 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
1092 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
1099 /***************************
1103 * | | / _ \| '_ \ \ / /
1104 * | |___| (_) | | | \ V /
1105 * \_____\___/|_| |_|\_/
1107 ***************************/
1110 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1112 static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1113 FILE *F = emit_env->out;
1114 const lc_arg_env_t *env = ia32_get_arg_env();
1115 ir_mode *src_mode = get_ia32_src_mode(irn);
1116 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1117 char *from, *to, buf[64];
1118 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1120 from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
1121 to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
1123 switch(get_ia32_op_type(irn)) {
1125 lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
1127 case ia32_AddrModeS:
1128 lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
1131 assert(0 && "unsupported op type for Conv");
1134 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
1135 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
1139 static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1140 emit_ia32_Conv_with_FP(irn, emit_env);
1143 static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1144 emit_ia32_Conv_with_FP(irn, emit_env);
1147 static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1148 emit_ia32_Conv_with_FP(irn, emit_env);
1152 * Emits code for an Int conversion.
1154 static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1155 FILE *F = emit_env->out;
1156 const lc_arg_env_t *env = ia32_get_arg_env();
1157 char *move_cmd = "movzx";
1158 char *conv_cmd = NULL;
1159 ir_mode *src_mode = get_ia32_src_mode(irn);
1160 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1162 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1163 const arch_register_t *in_reg, *out_reg;
1165 n = get_mode_size_bits(src_mode);
1166 m = get_mode_size_bits(tgt_mode);
1168 if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
1170 if (n == 8 || m == 8)
1172 else if (n == 16 || m == 16)
1175 assert(0 && "unsupported Conv_I2I");
1178 switch(get_ia32_op_type(irn)) {
1180 in_reg = get_in_reg(irn, 2);
1181 out_reg = get_out_reg(irn, 0);
1183 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1184 REGS_ARE_EQUAL(out_reg, in_reg) &&
1185 mode_is_signed(n < m ? src_mode : tgt_mode))
1187 /* argument and result are both in EAX and */
1188 /* signedness is ok: -> use converts */
1189 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
1191 else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
1192 ! mode_is_signed(n < m ? src_mode : tgt_mode))
1194 /* argument and result are in the same register */
1195 /* and signedness is ok: -> use and with mask */
1196 int mask = (1 << (n < m ? n : m)) - 1;
1197 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
1200 /* use move w/o sign extension */
1201 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
1202 move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
1206 case ia32_AddrModeS:
1207 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
1208 move_cmd, irn, ia32_emit_am(irn, emit_env));
1211 assert(0 && "unsupported op type for Conv");
1214 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
1215 irn, n, src_mode, m, tgt_mode);
1221 * Emits code for an 8Bit Int conversion.
1223 void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
1224 emit_ia32_Conv_I2I(irn, emit_env);
1228 /*******************************************
1231 * | |__ ___ _ __ ___ __| | ___ ___
1232 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1233 * | |_) | __/ | | | (_) | (_| | __/\__ \
1234 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1236 *******************************************/
1239 * Emits a backend call
1241 static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
1242 FILE *F = emit_env->out;
1243 entity *ent = be_Call_get_entity(irn);
1244 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1247 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
1250 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
1253 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
1259 * Emits code to increase stack pointer.
1261 static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1262 FILE *F = emit_env->out;
1263 unsigned offs = be_get_IncSP_offset(irn);
1264 be_stack_dir_t dir = be_get_IncSP_direction(irn);
1265 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1268 if (dir == be_stack_dir_expand)
1269 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
1271 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
1272 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
1275 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
1276 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
1283 * Emits code to set stack pointer.
1285 static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1286 FILE *F = emit_env->out;
1287 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1289 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1290 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
1295 * Emits code for Copy.
1297 static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
1298 FILE *F = emit_env->out;
1299 const arch_env_t *aenv = emit_env->arch_env;
1300 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1302 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))))
1305 if (mode_is_float(get_irn_mode(irn)))
1306 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
1308 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
1309 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1314 * Emits code for exchange.
1316 static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
1317 FILE *F = emit_env->out;
1318 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1320 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
1321 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
1327 /***********************************************************************************
1330 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1331 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1332 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1333 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1335 ***********************************************************************************/
1338 * Enters the emitter functions for handled nodes into the generic
1339 * pointer of an opcode.
1341 static void ia32_register_emitters(void) {
1343 #define IA32_EMIT(a) op_ia32_##a->ops.generic = (op_func)emit_ia32_##a
1344 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1345 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1347 /* first clear the generic function pointer for all ops */
1348 clear_irp_opcodes_generic_func();
1350 /* register all emitter functions defined in spec */
1351 ia32_register_spec_emitters();
1353 /* other ia32 emitter functions */
1358 IA32_EMIT(SwitchJmp);
1361 IA32_EMIT(Conv_I2FP);
1362 IA32_EMIT(Conv_FP2I);
1363 IA32_EMIT(Conv_FP2FP);
1364 IA32_EMIT(Conv_I2I);
1365 IA32_EMIT(Conv_I2I8Bit);
1367 /* benode emitter */
1384 * Emits code for a node.
1386 static void ia32_emit_node(const ir_node *irn, void *env) {
1387 ia32_emit_env_t *emit_env = env;
1388 FILE *F = emit_env->out;
1389 ir_op *op = get_irn_op(irn);
1390 DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
1392 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
1394 if (op->ops.generic) {
1395 void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
1399 ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
1404 * Walks over the nodes in a block connected by scheduling edges
1405 * and emits code for each node.
1407 static void ia32_gen_block(ir_node *block, void *env) {
1410 if (! is_Block(block))
1413 fprintf(((ia32_emit_env_t *)env)->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
1414 sched_foreach(block, irn) {
1415 ia32_emit_node(irn, env);
1420 * Emits code for function start.
1422 static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
1423 entity *irg_ent = get_irg_entity(irg);
1424 const char *irg_name = get_entity_name(irg_ent);
1426 fprintf(F, "\t.section\t.text\n");
1427 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1428 fprintf(F, ".globl %s\n", irg_name);
1430 fprintf(F, "\t.type\t%s, @function\n", irg_name);
1431 fprintf(F, "%s:\n", irg_name);
1435 * Emits code for function end
1437 static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
1438 const char *irg_name = get_entity_name(get_irg_entity(irg));
1440 fprintf(F, "\tret\n");
1441 fprintf(F, "\t.size\t%s, .-%s\n\n", irg_name, irg_name);
1446 * Sets labels for control flow nodes (jump target)
1447 * TODO: Jump optimization
1449 static void ia32_gen_labels(ir_node *block, void *env) {
1451 int n = get_Block_n_cfgpreds(block);
1453 for (n--; n >= 0; n--) {
1454 pred = get_Block_cfgpred(block, n);
1455 set_irn_link(pred, block);
1460 * Main driver. Emits the code for one routine.
1462 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
1463 ia32_emit_env_t emit_env;
1467 emit_env.arch_env = cg->arch_env;
1469 emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
1470 FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
1472 /* set the global arch_env (needed by print hooks) */
1473 arch_env = cg->arch_env;
1475 ia32_register_emitters();
1477 ia32_emit_func_prolog(F, irg);
1478 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
1480 if (cg->opt.extbb && cg->blk_sched) {
1481 int i, n = ARR_LEN(cg->blk_sched);
1483 for (i = 0; i < n;) {
1486 block = cg->blk_sched[i];
1488 next_bl = i < n ? cg->blk_sched[i] : NULL;
1490 /* set here the link. the emitter expects to find the next block here */
1491 set_irn_link(block, next_bl);
1492 ia32_gen_block(block, &emit_env);
1496 /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
1497 in the block schedule. As this number should NEVER be equal the next block,
1498 we does not need a clear block link here. */
1499 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
1502 ia32_emit_func_epilog(F, irg);