2 * This file implements the node emitter.
3 * @author Christian Wuerdig, Matthias Braun
21 #include "iredges_t.h"
25 #include "../besched_t.h"
26 #include "../benode_t.h"
28 #include "../be_dbgout.h"
30 #include "ia32_emitter.h"
31 #include "gen_ia32_emitter.h"
32 #include "gen_ia32_regalloc_if.h"
33 #include "ia32_nodes_attr.h"
34 #include "ia32_new_nodes.h"
35 #include "ia32_map_regs.h"
36 #include "bearch_ia32_t.h"
38 #define BLOCK_PREFIX ".L"
40 #define SNPRINTF_BUF_LEN 128
42 /* global arch_env for lc_printf functions */
43 static const arch_env_t *arch_env = NULL;
45 /** by default, we generate assembler code for the Linux gas */
46 asm_flavour_t asm_flavour = ASM_LINUX_GAS;
49 * Switch to a new section
51 void ia32_switch_section(FILE *F, section_t sec) {
52 static section_t curr_sec = NO_SECTION;
53 static const char *text[ASM_MAX][SECTION_MAX] = {
59 ".section\t.tbss,\"awT\",@nobits",
60 ".section\t.ctors,\"aw\",@progbits"
65 ".section .rdata,\"dr\"",
67 ".section\t.tbss,\"awT\",@nobits",
68 ".section\t.ctors,\"aw\",@progbits"
87 fprintf(F, "\t%s\n", text[asm_flavour][sec]);
95 static void ia32_dump_function_object(FILE *F, const char *name)
97 switch (asm_flavour) {
99 fprintf(F, "\t.type\t%s, @function\n", name);
102 fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name);
109 static void ia32_dump_function_size(FILE *F, const char *name)
111 switch (asm_flavour) {
113 fprintf(F, "\t.size\t%s, .-%s\n", name, name);
121 * Returns the register at in position pos.
123 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
125 const arch_register_t *reg = NULL;
127 assert(get_irn_arity(irn) > pos && "Invalid IN position");
129 /* The out register of the operator at position pos is the
130 in register we need. */
131 op = get_irn_n(irn, pos);
133 reg = arch_get_irn_register(arch_env, op);
135 assert(reg && "no in register found");
137 /* in case of a joker register: just return a valid register */
138 if (arch_register_type_is(reg, joker)) {
139 arch_register_req_t req;
140 const arch_register_req_t *p_req;
142 /* ask for the requirements */
143 p_req = arch_get_register_req(arch_env, &req, irn, pos);
145 if (arch_register_req_is(p_req, limited)) {
146 /* in case of limited requirements: get the first allowed register */
148 bitset_t *bs = bitset_alloca(arch_register_class_n_regs(p_req->cls));
151 p_req->limited(p_req->limited_env, bs);
152 idx = bitset_next_set(bs, 0);
153 reg = arch_register_for_index(p_req->cls, idx);
155 /* otherwise get first register in class */
156 reg = arch_register_for_index(p_req->cls, 0);
164 * Returns the register at out position pos.
166 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
168 const arch_register_t *reg = NULL;
170 /* 1st case: irn is not of mode_T, so it has only */
171 /* one OUT register -> good */
172 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
173 /* Proj with the corresponding projnum for the register */
175 if (get_irn_mode(irn) != mode_T) {
176 reg = arch_get_irn_register(arch_env, irn);
177 } else if (is_ia32_irn(irn)) {
178 reg = get_ia32_out_reg(irn, pos);
180 const ir_edge_t *edge;
182 foreach_out_edge(irn, edge) {
183 proj = get_edge_src_irn(edge);
184 assert(is_Proj(proj) && "non-Proj from mode_T node");
185 if (get_Proj_proj(proj) == pos) {
186 reg = arch_get_irn_register(arch_env, proj);
192 assert(reg && "no out register found");
197 * Returns an ident for the given tarval tv.
199 static ident *get_ident_for_tv(tarval *tv) {
201 int len = tarval_snprintf(buf, sizeof(buf), tv);
203 return new_id_from_str(buf);
207 * Determine the gnu assembler suffix that indicates a mode
209 static char get_mode_suffix(const ir_mode *mode) {
210 if(mode_is_float(mode)) {
211 switch(get_mode_size_bits(mode)) {
220 assert(mode_is_int(mode) || mode_is_reference(mode));
221 switch(get_mode_size_bits(mode)) {
232 panic("Can't output mode_suffix for %+F\n", mode);
235 static int produces_result(const ir_node *node) {
236 return !(is_ia32_St(node) ||
237 is_ia32_Store8Bit(node) ||
238 is_ia32_CondJmp(node) ||
239 is_ia32_xCondJmp(node) ||
240 is_ia32_CmpSet(node) ||
241 is_ia32_xCmpSet(node) ||
242 is_ia32_SwitchJmp(node));
245 static const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
246 switch(get_mode_size_bits(mode)) {
248 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
250 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
252 return (char *)arch_register_get_name(reg);
258 * Determines the SSE suffix depending on the mode.
260 static int ia32_print_mode_suffix(lc_appendable_t *app,
261 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
263 ir_node *irn = arg->v_ptr;
264 ir_mode *mode = get_ia32_ls_mode(irn);
266 if (mode_is_float(mode)) {
267 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
269 if(get_mode_size_bits(mode) == 32)
272 if(mode_is_signed(mode))
273 lc_appendable_chadd(app, 's');
275 lc_appendable_chadd(app, 'z');
277 lc_appendable_chadd(app, get_mode_suffix(mode));
284 * Add a number to a prefix. This number will not be used a second time.
286 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
287 static unsigned long id = 0;
288 snprintf(buf, buflen, "%s%lu", prefix, ++id);
292 /*************************************************************
294 * (_) | | / _| | | | |
295 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
296 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
297 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
298 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
301 *************************************************************/
303 void ia32_emit_ident(ia32_emit_env_t *env, ident *id)
305 size_t len = get_id_strlen(id);
306 const char* str = get_id_str(id);
308 ia32_emit_string_len(env, str, len);
311 void ia32_emit_irprintf(ia32_emit_env_t *env, const char *fmt, ...)
317 ir_vsnprintf(buf, sizeof(buf), fmt, ap);
320 ia32_emit_string(env, buf);
323 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
325 const arch_register_t *reg = get_in_reg(node, pos);
326 const char *reg_name = arch_register_get_name(reg);
328 assert(pos < get_irn_arity(node));
330 ia32_emit_char(env, '%');
331 ia32_emit_string(env, reg_name);
334 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
335 const arch_register_t *reg = get_out_reg(node, pos);
336 const char *reg_name = arch_register_get_name(reg);
338 ia32_emit_char(env, '%');
339 ia32_emit_string(env, reg_name);
342 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
344 ia32_attr_t *attr = get_ia32_attr(node);
347 ia32_emit_char(env, '%');
348 ia32_emit_string(env, attr->x87[pos]->name);
351 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
356 switch(get_ia32_immop_type(node)) {
358 tv = get_ia32_Immop_tarval(node);
359 id = get_ident_for_tv(tv);
361 case ia32_ImmSymConst:
362 id = get_ia32_Immop_symconst(node);
366 ia32_emit_string(env, "BAD");
370 ia32_emit_ident(env, id);
373 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode)
375 ia32_emit_char(env, get_mode_suffix(mode));
378 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
380 if(get_mode_size_bits(mode) == 32)
382 if(mode_is_signed(mode)) {
383 ia32_emit_char(env, 's');
385 ia32_emit_char(env, 'z');
390 * Emits registers and/or address mode of a binary operation.
392 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
393 switch(get_ia32_op_type(node)) {
395 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
396 ia32_emit_char(env, '$');
397 ia32_emit_immediate(env, node);
398 ia32_emit_cstring(env, ", ");
399 ia32_emit_source_register(env, node, 2);
401 const arch_register_t *in1 = get_in_reg(node, 2);
402 const arch_register_t *in2 = get_in_reg(node, 3);
403 const arch_register_t *out = produces_result(node) ? get_out_reg(node, 0) : NULL;
404 const arch_register_t *in;
407 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
408 out = out ? out : in1;
409 in_name = arch_register_get_name(in);
411 if (is_ia32_emit_cl(node)) {
412 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
416 ia32_emit_char(env, '%');
417 ia32_emit_string(env, in_name);
418 ia32_emit_cstring(env, ", %");
419 ia32_emit_string(env, arch_register_get_name(out));
423 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
424 assert(!produces_result(node) && "Source AM with Const must not produce result");
425 ia32_emit_am(env, node);
426 ia32_emit_cstring(env, ", $");
427 ia32_emit_immediate(env, node);
428 } else if (produces_result(node)) {
429 ia32_emit_am(env, node);
430 ia32_emit_cstring(env, ", ");
431 ia32_emit_dest_register(env, node, 0);
433 ia32_emit_am(env, node);
434 ia32_emit_cstring(env, ", ");
435 ia32_emit_source_register(env, node, 2);
439 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
440 ia32_emit_char(env, '$');
441 ia32_emit_immediate(env, node);
442 ia32_emit_cstring(env, ", ");
443 ia32_emit_am(env, node);
445 const arch_register_t *in1 = get_in_reg(node, get_irn_arity(node) == 5 ? 3 : 2);
446 ir_mode *mode = get_ia32_ls_mode(node);
449 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
451 if (is_ia32_emit_cl(node)) {
452 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
456 ia32_emit_char(env, '%');
457 ia32_emit_string(env, in_name);
458 ia32_emit_cstring(env, ", ");
459 ia32_emit_am(env, node);
463 assert(0 && "unsupported op type");
468 * Emits registers and/or address mode of a binary operation.
470 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
471 switch(get_ia32_op_type(node)) {
473 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
474 // should not happen...
477 ia32_attr_t *attr = get_ia32_attr(node);
478 const arch_register_t *in1 = attr->x87[0];
479 const arch_register_t *in2 = attr->x87[1];
480 const arch_register_t *out = attr->x87[2];
481 const arch_register_t *in;
483 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
484 out = out ? out : in1;
486 ia32_emit_char(env, '%');
487 ia32_emit_string(env, arch_register_get_name(in));
488 ia32_emit_cstring(env, ", %");
489 ia32_emit_string(env, arch_register_get_name(out));
494 ia32_emit_am(env, node);
497 assert(0 && "unsupported op type");
502 * Emits registers and/or address mode of a unary operation.
504 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
505 switch(get_ia32_op_type(node)) {
507 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
508 ia32_emit_char(env, '$');
509 ia32_emit_immediate(env, node);
511 if (is_ia32_IMul(node) || is_ia32_Mulh(node)) {
512 /* MulS and Mulh implicitly multiply by EAX */
513 ia32_emit_source_register(env, node, 3);
514 } else if(is_ia32_IDiv(node)) {
515 ia32_emit_source_register(env, node, 1);
516 } else if(is_ia32_Push(node)) {
517 ia32_emit_source_register(env, node, 2);
518 } else if(is_ia32_Pop(node)) {
519 ia32_emit_dest_register(env, node, 1);
521 ia32_emit_dest_register(env, node, 0);
527 ia32_emit_am(env, node);
530 assert(0 && "unsupported op type");
535 * Emits address mode.
537 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
538 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
539 ident *id = get_ia32_am_sc(node);
540 int offs = get_ia32_am_offs_int(node);
542 /* just to be sure... */
543 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
547 if (is_ia32_am_sc_sign(node))
548 ia32_emit_char(env, '-');
549 ia32_emit_ident(env, id);
554 ia32_emit_irprintf(env, "%+d", offs);
556 ia32_emit_irprintf(env, "%d", offs);
560 if (am_flav & (ia32_B | ia32_I)) {
561 ia32_emit_char(env, '(');
564 if (am_flav & ia32_B) {
565 ia32_emit_source_register(env, node, 0);
568 /* emit index + scale */
569 if (am_flav & ia32_I) {
570 ia32_emit_char(env, ',');
571 ia32_emit_source_register(env, node, 1);
573 if (am_flav & ia32_S) {
574 ia32_emit_irprintf(env, ",%d", 1 << get_ia32_am_scale(node));
577 ia32_emit_char(env, ')');
583 * Formated print of commands and comments.
585 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
587 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
590 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
592 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
596 void ia32_write_line(ia32_emit_env_t *env)
598 char *finished_line = obstack_finish(env->obst);
600 fwrite(finished_line, env->linelength, 1, env->out);
602 obstack_free(env->obst, finished_line);
605 void ia32_pad_comment(ia32_emit_env_t *env)
607 while(env->linelength <= 30) {
608 ia32_emit_char(env, ' ');
610 ia32_emit_cstring(env, " ");
613 void ia32_emit_finish_line(ia32_emit_env_t *env, const ir_node *node)
616 const char *sourcefile;
620 ia32_emit_char(env, '\n');
621 ia32_write_line(env);
625 ia32_pad_comment(env);
626 ia32_emit_cstring(env, "/* ");
627 ia32_emit_irprintf(env, "%+F ", node);
629 dbg = get_irn_dbg_info(node);
630 sourcefile = be_retrieve_dbg_info(dbg, &lineno);
631 if(sourcefile != NULL) {
632 ia32_emit_string(env, sourcefile);
633 ia32_emit_irprintf(env, ":%u", lineno);
635 ia32_emit_cstring(env, " */\n");
636 ia32_write_line(env);
640 /*************************************************
643 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
644 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
645 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
646 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
648 *************************************************/
651 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
654 * coding of conditions
656 struct cmp2conditon_t {
662 * positive conditions for signed compares
664 static const struct cmp2conditon_t cmp2condition_s[] = {
665 { NULL, pn_Cmp_False }, /* always false */
666 { "e", pn_Cmp_Eq }, /* == */
667 { "l", pn_Cmp_Lt }, /* < */
668 { "le", pn_Cmp_Le }, /* <= */
669 { "g", pn_Cmp_Gt }, /* > */
670 { "ge", pn_Cmp_Ge }, /* >= */
671 { "ne", pn_Cmp_Lg }, /* != */
672 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
673 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
674 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
675 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
676 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
677 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
678 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
679 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
680 { NULL, pn_Cmp_True }, /* always true */
684 * positive conditions for unsigned compares
686 static const struct cmp2conditon_t cmp2condition_u[] = {
687 { NULL, pn_Cmp_False }, /* always false */
688 { "e", pn_Cmp_Eq }, /* == */
689 { "b", pn_Cmp_Lt }, /* < */
690 { "be", pn_Cmp_Le }, /* <= */
691 { "a", pn_Cmp_Gt }, /* > */
692 { "ae", pn_Cmp_Ge }, /* >= */
693 { "ne", pn_Cmp_Lg }, /* != */
694 { NULL, pn_Cmp_True }, /* always true */
698 * returns the condition code
700 static const char *get_cmp_suffix(int cmp_code)
702 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
703 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
705 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
706 return cmp2condition_u[cmp_code & 7].name;
708 return cmp2condition_s[cmp_code & 15].name;
712 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
714 ia32_emit_string(env, get_cmp_suffix(pnc));
719 * Returns the target block for a control flow node.
721 static ir_node *get_cfop_target_block(const ir_node *irn) {
722 return get_irn_link(irn);
726 * Returns the target label for a control flow node.
728 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
729 ir_node *block = get_cfop_target_block(node);
731 ia32_emit_cstring(env, BLOCK_PREFIX);
732 ia32_emit_irprintf(env, "%d", get_irn_node_nr(block));
735 /** Return the next block in Block schedule */
736 static ir_node *next_blk_sched(const ir_node *block) {
737 return get_irn_link(block);
741 * Returns the Proj with projection number proj and NOT mode_M
743 static ir_node *get_proj(const ir_node *node, long proj) {
744 const ir_edge_t *edge;
747 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
749 foreach_out_edge(node, edge) {
750 src = get_edge_src_irn(edge);
752 assert(is_Proj(src) && "Proj expected");
753 if (get_irn_mode(src) == mode_M)
756 if (get_Proj_proj(src) == proj)
763 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
765 static void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node,
766 ir_mode *mode, long pnc) {
767 const ir_node *proj_true;
768 const ir_node *proj_false;
769 const ir_node *block;
770 const ir_node *next_block;
773 /* get both Proj's */
774 proj_true = get_proj(node, pn_Cond_true);
775 assert(proj_true && "CondJmp without true Proj");
777 proj_false = get_proj(node, pn_Cond_false);
778 assert(proj_false && "CondJmp without false Proj");
780 /* for now, the code works for scheduled and non-schedules blocks */
781 block = get_nodes_block(node);
783 /* we have a block schedule */
784 next_block = next_blk_sched(block);
786 if (get_cfop_target_block(proj_true) == next_block) {
787 /* exchange both proj's so the second one can be omitted */
788 const ir_node *t = proj_true;
790 proj_true = proj_false;
793 pnc = get_negated_pnc(pnc, mode);
796 /* in case of unordered compare, check for parity */
797 if (pnc & pn_Cmp_Uo) {
798 ia32_emit_cstring(env, "\tjp ");
799 ia32_emit_cfop_target(env, proj_true);
800 ia32_emit_finish_line(env, proj_true);
803 ia32_emit_cstring(env, "\tj");
804 ia32_emit_cmp_suffix(env, pnc);
805 ia32_emit_char(env, ' ');
806 ia32_emit_cfop_target(env, proj_true);
807 ia32_emit_finish_line(env, proj_true);
809 /* the second Proj might be a fallthrough */
810 if (get_cfop_target_block(proj_false) != next_block) {
811 ia32_emit_cstring(env, "\tjmp ");
812 ia32_emit_cfop_target(env, proj_false);
813 ia32_emit_finish_line(env, proj_false);
815 ia32_emit_cstring(env, "\t/* fallthrough to");
816 ia32_emit_cfop_target(env, proj_false);
817 ia32_emit_cstring(env, " */");
818 ia32_emit_finish_line(env, proj_false);
823 * Emits code for conditional jump.
825 static void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
826 ia32_emit_cstring(env, "\tcmp ");
827 ia32_emit_binop(env, node);
828 ia32_emit_finish_line(env, node);
830 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
834 * Emits code for conditional jump with two variables.
836 static void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
837 CondJmp_emitter(env, node);
841 * Emits code for conditional test and jump.
843 static void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
844 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
845 ia32_emit_cstring(env, "\ttest $");
846 ia32_emit_immediate(env, node);
847 ia32_emit_cstring(env, ", ");
848 ia32_emit_source_register(env, node, 0);
849 ia32_emit_finish_line(env, node);
851 ia32_emit_cstring(env, "\ttest ");
852 ia32_emit_source_register(env, node, 1);
853 ia32_emit_cstring(env, ", ");
854 ia32_emit_source_register(env, node, 0);
855 ia32_emit_finish_line(env, node);
857 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
861 * Emits code for conditional test and jump with two variables.
863 static void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
864 TestJmp_emitter(env, node);
867 static void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
868 ia32_emit_cstring(env, "/* omitted redundant test */");
869 ia32_emit_finish_line(env, node);
871 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
874 static void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
875 ia32_emit_cstring(env, "/* omitted redundant test/cmp */");
876 ia32_emit_finish_line(env, node);
878 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
882 * Emits code for conditional SSE floating point jump with two variables.
884 static void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
885 ia32_emit_cstring(env, "\tucomis");
886 ia32_emit_mode_suffix(env, get_irn_mode(node));
887 ia32_emit_char(env, ' ');
888 ia32_emit_binop(env, node);
889 ia32_emit_finish_line(env, node);
891 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
895 * Emits code for conditional x87 floating point jump with two variables.
897 static void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
898 ia32_attr_t *attr = get_ia32_attr(node);
899 const char *reg = attr->x87[1]->name;
900 long pnc = get_ia32_pncode(node);
902 switch (get_ia32_irn_opcode(node)) {
903 case iro_ia32_fcomrJmp:
904 pnc = get_inversed_pnc(pnc);
905 case iro_ia32_fcomJmp:
907 ia32_emit_cstring(env, "\tfucom ");
909 case iro_ia32_fcomrpJmp:
910 pnc = get_inversed_pnc(pnc);
911 case iro_ia32_fcompJmp:
912 ia32_emit_cstring(env, "\tfucomp ");
914 case iro_ia32_fcomrppJmp:
915 pnc = get_inversed_pnc(pnc);
916 case iro_ia32_fcomppJmp:
917 ia32_emit_cstring(env, "\tfucompp ");
923 ia32_emit_char(env, '%');
924 ia32_emit_string(env, reg);
926 ia32_emit_finish_line(env, node);
928 ia32_emit_cstring(env, "\tfnstsw %ax");
929 ia32_emit_finish_line(env, node);
930 ia32_emit_cstring(env, "\tsahf");
931 ia32_emit_finish_line(env, node);
933 finish_CondJmp(env, node, mode_D, pnc);
936 static void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
937 long pnc = get_ia32_pncode(node);
938 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
939 int idx_left = 2 - is_PsiCondCMov;
940 int idx_right = 3 - is_PsiCondCMov;
941 const arch_register_t *in1, *in2, *out;
943 out = arch_get_irn_register(env->arch_env, node);
944 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
945 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
947 /* we have to emit the cmp first, because the destination register */
948 /* could be one of the compare registers */
949 if (is_ia32_CmpCMov(node)) {
950 ia32_emit_cstring(env, "\tcmp ");
951 ia32_emit_source_register(env, node, 1);
952 ia32_emit_cstring(env, ", ");
953 ia32_emit_source_register(env, node, 0);
954 } else if (is_ia32_xCmpCMov(node)) {
955 ia32_emit_cstring(env, "\tucomis");
956 ia32_emit_mode_suffix(env, get_irn_mode(node));
957 ia32_emit_char(env, ' ');
958 ia32_emit_source_register(env, node, 1);
959 ia32_emit_cstring(env, ", ");
960 ia32_emit_source_register(env, node, 0);
961 } else if (is_PsiCondCMov) {
962 /* omit compare because flags are already set by And/Or */
963 ia32_emit_cstring(env, "\ttest ");
964 ia32_emit_source_register(env, node, 0);
965 ia32_emit_cstring(env, ", ");
966 ia32_emit_source_register(env, node, 0);
968 assert(0 && "unsupported CMov");
970 ia32_emit_finish_line(env, node);
972 if (REGS_ARE_EQUAL(out, in2)) {
973 /* best case: default in == out -> do nothing */
974 } else if (REGS_ARE_EQUAL(out, in1)) {
975 ir_node *n = (ir_node*) node;
976 /* true in == out -> need complement compare and exchange true and default in */
977 ir_node *t = get_irn_n(n, idx_left);
978 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
979 set_irn_n(n, idx_right, t);
981 pnc = get_negated_pnc(pnc, get_irn_mode(node));
983 /* out is different from in: need copy default -> out */
984 if (is_PsiCondCMov) {
985 ia32_emit_cstring(env, "\tmovl ");
986 ia32_emit_dest_register(env, node, 2);
987 ia32_emit_cstring(env, ", ");
988 ia32_emit_dest_register(env, node, 0);
990 ia32_emit_cstring(env, "\tmovl ");
991 ia32_emit_source_register(env, node, 3);
992 ia32_emit_cstring(env, ", ");
993 ia32_emit_dest_register(env, node, 0);
995 ia32_emit_finish_line(env, node);
998 if (is_PsiCondCMov) {
999 ia32_emit_cstring(env, "\tcmov");
1000 ia32_emit_cmp_suffix(env, pnc);
1001 ia32_emit_cstring(env, "l ");
1002 ia32_emit_source_register(env, node, 1);
1003 ia32_emit_cstring(env, ", ");
1004 ia32_emit_dest_register(env, node, 0);
1006 ia32_emit_cstring(env, "\tcmov");
1007 ia32_emit_cmp_suffix(env, pnc);
1008 ia32_emit_cstring(env, "l ");
1009 ia32_emit_source_register(env, node, 2);
1010 ia32_emit_cstring(env, ", ");
1011 ia32_emit_dest_register(env, node, 0);
1013 ia32_emit_finish_line(env, node);
1016 static void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
1017 CMov_emitter(env, node);
1020 static void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
1021 CMov_emitter(env, node);
1024 static void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
1025 CMov_emitter(env, node);
1028 static void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
1029 int pnc = get_ia32_pncode(node);
1030 const char *reg8bit;
1031 const arch_register_t *out;
1033 out = arch_get_irn_register(env->arch_env, node);
1034 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1036 if (is_ia32_CmpSet(node)) {
1037 ia32_emit_cstring(env, "\tcmp ");
1038 ia32_emit_binop(env, node);
1039 } else if (is_ia32_xCmpSet(node)) {
1040 ia32_emit_cstring(env, "\tucomis");
1041 ia32_emit_mode_suffix(env, get_irn_mode(get_irn_n(node, 2)));
1042 ia32_emit_char(env, ' ');
1043 ia32_emit_binop(env, node);
1044 } else if (is_ia32_PsiCondSet(node)) {
1045 ia32_emit_cstring(env, "\tcmp $0, ");
1046 ia32_emit_source_register(env, node, 0);
1048 assert(0 && "unsupported Set");
1050 ia32_emit_finish_line(env, node);
1052 /* use mov to clear target because it doesn't affect the eflags */
1053 ia32_emit_cstring(env, "\tmovl $0, %");
1054 ia32_emit_string(env, arch_register_get_name(out));
1055 ia32_emit_finish_line(env, node);
1057 ia32_emit_cstring(env, "\tset");
1058 ia32_emit_cmp_suffix(env, pnc);
1059 ia32_emit_cstring(env, " %");
1060 ia32_emit_string(env, reg8bit);
1061 ia32_emit_finish_line(env, node);
1064 static void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1065 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1068 static void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
1069 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
1072 static void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1073 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1076 static void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1078 long pnc = get_ia32_pncode(node);
1079 long unord = pnc & pn_Cmp_Uo;
1081 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1084 case pn_Cmp_Leg: /* odered */
1087 case pn_Cmp_Uo: /* unordered */
1091 case pn_Cmp_Eq: /* == */
1095 case pn_Cmp_Lt: /* < */
1099 case pn_Cmp_Le: /* <= */
1103 case pn_Cmp_Gt: /* > */
1107 case pn_Cmp_Ge: /* >= */
1111 case pn_Cmp_Lg: /* != */
1116 assert(sse_pnc >= 0 && "unsupported compare");
1118 if (unord && sse_pnc != 3) {
1120 We need a separate compare against unordered.
1121 Quick and Dirty solution:
1122 - get some memory on stack
1126 - and result and stored result
1129 ia32_emit_cstring(env, "\tsubl $8, %esp");
1130 ia32_emit_finish_line(env, node);
1132 ia32_emit_cstring(env, "\tcmpsd $3, ");
1133 ia32_emit_binop(env, node);
1134 ia32_emit_finish_line(env, node);
1136 ia32_emit_cstring(env, "\tmovsd ");
1137 ia32_emit_dest_register(env, node, 0);
1138 ia32_emit_cstring(env, ", (%esp)");
1139 ia32_emit_finish_line(env, node);
1142 ia32_emit_cstring(env, "\tcmpsd ");
1143 ia32_emit_irprintf(env, "%d, ", sse_pnc);
1144 ia32_emit_binop(env, node);
1145 ia32_emit_finish_line(env, node);
1147 if (unord && sse_pnc != 3) {
1148 ia32_emit_cstring(env, "\tandpd (%esp), ");
1149 ia32_emit_dest_register(env, node, 0);
1150 ia32_emit_finish_line(env, node);
1152 ia32_emit_cstring(env, "\taddl $8, %esp");
1153 ia32_emit_finish_line(env, node);
1157 /*********************************************************
1160 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1161 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1162 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1163 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1166 *********************************************************/
1168 /* jump table entry (target and corresponding number) */
1169 typedef struct _branch_t {
1174 /* jump table for switch generation */
1175 typedef struct _jmp_tbl_t {
1176 ir_node *defProj; /**< default target */
1177 int min_value; /**< smallest switch case */
1178 int max_value; /**< largest switch case */
1179 int num_branches; /**< number of jumps */
1180 char *label; /**< label of the jump table */
1181 branch_t *branches; /**< jump array */
1185 * Compare two variables of type branch_t. Used to sort all switch cases
1187 static int ia32_cmp_branch_t(const void *a, const void *b) {
1188 branch_t *b1 = (branch_t *)a;
1189 branch_t *b2 = (branch_t *)b;
1191 if (b1->value <= b2->value)
1198 * Emits code for a SwitchJmp (creates a jump table if
1199 * possible otherwise a cmp-jmp cascade). Port from
1202 static void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1203 unsigned long interval;
1208 const ir_edge_t *edge;
1210 /* fill the table structure */
1211 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1212 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1214 tbl.num_branches = get_irn_n_edges(node);
1215 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1216 tbl.min_value = INT_MAX;
1217 tbl.max_value = INT_MIN;
1220 /* go over all proj's and collect them */
1221 foreach_out_edge(node, edge) {
1222 proj = get_edge_src_irn(edge);
1223 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1225 pnc = get_Proj_proj(proj);
1227 /* create branch entry */
1228 tbl.branches[i].target = proj;
1229 tbl.branches[i].value = pnc;
1231 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1232 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1234 /* check for default proj */
1235 if (pnc == get_ia32_pncode(node)) {
1236 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1243 /* sort the branches by their number */
1244 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1246 /* two-complement's magic make this work without overflow */
1247 interval = tbl.max_value - tbl.min_value;
1249 /* emit the table */
1250 ia32_emit_cstring(env, "\tcmpl $");
1251 ia32_emit_irprintf(env, "%u, ", interval);
1252 ia32_emit_source_register(env, node, 0);
1253 ia32_emit_finish_line(env, node);
1255 ia32_emit_cstring(env, "\tja ");
1256 ia32_emit_cfop_target(env, tbl.defProj);
1257 ia32_emit_finish_line(env, node);
1259 if (tbl.num_branches > 1) {
1261 ia32_emit_cstring(env, "\tjmp *");
1262 ia32_emit_string(env, tbl.label);
1263 ia32_emit_cstring(env, "(,");
1264 ia32_emit_source_register(env, node, 0);
1265 ia32_emit_cstring(env, ",4)");
1266 ia32_emit_finish_line(env, node);
1268 ia32_switch_section(env->out, SECTION_RODATA);
1269 ia32_emit_cstring(env, "\t.align 4\n");
1270 ia32_write_line(env);
1272 ia32_emit_string(env, tbl.label);
1273 ia32_emit_cstring(env, ":\n");
1274 ia32_write_line(env);
1276 ia32_emit_cstring(env, ".long ");
1277 ia32_emit_cfop_target(env, tbl.branches[0].target);
1278 ia32_emit_finish_line(env, NULL);
1280 last_value = tbl.branches[0].value;
1281 for (i = 1; i < tbl.num_branches; ++i) {
1282 while (++last_value < tbl.branches[i].value) {
1283 ia32_emit_cstring(env, ".long ");
1284 ia32_emit_cfop_target(env, tbl.defProj);
1285 ia32_emit_finish_line(env, NULL);
1287 ia32_emit_cstring(env, ".long ");
1288 ia32_emit_cfop_target(env, tbl.branches[i].target);
1289 ia32_emit_finish_line(env, NULL);
1291 ia32_switch_section(env->out, SECTION_TEXT);
1293 /* one jump is enough */
1294 ia32_emit_cstring(env, "\tjmp ");
1295 ia32_emit_cfop_target(env, tbl.branches[0].target);
1296 ia32_emit_finish_line(env, node);
1306 * Emits code for a unconditional jump.
1308 static void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1309 ir_node *block, *next_block;
1311 /* for now, the code works for scheduled and non-schedules blocks */
1312 block = get_nodes_block(node);
1314 /* we have a block schedule */
1315 next_block = next_blk_sched(block);
1316 if (get_cfop_target_block(node) != next_block) {
1317 ia32_emit_cstring(env, "\tjmp ");
1318 ia32_emit_cfop_target(env, node);
1320 ia32_emit_cstring(env, "\t/* fallthrough to ");
1321 ia32_emit_cfop_target(env, node);
1322 ia32_emit_cstring(env, " */");
1324 ia32_emit_finish_line(env, node);
1327 /**********************************
1330 * | | ___ _ __ _ _| |_) |
1331 * | | / _ \| '_ \| | | | _ <
1332 * | |___| (_) | |_) | |_| | |_) |
1333 * \_____\___/| .__/ \__, |____/
1336 **********************************/
1339 * Emit movsb/w instructions to make mov count divideable by 4
1341 static void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1342 ia32_emit_cstring(env, "\tcld");
1343 ia32_emit_finish_line(env, NULL);
1347 ia32_emit_cstring(env, "\tmovsb");
1348 ia32_emit_finish_line(env, NULL);
1351 ia32_emit_cstring(env, "\tmovsw");
1352 ia32_emit_finish_line(env, NULL);
1355 ia32_emit_cstring(env, "\tmovsb");
1356 ia32_emit_finish_line(env, NULL);
1357 ia32_emit_cstring(env, "\tmovsw");
1358 ia32_emit_finish_line(env, NULL);
1364 * Emit rep movsd instruction for memcopy.
1366 static void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1367 tarval *tv = get_ia32_Immop_tarval(node);
1368 int rem = get_tarval_long(tv);
1370 emit_CopyB_prolog(env, rem);
1372 ia32_emit_cstring(env, "\trep movsd");
1373 ia32_emit_finish_line(env, node);
1377 * Emits unrolled memcopy.
1379 static void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1380 tarval *tv = get_ia32_Immop_tarval(node);
1381 int size = get_tarval_long(tv);
1383 emit_CopyB_prolog(env, size & 0x3);
1387 ia32_emit_cstring(env, "\tmovsd");
1388 ia32_emit_finish_line(env, NULL);
1394 /***************************
1398 * | | / _ \| '_ \ \ / /
1399 * | |___| (_) | | | \ V /
1400 * \_____\___/|_| |_|\_/
1402 ***************************/
1405 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1407 static void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1408 ir_mode *ls_mode = get_ia32_ls_mode(node);
1409 int ls_bits = get_mode_size_bits(ls_mode);
1411 ia32_emit_cstring(env, "\tcvt");
1413 if(is_ia32_Conv_I2FP(node)) {
1415 ia32_emit_cstring(env, "si2ss");
1417 ia32_emit_cstring(env, "si2sd");
1419 } else if(is_ia32_Conv_FP2I(node)) {
1421 ia32_emit_cstring(env, "ss2si");
1423 ia32_emit_cstring(env, "sd2si");
1426 assert(is_ia32_Conv_FP2FP(node));
1428 ia32_emit_cstring(env, "sd2ss");
1430 ia32_emit_cstring(env, "ss2sd");
1434 switch(get_ia32_op_type(node)) {
1436 ia32_emit_dest_register(env, node, 0);
1437 ia32_emit_cstring(env, ", ");
1438 ia32_emit_source_register(env, node, 2);
1440 case ia32_AddrModeS:
1441 ia32_emit_dest_register(env, node, 0);
1442 ia32_emit_cstring(env, ", ");
1443 ia32_emit_am(env, node);
1446 assert(0 && "unsupported op type for Conv");
1448 ia32_emit_finish_line(env, node);
1451 static void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1452 emit_ia32_Conv_with_FP(env, node);
1455 static void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1456 emit_ia32_Conv_with_FP(env, node);
1459 static void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1460 emit_ia32_Conv_with_FP(env, node);
1464 * Emits code for an Int conversion.
1466 static void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1467 const char *sign_suffix;
1468 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1469 int smaller_bits = get_mode_size_bits(smaller_mode);
1471 const arch_register_t *in_reg, *out_reg;
1473 assert(!mode_is_float(smaller_mode));
1474 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1476 signed_mode = mode_is_signed(smaller_mode);
1477 if(smaller_bits == 32) {
1478 // this should not happen as it's no convert
1482 sign_suffix = signed_mode ? "s" : "z";
1485 switch(get_ia32_op_type(node)) {
1487 in_reg = get_in_reg(node, 2);
1488 out_reg = get_out_reg(node, 0);
1490 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1491 REGS_ARE_EQUAL(out_reg, in_reg) &&
1494 /* argument and result are both in EAX and */
1495 /* signedness is ok: -> use converts */
1496 if (smaller_bits == 8) {
1497 ia32_emit_cstring(env, "\tcbtw");
1498 } else if (smaller_bits == 16) {
1499 ia32_emit_cstring(env, "\tcwtl");
1503 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1504 /* argument and result are in the same register */
1505 /* and signedness is ok: -> use and with mask */
1506 int mask = (1 << smaller_bits) - 1;
1507 ia32_emit_cstring(env, "\tandl $0x");
1508 ia32_emit_irprintf(env, "%x, ", mask);
1509 ia32_emit_dest_register(env, node, 0);
1511 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1513 ia32_emit_cstring(env, "\tmov");
1514 ia32_emit_string(env, sign_suffix);
1515 ia32_emit_mode_suffix(env, smaller_mode);
1516 ia32_emit_cstring(env, "l %");
1517 ia32_emit_string(env, sreg);
1518 ia32_emit_cstring(env, ", ");
1519 ia32_emit_dest_register(env, node, 0);
1522 case ia32_AddrModeS: {
1523 ia32_emit_cstring(env, "\tmov");
1524 ia32_emit_string(env, sign_suffix);
1525 ia32_emit_mode_suffix(env, smaller_mode);
1526 ia32_emit_cstring(env, "l %");
1527 ia32_emit_am(env, node);
1528 ia32_emit_cstring(env, ", ");
1529 ia32_emit_dest_register(env, node, 0);
1533 assert(0 && "unsupported op type for Conv");
1535 ia32_emit_finish_line(env, node);
1539 * Emits code for an 8Bit Int conversion.
1541 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1542 emit_ia32_Conv_I2I(env, node);
1546 /*******************************************
1549 * | |__ ___ _ __ ___ __| | ___ ___
1550 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1551 * | |_) | __/ | | | (_) | (_| | __/\__ \
1552 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1554 *******************************************/
1557 * Emits a backend call
1559 static void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1560 ir_entity *ent = be_Call_get_entity(node);
1562 ia32_emit_cstring(env, "\tcall ");
1564 ia32_emit_string(env, get_entity_ld_name(ent));
1566 ia32_emit_char(env, '*');
1567 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1569 ia32_emit_finish_line(env, node);
1573 * Emits code to increase stack pointer.
1575 static void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1576 int offs = be_get_IncSP_offset(node);
1582 ia32_emit_cstring(env, "\tsubl $");
1583 ia32_emit_irprintf(env, "%u, ", offs);
1584 ia32_emit_source_register(env, node, 0);
1586 ia32_emit_cstring(env, "\taddl $");
1587 ia32_emit_irprintf(env, "%u, ", -offs);
1588 ia32_emit_source_register(env, node, 0);
1590 ia32_emit_finish_line(env, node);
1594 * Emits code to set stack pointer.
1596 static void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1597 ia32_emit_cstring(env, "\tmovl ");
1598 ia32_emit_source_register(env, node, 2);
1599 ia32_emit_cstring(env, ", ");
1600 ia32_emit_dest_register(env, node, 0);
1601 ia32_emit_finish_line(env, node);
1605 * Emits code for Copy/CopyKeep.
1607 static void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op) {
1608 const arch_env_t *aenv = env->arch_env;
1610 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1611 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1614 if (mode_is_float(get_irn_mode(node))) {
1615 ia32_emit_cstring(env, "\tmovsd ");
1616 ia32_emit_source_register(env, node, 0);
1617 ia32_emit_cstring(env, ", ");
1618 ia32_emit_dest_register(env, node, 0);
1620 ia32_emit_cstring(env, "\tmovl ");
1621 ia32_emit_source_register(env, node, 0);
1622 ia32_emit_cstring(env, ", ");
1623 ia32_emit_dest_register(env, node, 0);
1625 ia32_emit_finish_line(env, node);
1628 static void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1629 Copy_emitter(env, node, be_get_Copy_op(node));
1632 static void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1633 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1637 * Emits code for exchange.
1639 static void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1640 const arch_register_t *in1, *in2;
1641 const arch_register_class_t *cls1, *cls2;
1643 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1644 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1646 cls1 = arch_register_get_class(in1);
1647 cls2 = arch_register_get_class(in2);
1649 assert(cls1 == cls2 && "Register class mismatch at Perm");
1651 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1653 if(emit_env->isa->opt_arch == arch_athlon) {
1654 // xchg commands are Vector path on athlons and therefore stall the DirectPath pipeline
1655 // it is often beneficial to use the 3 xor trick instead of an xchg
1657 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %1S, %2S", irn, irn);
1659 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %2S, %1S", irn, irn);
1661 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %1S, %2S", irn, irn);
1664 ia32_emit_cstring(env, "\txchg ");
1665 ia32_emit_source_register(env, node, 1);
1666 ia32_emit_cstring(env, ", ");
1667 ia32_emit_source_register(env, node, 0);
1668 ia32_emit_finish_line(env, node);
1672 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1673 ia32_emit_cstring(env, "\tpxorq ");
1674 ia32_emit_source_register(env, node, 1);
1675 ia32_emit_cstring(env, ", ");
1676 ia32_emit_source_register(env, node, 0);
1677 ia32_emit_finish_line(env, NULL);
1679 ia32_emit_cstring(env, "\tpxorq ");
1680 ia32_emit_source_register(env, node, 0);
1681 ia32_emit_cstring(env, ", ");
1682 ia32_emit_source_register(env, node, 1);
1683 ia32_emit_finish_line(env, NULL);
1685 ia32_emit_cstring(env, "\tpxorq ");
1686 ia32_emit_source_register(env, node, 1);
1687 ia32_emit_cstring(env, ", ");
1688 ia32_emit_source_register(env, node, 0);
1689 ia32_emit_finish_line(env, node);
1690 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1692 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1698 * Emits code for Constant loading.
1700 static void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1701 ir_mode *mode = get_irn_mode(node);
1702 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1704 if (imm_tp == ia32_ImmSymConst) {
1705 ia32_emit_cstring(env, "\tmovl $");
1706 ia32_emit_immediate(env, node);
1707 ia32_emit_cstring(env, ", ");
1708 ia32_emit_dest_register(env, node, 0);
1710 tarval *tv = get_ia32_Immop_tarval(node);
1711 assert(mode == mode_Iu);
1712 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1713 if (tarval_is_null(tv)) {
1714 if (env->isa->opt_arch == arch_pentium_4) {
1715 /* P4 prefers sub r, r, others xor r, r */
1716 ia32_emit_cstring(env, "\tsubl ");
1718 ia32_emit_cstring(env, "\txorl ");
1720 ia32_emit_dest_register(env, node, 0);
1721 ia32_emit_cstring(env, ", ");
1722 ia32_emit_dest_register(env, node, 0);
1724 ia32_emit_cstring(env, "\tmovl $");
1725 ia32_emit_immediate(env, node);
1726 ia32_emit_cstring(env, ", ");
1727 ia32_emit_dest_register(env, node, 0);
1730 ia32_emit_finish_line(env, node);
1734 * Emits code to load the TLS base
1736 static void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1737 ia32_emit_cstring(env, "\tmovl %gs:0, ");
1738 ia32_emit_dest_register(env, node, 0);
1739 ia32_emit_finish_line(env, node);
1742 static void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1743 ia32_emit_cstring(env, "\tret");
1744 ia32_emit_finish_line(env, node);
1747 static void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1751 /***********************************************************************************
1754 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1755 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1756 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1757 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1759 ***********************************************************************************/
1762 * Enters the emitter functions for handled nodes into the generic
1763 * pointer of an opcode.
1765 static void ia32_register_emitters(void) {
1767 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1768 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1769 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1770 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1771 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1772 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1774 /* first clear the generic function pointer for all ops */
1775 clear_irp_opcodes_generic_func();
1777 /* register all emitter functions defined in spec */
1778 ia32_register_spec_emitters();
1780 /* other ia32 emitter functions */
1786 IA32_EMIT(PsiCondCMov);
1788 IA32_EMIT(PsiCondSet);
1789 IA32_EMIT(SwitchJmp);
1792 IA32_EMIT(Conv_I2FP);
1793 IA32_EMIT(Conv_FP2I);
1794 IA32_EMIT(Conv_FP2FP);
1795 IA32_EMIT(Conv_I2I);
1796 IA32_EMIT(Conv_I2I8Bit);
1801 IA32_EMIT(xCmpCMov);
1802 IA32_EMIT(xCondJmp);
1803 IA32_EMIT2(fcomJmp, x87CondJmp);
1804 IA32_EMIT2(fcompJmp, x87CondJmp);
1805 IA32_EMIT2(fcomppJmp, x87CondJmp);
1806 IA32_EMIT2(fcomrJmp, x87CondJmp);
1807 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1808 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1810 /* benode emitter */
1836 static const char *last_name = NULL;
1837 static unsigned last_line = -1;
1838 static unsigned num = -1;
1841 * Emit the debug support for node node.
1843 static void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1844 dbg_info *db = get_irn_dbg_info(node);
1846 const char *fname = be_retrieve_dbg_info(db, &lineno);
1848 if (! env->cg->birg->main_env->options->stabs_debug_support)
1852 if (last_name != fname) {
1854 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1857 if (last_line != lineno) {
1861 snprintf(name, sizeof(name), ".LM%u", ++num);
1863 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1864 fprintf(F, "%s:\n", name);
1869 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1872 * Emits code for a node.
1874 static void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1875 ir_op *op = get_irn_op(node);
1876 DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
1878 DBG((mod, LEVEL_1, "emitting code for %+F\n", node));
1880 if (op->ops.generic) {
1881 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1882 ia32_emit_dbg(env, node);
1883 (*func) (env, node);
1885 emit_Nothing(env, node);
1886 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1891 * Emits gas alignment directives
1893 static void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1894 ia32_emit_cstring(env, "\t.p2align ");
1895 ia32_emit_irprintf(env, "%u,,%u\n", align, skip);
1896 ia32_write_line(env);
1900 * Emits gas alignment directives for Functions depended on cpu architecture.
1902 static void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1904 unsigned maximum_skip;
1919 maximum_skip = (1 << align) - 1;
1920 ia32_emit_alignment(env, align, maximum_skip);
1924 * Emits gas alignment directives for Labels depended on cpu architecture.
1926 static void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1927 unsigned align; unsigned maximum_skip;
1942 maximum_skip = (1 << align) - 1;
1943 ia32_emit_alignment(env, align, maximum_skip);
1946 static int is_first_loop_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev_block) {
1947 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1948 double block_freq, prev_freq;
1949 static const double DELTA = .0001;
1950 cpu_support cpu = env->isa->opt_arch;
1952 if(exec_freq == NULL)
1954 if(cpu == arch_i386 || cpu == arch_i486)
1957 block_freq = get_block_execfreq(exec_freq, block);
1958 prev_freq = get_block_execfreq(exec_freq, prev_block);
1960 if(block_freq < DELTA || prev_freq < DELTA)
1963 block_freq /= prev_freq;
1967 case arch_athlon_64:
1969 return block_freq > 3;
1974 return block_freq > 2;
1978 * Walks over the nodes in a block connected by scheduling edges
1979 * and emits code for each node.
1981 static void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block) {
1982 ir_graph *irg = get_irn_irg(block);
1983 ir_node *start_block = get_irg_start_block(irg);
1985 const ir_node *node;
1988 assert(is_Block(block));
1990 if (block == start_block)
1993 if (need_label && get_irn_arity(block) == 1) {
1994 ir_node *pred_block = get_Block_cfgpred_block(block, 0);
1996 if (pred_block == last_block && get_irn_n_edges_kind(pred_block, EDGE_KIND_BLOCK) <= 2)
2000 /* special case: if one of our cfg preds is a switch-jmp we need a label, */
2001 /* otherwise there might be jump table entries jumping to */
2002 /* non-existent (omitted) labels */
2003 for (i = get_Block_n_cfgpreds(block) - 1; i >= 0; --i) {
2004 ir_node *pred = get_Block_cfgpred(block, i);
2006 if (is_Proj(pred)) {
2007 assert(get_irn_mode(pred) == mode_X);
2008 if (is_ia32_SwitchJmp(get_Proj_pred(pred))) {
2018 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2020 /* align the loop headers */
2021 if (! is_first_loop_block(env, block, last_block)) {
2022 /* align blocks where the previous block has no fallthrough */
2023 arity = get_irn_arity(block);
2025 for (i = 0; i < arity; ++i) {
2026 ir_node *predblock = get_Block_cfgpred_block(block, i);
2028 if (predblock == last_block) {
2036 ia32_emit_align_label(env, env->isa->opt_arch);
2038 ia32_emit_cstring(env, BLOCK_PREFIX);
2039 ia32_emit_irprintf(env, "%d:", get_irn_node_nr(block));
2040 ia32_pad_comment(env);
2041 ia32_emit_cstring(env, "\t/* preds:");
2043 /* emit list of pred blocks in comment */
2044 arity = get_irn_arity(block);
2045 for (i = 0; i < arity; ++i) {
2046 ir_node *predblock = get_Block_cfgpred_block(block, i);
2047 ia32_emit_irprintf(env, " %d", get_irn_node_nr(predblock));
2050 if (exec_freq != NULL) {
2051 ia32_emit_irprintf(env, " freq: %f", get_block_execfreq(exec_freq, block));
2053 ia32_emit_cstring(env, " */\n");
2054 ia32_write_line(env);
2057 /* emit the contents of the block */
2058 ia32_emit_dbg(env, block);
2059 sched_foreach(block, node) {
2060 ia32_emit_node(env, node);
2065 * Emits code for function start.
2067 static void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2069 ir_entity *irg_ent = get_irg_entity(irg);
2070 const char *irg_name = get_entity_ld_name(irg_ent);
2071 cpu_support cpu = env->isa->opt_arch;
2072 const be_irg_t *birg = env->cg->birg;
2075 ia32_switch_section(F, SECTION_TEXT);
2076 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2077 ia32_emit_align_func(env, cpu);
2078 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2079 fprintf(F, ".globl %s\n", irg_name);
2081 ia32_dump_function_object(F, irg_name);
2082 fprintf(F, "%s:\n", irg_name);
2086 * Emits code for function end
2088 static void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2089 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2090 const be_irg_t *birg = env->cg->birg;
2093 ia32_dump_function_size(F, irg_name);
2094 be_dbg_method_end(birg->main_env->db_handle);
2100 * Sets labels for control flow nodes (jump target)
2102 static void ia32_gen_labels(ir_node *block, void *data) {
2104 int n = get_Block_n_cfgpreds(block);
2106 for (n--; n >= 0; n--) {
2107 pred = get_Block_cfgpred(block, n);
2108 set_irn_link(pred, block);
2113 * Main driver. Emits the code for one routine.
2115 void ia32_gen_routine(ia32_code_gen_t *cg, FILE *F, ir_graph *irg) {
2116 ia32_emit_env_t env;
2118 ir_node *last_block = NULL;
2120 struct obstack obst;
2122 obstack_init(&obst);
2125 env.arch_env = cg->arch_env;
2127 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2130 FIRM_DBG_REGISTER(env.mod, "firm.be.ia32.emitter");
2132 /* set the global arch_env (needed by print hooks) */
2133 arch_env = cg->arch_env;
2135 ia32_register_emitters();
2137 ia32_emit_func_prolog(&env, irg);
2138 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2140 n = ARR_LEN(cg->blk_sched);
2141 for (i = 0; i < n;) {
2144 block = cg->blk_sched[i];
2146 next_bl = i < n ? cg->blk_sched[i] : NULL;
2148 /* set here the link. the emitter expects to find the next block here */
2149 set_irn_link(block, next_bl);
2150 ia32_gen_block(&env, block, last_block);
2154 ia32_emit_func_epilog(&env, irg);