2 * This file implements the node emitter.
22 #include "iredges_t.h"
24 #include "../besched_t.h"
25 #include "../benode_t.h"
27 #include "ia32_emitter.h"
28 #include "gen_ia32_emitter.h"
29 #include "gen_ia32_regalloc_if.h"
30 #include "ia32_nodes_attr.h"
31 #include "ia32_new_nodes.h"
32 #include "ia32_map_regs.h"
33 #include "bearch_ia32_t.h"
35 #define BLOCK_PREFIX(x) ".L" x
37 #define SNPRINTF_BUF_LEN 128
39 /* global arch_env for lc_printf functions */
40 static const arch_env_t *arch_env = NULL;
42 /** by default, we generate assembler code for the Linux gas */
43 asm_flavour_t asm_flavour = ASM_LINUX_GAS;
46 * Switch to a new section
48 void ia32_switch_section(FILE *F, section_t sec) {
49 static section_t curr_sec = NO_SECTION;
50 static const char *text[ASM_MAX][SECTION_MAX] = {
52 ".section\t.text", ".section\t.data", ".section\t.rodata", ".section\t.text"
55 ".section\t.text", ".section\t.data", ".section .rdata,\"dr\"", ".section\t.text"
72 fprintf(F, "\t%s\n", text[asm_flavour][sec]);
76 static void ia32_dump_function_object(FILE *F, const char *name)
78 switch (asm_flavour) {
80 fprintf(F, "\t.type\t%s, @function\n", name);
83 fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name);
88 static void ia32_dump_function_size(FILE *F, const char *name)
90 switch (asm_flavour) {
92 fprintf(F, "\t.size\t%s, .-%s\n", name, name);
97 /*************************************************************
99 * (_) | | / _| | | | |
100 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
101 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
102 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
103 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
106 *************************************************************/
108 static INLINE int be_is_unknown_reg(const arch_register_t *reg) {
110 REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN]) || \
111 REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]) || \
112 REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]);
116 * returns true if a node has x87 registers
118 static INLINE int has_x87_register(const ir_node *n) {
119 return is_irn_machine_user(n, 0);
122 /* We always pass the ir_node which is a pointer. */
123 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
124 return lc_arg_type_ptr;
129 * Returns the register at in position pos.
131 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
133 const arch_register_t *reg = NULL;
135 assert(get_irn_arity(irn) > pos && "Invalid IN position");
137 /* The out register of the operator at position pos is the
138 in register we need. */
139 op = get_irn_n(irn, pos);
141 reg = arch_get_irn_register(arch_env, op);
143 assert(reg && "no in register found");
145 /* in case of unknown: just return a register */
146 if (REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN]))
147 reg = &ia32_gp_regs[REG_EAX];
148 else if (REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]))
149 reg = &ia32_xmm_regs[REG_XMM0];
150 else if (REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]))
151 reg = &ia32_vfp_regs[REG_VF0];
157 * Returns the register at out position pos.
159 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
161 const arch_register_t *reg = NULL;
163 /* 1st case: irn is not of mode_T, so it has only */
164 /* one OUT register -> good */
165 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
166 /* Proj with the corresponding projnum for the register */
168 if (get_irn_mode(irn) != mode_T) {
169 reg = arch_get_irn_register(arch_env, irn);
171 else if (is_ia32_irn(irn)) {
172 reg = get_ia32_out_reg(irn, pos);
175 const ir_edge_t *edge;
177 foreach_out_edge(irn, edge) {
178 proj = get_edge_src_irn(edge);
179 assert(is_Proj(proj) && "non-Proj from mode_T node");
180 if (get_Proj_proj(proj) == pos) {
181 reg = arch_get_irn_register(arch_env, proj);
187 assert(reg && "no out register found");
197 * Returns the name of the in register at position pos.
199 static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
200 const arch_register_t *reg;
202 if (in_out == IN_REG) {
203 reg = get_in_reg(irn, pos);
205 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
206 /* FIXME: works for binop only */
207 assert(2 <= pos && pos <= 3);
208 reg = get_ia32_attr(irn)->x87[pos - 2];
212 /* destination address mode nodes don't have outputs */
213 if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
217 reg = get_out_reg(irn, pos);
218 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
219 reg = get_ia32_attr(irn)->x87[pos + 2];
221 return arch_register_get_name(reg);
225 * Get the register name for a node.
227 static int ia32_get_reg_name(lc_appendable_t *app,
228 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
231 ir_node *irn = arg->v_ptr;
232 int nr = occ->width - 1;
235 return lc_appendable_snadd(app, "(null)", 6);
237 buf = get_ia32_reg_name(irn, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
239 /* append the stupid % to register names */
240 lc_appendable_chadd(app, '%');
241 return lc_appendable_snadd(app, buf, strlen(buf));
245 * Get the x87 register name for a node.
247 static int ia32_get_x87_name(lc_appendable_t *app,
248 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
251 ir_node *irn = arg->v_ptr;
252 int nr = occ->width - 1;
256 return lc_appendable_snadd(app, "(null)", 6);
258 attr = get_ia32_attr(irn);
259 buf = attr->x87[nr]->name;
260 lc_appendable_chadd(app, '%');
261 return lc_appendable_snadd(app, buf, strlen(buf));
265 * Returns the tarval, offset or scale of an ia32 as a string.
267 static int ia32_const_to_str(lc_appendable_t *app,
268 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
271 ir_node *irn = arg->v_ptr;
274 return lc_arg_append(app, occ, "(null)", 6);
276 if (occ->conversion == 'C') {
277 buf = get_ia32_cnst(irn);
280 buf = get_ia32_am_offs(irn);
283 return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
287 * Determines the SSE suffix depending on the mode.
289 static int ia32_get_mode_suffix(lc_appendable_t *app,
290 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
292 ir_node *irn = arg->v_ptr;
293 ir_mode *mode = get_irn_mode(irn);
295 if (mode == mode_T) {
296 mode = (is_ia32_Ld(irn) || is_ia32_St(irn)) ? get_ia32_ls_mode(irn) : get_ia32_res_mode(irn);
300 return lc_arg_append(app, occ, "(null)", 6);
302 if (mode_is_float(mode)) {
303 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
306 return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
311 * Return the ia32 printf arg environment.
312 * We use the firm environment with some additional handlers.
314 const lc_arg_env_t *ia32_get_arg_env(void) {
315 static lc_arg_env_t *env = NULL;
317 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
318 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
319 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
320 static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
323 /* extend the firm printer */
324 env = firm_get_arg_env();
326 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
327 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
328 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
329 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
330 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
331 lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
337 static const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
338 switch(get_mode_size_bits(mode)) {
340 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
342 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
344 return (char *)arch_register_get_name(reg);
349 * Emits registers and/or address mode of a binary operation.
351 const char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
352 static char *buf = NULL;
354 /* verify that this function is never called on non-AM supporting operations */
355 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
357 #define PRODUCES_RESULT(n) \
358 (!(is_ia32_St(n) || \
359 is_ia32_Store8Bit(n) || \
360 is_ia32_CondJmp(n) || \
361 is_ia32_xCondJmp(n) || \
362 is_ia32_SwitchJmp(n)))
365 buf = xcalloc(1, SNPRINTF_BUF_LEN);
368 memset(buf, 0, SNPRINTF_BUF_LEN);
371 switch(get_ia32_op_type(n)) {
373 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
374 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
377 const arch_register_t *in1 = get_in_reg(n, 2);
378 const arch_register_t *in2 = get_in_reg(n, 3);
379 const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
380 const arch_register_t *in;
383 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
384 out = out ? out : in1;
385 in_name = arch_register_get_name(in);
387 if (is_ia32_emit_cl(n)) {
388 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
392 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
396 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
397 assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
398 snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
401 if (PRODUCES_RESULT(n)) {
402 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n, env));
405 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, ia32_emit_am(n, env));
410 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
411 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
412 ia32_emit_am(n, env),
413 is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
414 get_ia32_cnst(n)); /* tell the assembler to store it's address. */
417 const arch_register_t *in1 = get_in_reg(n, 2);
418 ir_mode *mode = get_ia32_res_mode(n);
421 mode = mode ? mode : get_ia32_ls_mode(n);
422 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
424 if (is_ia32_emit_cl(n)) {
425 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
429 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
433 assert(0 && "unsupported op type");
436 #undef PRODUCES_RESULT
442 * Returns the xxx PTR string for a given mode
444 * @param mode the mode
445 * @param x87_insn if non-zero returns the string for a x87 instruction
446 * else for a SSE instruction
448 static const char *pointer_size(ir_mode *mode, int x87_insn)
451 switch (get_mode_size_bits(mode)) {
452 case 8: return "BYTE PTR";
453 case 16: return "WORD PTR";
454 case 32: return "DWORD PTR";
460 case 96: return "XWORD PTR";
461 default: return NULL;
468 * Emits registers and/or address mode of a binary operation.
470 const char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
471 static char *buf = NULL;
473 /* verify that this function is never called on non-AM supporting operations */
474 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
477 buf = xcalloc(1, SNPRINTF_BUF_LEN);
480 memset(buf, 0, SNPRINTF_BUF_LEN);
483 switch(get_ia32_op_type(n)) {
485 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
486 ir_mode *mode = get_ia32_ls_mode(n);
487 const char *p = pointer_size(mode, 1);
488 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s %s", p, get_ia32_cnst(n));
491 ia32_attr_t *attr = get_ia32_attr(n);
492 const arch_register_t *in1 = attr->x87[0];
493 const arch_register_t *in2 = attr->x87[1];
494 const arch_register_t *out = attr->x87[2];
495 const arch_register_t *in;
498 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
499 out = out ? out : in1;
500 in_name = arch_register_get_name(in);
502 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
507 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
510 assert(0 && "unsupported op type");
513 #undef PRODUCES_RESULT
519 * Emits registers and/or address mode of a unary operation.
521 const char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
522 static char *buf = NULL;
525 buf = xcalloc(1, SNPRINTF_BUF_LEN);
528 memset(buf, 0, SNPRINTF_BUF_LEN);
531 switch(get_ia32_op_type(n)) {
533 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
534 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
537 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
541 snprintf(buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
544 assert(0 && "unsupported op type");
551 * Emits address mode.
553 const char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
554 ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
559 static struct obstack *obst = NULL;
560 ir_mode *mode = get_ia32_ls_mode(n);
562 if (! is_ia32_Lea(n))
563 assert(mode && "AM node must have ls_mode attribute set.");
566 obst = xcalloc(1, sizeof(*obst));
569 obstack_free(obst, NULL);
572 /* obstack_free with NULL results in an uninitialized obstack */
575 p = pointer_size(mode, has_x87_register(n));
577 obstack_printf(obst, "%s ", p);
579 /* emit address mode symconst */
580 if (get_ia32_am_sc(n)) {
581 if (is_ia32_am_sc_sign(n))
582 obstack_printf(obst, "-");
583 obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
586 if (am_flav & ia32_B) {
587 obstack_printf(obst, "[");
588 lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
592 if (am_flav & ia32_I) {
594 obstack_printf(obst, "+");
597 obstack_printf(obst, "[");
600 lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
602 if (am_flav & ia32_S) {
603 obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
609 if (am_flav & ia32_O) {
610 s = get_ia32_am_offs(n);
613 /* omit explicit + if there was no base or index */
615 obstack_printf(obst, "[");
620 obstack_printf(obst, s);
626 obstack_printf(obst, "] ");
628 size = obstack_object_size(obst);
629 s = obstack_finish(obst);
638 const char *ia32_emit_adr(const ir_node *irn, ia32_emit_env_t *env)
640 static char buf[SNPRINTF_BUF_LEN];
641 ir_mode *mode = get_ia32_ls_mode(irn);
642 const char *adr = get_ia32_cnst(irn);
643 const char *pref = pointer_size(mode, has_x87_register(irn));
645 snprintf(buf, SNPRINTF_BUF_LEN, "%s %s", pref ? pref : "", adr);
650 * Formated print of commands and comments.
652 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
654 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
657 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
659 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
665 * Add a number to a prefix. This number will not be used a second time.
667 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
668 static unsigned long id = 0;
669 snprintf(buf, buflen, "%s%lu", prefix, ++id);
675 /*************************************************
678 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
679 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
680 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
681 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
683 *************************************************/
686 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
689 * coding of conditions
691 struct cmp2conditon_t {
697 * positive conditions for signed compares
699 static const struct cmp2conditon_t cmp2condition_s[] = {
700 { NULL, pn_Cmp_False }, /* always false */
701 { "e", pn_Cmp_Eq }, /* == */
702 { "l", pn_Cmp_Lt }, /* < */
703 { "le", pn_Cmp_Le }, /* <= */
704 { "g", pn_Cmp_Gt }, /* > */
705 { "ge", pn_Cmp_Ge }, /* >= */
706 { "ne", pn_Cmp_Lg }, /* != */
707 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
708 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
709 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
710 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
711 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
712 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
713 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
714 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
715 { NULL, pn_Cmp_True }, /* always true */
719 * positive conditions for unsigned compares
721 static const struct cmp2conditon_t cmp2condition_u[] = {
722 { NULL, pn_Cmp_False }, /* always false */
723 { "e", pn_Cmp_Eq }, /* == */
724 { "b", pn_Cmp_Lt }, /* < */
725 { "be", pn_Cmp_Le }, /* <= */
726 { "a", pn_Cmp_Gt }, /* > */
727 { "ae", pn_Cmp_Ge }, /* >= */
728 { "ne", pn_Cmp_Lg }, /* != */
729 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
730 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
731 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
732 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
733 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
734 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
735 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
736 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
737 { NULL, pn_Cmp_True }, /* always true */
741 * returns the condition code
743 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
745 assert(cmp2condition_s[cmp_code].num == cmp_code);
746 assert(cmp2condition_u[cmp_code].num == cmp_code);
748 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
752 * Returns the target block for a control flow node.
754 static ir_node *get_cfop_target_block(const ir_node *irn) {
755 return get_irn_link(irn);
759 * Returns the target label for a control flow node.
761 static char *get_cfop_target(const ir_node *irn, char *buf) {
762 ir_node *bl = get_cfop_target_block(irn);
764 snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
768 /** Return the next block in Block schedule */
769 static ir_node *next_blk_sched(const ir_node *block) {
770 return get_irn_link(block);
774 * Returns the Proj with projection number proj and NOT mode_M
776 static ir_node *get_proj(const ir_node *irn, long proj) {
777 const ir_edge_t *edge;
780 assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
782 foreach_out_edge(irn, edge) {
783 src = get_edge_src_irn(edge);
785 assert(is_Proj(src) && "Proj expected");
786 if (get_irn_mode(src) == mode_M)
789 if (get_Proj_proj(src) == proj)
796 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
798 static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
799 const ir_node *proj1, *proj2 = NULL;
800 const ir_node *block, *next_bl = NULL;
801 char buf[SNPRINTF_BUF_LEN];
802 char cmd_buf[SNPRINTF_BUF_LEN];
803 char cmnt_buf[SNPRINTF_BUF_LEN];
805 /* get both Proj's */
806 proj1 = get_proj(irn, pn_Cond_true);
807 assert(proj1 && "CondJmp without true Proj");
809 proj2 = get_proj(irn, pn_Cond_false);
810 assert(proj2 && "CondJmp without false Proj");
812 /* for now, the code works for scheduled and non-schedules blocks */
813 block = get_nodes_block(irn);
815 /* we have a block schedule */
816 next_bl = next_blk_sched(block);
818 if (get_cfop_target_block(proj1) == next_bl) {
819 /* exchange both proj's so the second one can be omitted */
820 const ir_node *t = proj1;
825 /* the first Proj must always be created */
826 if (get_Proj_proj(proj1) == pn_Cond_true) {
827 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
828 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
829 get_cfop_target(proj1, buf));
830 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
833 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
834 get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
835 !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
836 get_cfop_target(proj1, buf));
837 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
841 /* the second Proj might be a fallthrough */
842 if (get_cfop_target_block(proj2) != next_bl) {
843 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
844 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
848 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(proj2, buf));
854 * Emits code for conditional jump.
856 static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
858 char cmd_buf[SNPRINTF_BUF_LEN];
859 char cmnt_buf[SNPRINTF_BUF_LEN];
861 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
862 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
864 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
868 * Emits code for conditional jump with two variables.
870 static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
871 CondJmp_emitter(irn, env);
875 * Emits code for conditional test and jump.
877 static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
879 #define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
882 const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
883 const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
884 char cmd_buf[SNPRINTF_BUF_LEN];
885 char cmnt_buf[SNPRINTF_BUF_LEN];
888 op2 = arch_register_get_name(get_in_reg(irn, 1));
890 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
891 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
894 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
900 * Emits code for conditional test and jump with two variables.
902 static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
903 TestJmp_emitter(irn, env);
906 static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
908 char cmd_buf[SNPRINTF_BUF_LEN];
909 char cmnt_buf[SNPRINTF_BUF_LEN];
911 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
912 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
914 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
917 static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
919 char cmd_buf[SNPRINTF_BUF_LEN];
920 char cmnt_buf[SNPRINTF_BUF_LEN];
922 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
923 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
925 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
929 * Emits code for conditional x87 floating point jump with two variables.
931 static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) {
933 char cmd_buf[SNPRINTF_BUF_LEN];
934 char cmnt_buf[SNPRINTF_BUF_LEN];
935 ia32_attr_t *attr = get_ia32_attr(irn);
936 const char *reg = attr->x87[1]->name;
937 const char *instr = "fcom";
940 switch (get_ia32_pncode(irn)) {
941 case iro_ia32_fcomrJmp:
943 case iro_ia32_fcomJmp:
947 case iro_ia32_fcomrpJmp:
949 case iro_ia32_fcompJmp:
952 case iro_ia32_fcomrppJmp:
954 case iro_ia32_fcomppJmp:
961 set_ia32_pncode(irn, (long)get_negated_pnc(get_ia32_pncode(irn), mode_Is));
963 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s", instr, reg);
964 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
966 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn);
967 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */");
969 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sahf");
970 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store ah into flags */");
973 finish_CondJmp(F, irn, mode_Is);
976 static void CMov_emitter(ir_node *irn, ia32_emit_env_t *env) {
978 const lc_arg_env_t *arg_env = ia32_get_arg_env();
979 const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0))));
981 char cmd_buf[SNPRINTF_BUF_LEN];
982 char cmnt_buf[SNPRINTF_BUF_LEN];
983 const arch_register_t *in1, *in2, *out;
985 out = arch_get_irn_register(env->arch_env, irn);
986 in1 = arch_get_irn_register(env->arch_env, get_irn_n(irn, 2));
987 in2 = arch_get_irn_register(env->arch_env, get_irn_n(irn, 3));
989 /* we have to emit the cmp first, because the destination register */
990 /* could be one of the compare registers */
991 if (is_ia32_CmpCMov(irn)) {
992 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn);
994 else if (is_ia32_xCmpCMov(irn)) {
995 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %1S, %2S", get_irn_n(irn, 0), irn, irn);
998 assert(0 && "unsupported CMov");
1000 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* Psi condition */" );
1003 if (REGS_ARE_EQUAL(out, in2)) {
1004 /* best case: default in == out -> do nothing */
1006 else if (REGS_ARE_EQUAL(out, in1)) {
1007 /* true in == out -> need complement compare and exchange true and default in */
1008 ir_node *t = get_irn_n(irn, 2);
1009 set_irn_n(irn, 2, get_irn_n(irn, 3));
1010 set_irn_n(irn, 3, t);
1012 cmp_suffix = get_cmp_suffix(get_inversed_pnc(get_ia32_pncode(irn)), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0))));
1016 /* out is different from in: need copy default -> out */
1017 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %4S", irn, irn);
1018 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* copy default -> out */" );
1022 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmov%s %1D, %3S", cmp_suffix, irn, irn);
1023 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* condition is true case */" );
1027 static void emit_ia32_CmpCMov(ir_node *irn, ia32_emit_env_t *env) {
1028 CMov_emitter(irn, env);
1031 static void emit_ia32_xCmpCMov(ir_node *irn, ia32_emit_env_t *env) {
1032 CMov_emitter(irn, env);
1035 static void Set_emitter(ir_node *irn, ia32_emit_env_t *env) {
1037 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1038 const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0))));
1039 const char *instr = "xor";
1040 const char *reg8bit;
1042 char cmd_buf[SNPRINTF_BUF_LEN];
1043 char cmnt_buf[SNPRINTF_BUF_LEN];
1044 const arch_register_t *out;
1046 out = arch_get_irn_register(env->arch_env, irn);
1047 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1049 if (env->isa->opt_arch == arch_pentium_4) {
1050 /* P4 prefers sub r, r, others xor r, r */
1054 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %1D", instr, irn, irn);
1055 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */");
1058 if (is_ia32_CmpSet(irn)) {
1059 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
1061 else if (is_ia32_xCmpSet(irn)) {
1062 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %s", get_irn_n(irn, 0), ia32_emit_binop(irn, env));
1065 assert(0 && "unsupported Set");
1067 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* calculate Psi condition */" );
1070 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "set%s %%%s", cmp_suffix, reg8bit);
1071 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* set 1 iff true, 0 otherweise */" );
1075 static void emit_ia32_CmpSet(ir_node *irn, ia32_emit_env_t *env) {
1076 Set_emitter(irn, env);
1079 static void emit_ia32_xCmpSet(ir_node *irn, ia32_emit_env_t *env) {
1080 Set_emitter(irn, env);
1083 static void emit_ia32_xCmp(ir_node *irn, ia32_emit_env_t *env) {
1085 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1087 char cmd_buf[SNPRINTF_BUF_LEN];
1088 char cmnt_buf[SNPRINTF_BUF_LEN];
1090 switch (get_ia32_pncode(irn)) {
1091 case pn_Cmp_Leg: /* odered */
1094 case pn_Cmp_Uo: /* unordered */
1097 case pn_Cmp_Ue: /* == */
1100 case pn_Cmp_Ul: /* < */
1103 case pn_Cmp_Ule: /* <= */
1106 case pn_Cmp_Ug: /* > */
1109 case pn_Cmp_Uge: /* >= */
1112 case pn_Cmp_Ne: /* != */
1117 assert(sse_pnc >= 0 && "unsupported floating point compare");
1119 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmps%M %s, %d", irn, ia32_emit_binop(irn, env), sse_pnc);
1120 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* SSE compare with result in %1D */", irn);
1124 /*********************************************************
1127 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1128 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1129 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1130 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1133 *********************************************************/
1135 /* jump table entry (target and corresponding number) */
1136 typedef struct _branch_t {
1141 /* jump table for switch generation */
1142 typedef struct _jmp_tbl_t {
1143 ir_node *defProj; /**< default target */
1144 int min_value; /**< smallest switch case */
1145 int max_value; /**< largest switch case */
1146 int num_branches; /**< number of jumps */
1147 char *label; /**< label of the jump table */
1148 branch_t *branches; /**< jump array */
1152 * Compare two variables of type branch_t. Used to sort all switch cases
1154 static int ia32_cmp_branch_t(const void *a, const void *b) {
1155 branch_t *b1 = (branch_t *)a;
1156 branch_t *b2 = (branch_t *)b;
1158 if (b1->value <= b2->value)
1165 * Emits code for a SwitchJmp (creates a jump table if
1166 * possible otherwise a cmp-jmp cascade). Port from
1169 static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
1170 unsigned long interval;
1171 char buf[SNPRINTF_BUF_LEN];
1172 int last_value, i, pn;
1175 const ir_edge_t *edge;
1176 const lc_arg_env_t *env = ia32_get_arg_env();
1177 FILE *F = emit_env->out;
1178 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1180 /* fill the table structure */
1181 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1182 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
1184 tbl.num_branches = get_irn_n_edges(irn);
1185 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1186 tbl.min_value = INT_MAX;
1187 tbl.max_value = INT_MIN;
1190 /* go over all proj's and collect them */
1191 foreach_out_edge(irn, edge) {
1192 proj = get_edge_src_irn(edge);
1193 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1195 pn = get_Proj_proj(proj);
1197 /* create branch entry */
1198 tbl.branches[i].target = proj;
1199 tbl.branches[i].value = pn;
1201 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
1202 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
1204 /* check for default proj */
1205 if (pn == get_ia32_pncode(irn)) {
1206 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1213 /* sort the branches by their number */
1214 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1216 /* two-complement's magic make this work without overflow */
1217 interval = tbl.max_value - tbl.min_value;
1219 /* emit the table */
1220 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
1221 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
1224 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
1225 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
1228 if (tbl.num_branches > 1) {
1231 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
1232 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
1235 ia32_switch_section(F, SECTION_RODATA);
1236 fprintf(F, "\t.align 4\n");
1238 fprintf(F, "%s:\n", tbl.label);
1240 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
1241 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
1244 last_value = tbl.branches[0].value;
1245 for (i = 1; i < tbl.num_branches; ++i) {
1246 while (++last_value < tbl.branches[i].value) {
1247 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
1248 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
1251 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
1252 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
1255 ia32_switch_section(F, SECTION_TEXT);
1258 /* one jump is enough */
1259 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
1260 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
1271 * Emits code for a unconditional jump.
1273 static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
1274 ir_node *block, *next_bl;
1276 char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1278 /* for now, the code works for scheduled and non-schedules blocks */
1279 block = get_nodes_block(irn);
1281 /* we have a block schedule */
1282 next_bl = next_blk_sched(block);
1283 if (get_cfop_target_block(irn) != next_bl) {
1284 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
1285 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
1289 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
1294 /****************************
1297 * _ __ _ __ ___ _ ___
1298 * | '_ \| '__/ _ \| |/ __|
1299 * | |_) | | | (_) | |\__ \
1300 * | .__/|_| \___/| ||___/
1303 ****************************/
1306 * Emits code for a proj -> node
1308 static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
1309 ir_node *pred = get_Proj_pred(irn);
1311 if (get_irn_op(pred) == op_Start) {
1312 switch(get_Proj_proj(irn)) {
1313 case pn_Start_X_initial_exec:
1322 /**********************************
1325 * | | ___ _ __ _ _| |_) |
1326 * | | / _ \| '_ \| | | | _ <
1327 * | |___| (_) | |_) | |_| | |_) |
1328 * \_____\___/| .__/ \__, |____/
1331 **********************************/
1334 * Emit movsb/w instructions to make mov count divideable by 4
1336 static void emit_CopyB_prolog(FILE *F, int rem, int size) {
1337 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1339 fprintf(F, "\t/* memcopy %d bytes*/\n", size);
1341 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
1342 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
1347 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1348 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
1351 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1352 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
1355 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1356 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1358 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1359 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1367 * Emit rep movsd instruction for memcopy.
1369 static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
1370 FILE *F = emit_env->out;
1371 tarval *tv = get_ia32_Immop_tarval(irn);
1372 int rem = get_tarval_long(tv);
1373 ir_node *size_node = get_irn_n(irn, 2);
1375 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1377 /* beware: size_node could be a be_Copy to fulfill constraints for ecx */
1378 size_node = be_is_Copy(size_node) ? be_get_Copy_op(size_node) : size_node;
1379 size = get_tarval_long(get_ia32_Immop_tarval(size_node));
1381 emit_CopyB_prolog(F, rem, size);
1383 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
1384 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
1389 * Emits unrolled memcopy.
1391 static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
1392 tarval *tv = get_ia32_Immop_tarval(irn);
1393 int size = get_tarval_long(tv);
1394 FILE *F = emit_env->out;
1395 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1397 emit_CopyB_prolog(F, size & 0x3, size);
1401 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
1402 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
1409 /***************************
1413 * | | / _ \| '_ \ \ / /
1414 * | |___| (_) | | | \ V /
1415 * \_____\___/|_| |_|\_/
1417 ***************************/
1420 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1422 static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1423 FILE *F = emit_env->out;
1424 const lc_arg_env_t *env = ia32_get_arg_env();
1425 ir_mode *src_mode = get_ia32_src_mode(irn);
1426 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1427 char *from, *to, buf[64];
1428 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1430 from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
1431 to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
1433 switch(get_ia32_op_type(irn)) {
1435 lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
1437 case ia32_AddrModeS:
1438 lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
1441 assert(0 && "unsupported op type for Conv");
1444 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
1445 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
1449 static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1450 emit_ia32_Conv_with_FP(irn, emit_env);
1453 static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1454 emit_ia32_Conv_with_FP(irn, emit_env);
1457 static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1458 emit_ia32_Conv_with_FP(irn, emit_env);
1462 * Emits code for an Int conversion.
1464 static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1465 FILE *F = emit_env->out;
1466 const lc_arg_env_t *env = ia32_get_arg_env();
1467 char *move_cmd = "movzx";
1468 char *conv_cmd = NULL;
1469 ir_mode *src_mode = get_ia32_src_mode(irn);
1470 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1472 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1473 const arch_register_t *in_reg, *out_reg;
1475 n = get_mode_size_bits(src_mode);
1476 m = get_mode_size_bits(tgt_mode);
1478 if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
1480 if (n == 8 || m == 8)
1482 else if (n == 16 || m == 16)
1485 assert(0 && "unsupported Conv_I2I");
1488 switch(get_ia32_op_type(irn)) {
1490 in_reg = get_in_reg(irn, 2);
1491 out_reg = get_out_reg(irn, 0);
1493 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1494 REGS_ARE_EQUAL(out_reg, in_reg) &&
1495 mode_is_signed(n < m ? src_mode : tgt_mode))
1497 /* argument and result are both in EAX and */
1498 /* signedness is ok: -> use converts */
1499 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
1501 else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
1502 ! mode_is_signed(n < m ? src_mode : tgt_mode))
1504 /* argument and result are in the same register */
1505 /* and signedness is ok: -> use and with mask */
1506 int mask = (1 << (n < m ? n : m)) - 1;
1507 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
1510 /* use move w/o sign extension */
1511 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
1512 move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
1516 case ia32_AddrModeS:
1517 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
1518 move_cmd, irn, ia32_emit_am(irn, emit_env));
1521 assert(0 && "unsupported op type for Conv");
1524 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
1525 irn, n, src_mode, m, tgt_mode);
1531 * Emits code for an 8Bit Int conversion.
1533 void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
1534 emit_ia32_Conv_I2I(irn, emit_env);
1538 /*******************************************
1541 * | |__ ___ _ __ ___ __| | ___ ___
1542 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1543 * | |_) | __/ | | | (_) | (_| | __/\__ \
1544 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1546 *******************************************/
1549 * Emits a backend call
1551 static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
1552 FILE *F = emit_env->out;
1553 entity *ent = be_Call_get_entity(irn);
1554 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1557 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
1560 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
1563 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
1569 * Emits code to increase stack pointer.
1571 static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1572 FILE *F = emit_env->out;
1573 unsigned offs = be_get_IncSP_offset(irn);
1574 be_stack_dir_t dir = be_get_IncSP_direction(irn);
1575 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1578 if (dir == be_stack_dir_expand)
1579 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
1581 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
1582 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
1585 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
1586 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
1593 * Emits code to set stack pointer.
1595 static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1596 FILE *F = emit_env->out;
1597 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1599 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1600 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
1605 * Emits code for Copy.
1607 static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
1608 FILE *F = emit_env->out;
1609 const arch_env_t *aenv = emit_env->arch_env;
1610 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1612 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))) ||
1613 be_is_unknown_reg(arch_get_irn_register(aenv, be_get_Copy_op(irn))))
1616 if (mode_is_float(get_irn_mode(irn)))
1617 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
1619 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
1620 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1625 * Emits code for exchange.
1627 static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
1628 FILE *F = emit_env->out;
1629 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1631 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
1632 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
1637 * Emits code for Constant loading.
1639 static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) {
1641 char cmd_buf[256], cmnt_buf[256];
1642 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1644 if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) {
1645 const char *instr = "xor";
1646 if (env->isa->opt_arch == arch_pentium_4) {
1647 /* P4 prefers sub r, r, others xor r, r */
1650 lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n);
1651 lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */");
1654 if (get_ia32_op_type(n) == ia32_SymConst) {
1655 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n);
1656 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */");
1659 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n);
1660 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */");
1663 lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n);
1666 static void emit_be_Return(const ir_node *n, ia32_emit_env_t *env) {
1668 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1670 lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", "ret", "/* be_Return */", n, n);
1675 /***********************************************************************************
1678 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1679 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1680 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1681 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1683 ***********************************************************************************/
1686 * Enters the emitter functions for handled nodes into the generic
1687 * pointer of an opcode.
1689 static void ia32_register_emitters(void) {
1691 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1692 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1693 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1694 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1696 /* first clear the generic function pointer for all ops */
1697 clear_irp_opcodes_generic_func();
1699 /* register all emitter functions defined in spec */
1700 ia32_register_spec_emitters();
1702 /* other ia32 emitter functions */
1709 IA32_EMIT(SwitchJmp);
1712 IA32_EMIT(Conv_I2FP);
1713 IA32_EMIT(Conv_FP2I);
1714 IA32_EMIT(Conv_FP2FP);
1715 IA32_EMIT(Conv_I2I);
1716 IA32_EMIT(Conv_I2I8Bit);
1720 IA32_EMIT(xCmpCMov);
1721 IA32_EMIT2(fcomJmp, x87CondJmp);
1722 IA32_EMIT2(fcompJmp, x87CondJmp);
1723 IA32_EMIT2(fcomppJmp, x87CondJmp);
1724 IA32_EMIT2(fcomrJmp, x87CondJmp);
1725 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1726 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1728 /* benode emitter */
1747 * Emits code for a node.
1749 static void ia32_emit_node(const ir_node *irn, void *env) {
1750 ia32_emit_env_t *emit_env = env;
1751 FILE *F = emit_env->out;
1752 ir_op *op = get_irn_op(irn);
1753 DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
1755 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
1757 if (op->ops.generic) {
1758 void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
1762 ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
1767 * Emits gas alignment directives
1769 static void ia32_emit_alignment(FILE *F, unsigned align, unsigned skip) {
1770 fprintf(F, "\t.p2align %u,,%u\n", align, skip);
1774 * Emits gas alignment directives for Functions depended on cpu architecture.
1776 static void ia32_emit_align_func(FILE *F, cpu_support cpu) {
1777 unsigned align; unsigned maximum_skip;
1779 /* gcc doesn't emit alignment for p4 ?*/
1780 if (cpu == arch_pentium_4)
1785 align = 2; maximum_skip = 3;
1788 align = 4; maximum_skip = 15;
1791 align = 5; maximum_skip = 31;
1794 align = 4; maximum_skip = 15;
1796 ia32_emit_alignment(F, align, maximum_skip);
1800 * Emits gas alignment directives for Labels depended on cpu architecture.
1802 static void ia32_emit_align_label(FILE *F, cpu_support cpu) {
1803 unsigned align; unsigned maximum_skip;
1805 /* gcc doesn't emit alignment for p4 ?*/
1806 if (cpu == arch_pentium_4)
1811 align = 2; maximum_skip = 3;
1814 align = 4; maximum_skip = 15;
1817 align = 5; maximum_skip = 7;
1820 align = 4; maximum_skip = 7;
1822 ia32_emit_alignment(F, align, maximum_skip);
1826 * Walks over the nodes in a block connected by scheduling edges
1827 * and emits code for each node.
1829 static void ia32_gen_block(ir_node *block, void *env) {
1830 ia32_emit_env_t *emit_env = env;
1832 int need_label = block != get_irg_start_block(get_irn_irg(block));
1834 if (! is_Block(block))
1837 if (need_label && (emit_env->cg->opt & IA32_OPT_EXTBB)) {
1838 /* if the extended block scheduler is used, only leader blocks need
1840 need_label = (block == get_extbb_leader(get_nodes_extbb(block)));
1844 ia32_emit_align_label(emit_env->out, emit_env->isa->opt_arch);
1845 fprintf(emit_env->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
1848 sched_foreach(block, irn) {
1849 ia32_emit_node(irn, env);
1854 * Emits code for function start.
1856 static void ia32_emit_func_prolog(FILE *F, ir_graph *irg, cpu_support cpu) {
1857 entity *irg_ent = get_irg_entity(irg);
1858 const char *irg_name = get_entity_ld_name(irg_ent);
1861 ia32_switch_section(F, SECTION_TEXT);
1862 ia32_emit_align_func(F, cpu);
1863 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1864 fprintf(F, ".globl %s\n", irg_name);
1866 ia32_dump_function_object(F, irg_name);
1867 fprintf(F, "%s:\n", irg_name);
1871 * Emits code for function end
1873 static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
1874 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
1876 ia32_dump_function_size(F, irg_name);
1882 * Sets labels for control flow nodes (jump target)
1883 * TODO: Jump optimization
1885 static void ia32_gen_labels(ir_node *block, void *env) {
1887 int n = get_Block_n_cfgpreds(block);
1889 for (n--; n >= 0; n--) {
1890 pred = get_Block_cfgpred(block, n);
1891 set_irn_link(pred, block);
1896 * Main driver. Emits the code for one routine.
1898 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
1899 ia32_emit_env_t emit_env;
1903 emit_env.arch_env = cg->arch_env;
1905 emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
1906 FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
1908 /* set the global arch_env (needed by print hooks) */
1909 arch_env = cg->arch_env;
1911 ia32_register_emitters();
1913 ia32_emit_func_prolog(F, irg, emit_env.isa->opt_arch);
1914 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
1916 if ((cg->opt & IA32_OPT_EXTBB) && cg->blk_sched) {
1917 int i, n = ARR_LEN(cg->blk_sched);
1919 for (i = 0; i < n;) {
1922 block = cg->blk_sched[i];
1924 next_bl = i < n ? cg->blk_sched[i] : NULL;
1926 /* set here the link. the emitter expects to find the next block here */
1927 set_irn_link(block, next_bl);
1928 ia32_gen_block(block, &emit_env);
1932 /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
1933 in the block schedule. As this number should NEVER be equal the next block,
1934 we does not need a clear block link here. */
1935 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
1938 ia32_emit_func_epilog(F, irg);