11 #include "../besched.h"
13 #include "ia32_emitter.h"
14 #include "gen_ia32_emitter.h"
15 #include "ia32_nodes_attr.h"
16 #include "ia32_new_nodes.h"
17 #include "ia32_map_regs.h"
19 #define SNPRINTF_BUF_LEN 128
21 static const arch_env_t *arch_env = NULL;
24 /*************************************************************
26 * (_) | | / _| | | | |
27 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
28 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
29 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
30 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
33 *************************************************************/
36 * Return node's tarval as string.
38 const char *node_const_to_str(ir_node *n) {
40 tarval *tv = get_ia32_Immop_tarval(n);
43 buf = malloc(SNPRINTF_BUF_LEN);
44 tarval_snprintf(buf, SNPRINTF_BUF_LEN, tv);
47 else if (get_ia32_old_ir(n)) {
48 return get_sc_name(get_ia32_old_ir(n));
55 * Returns node's offset as string.
57 char *node_offset_to_str(ir_node *n) {
59 tarval *tv = get_ia32_offs(n);
62 buf = malloc(SNPRINTF_BUF_LEN);
63 tarval_snprintf(buf, SNPRINTF_BUF_LEN, tv);
70 /* We always pass the ir_node which is a pointer. */
71 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
72 return lc_arg_type_ptr;
77 * Returns the register at in position pos.
79 static const arch_register_t *get_in_reg(ir_node *irn, int pos) {
81 const arch_register_t *reg = NULL;
83 assert(get_irn_arity(irn) > pos && "Invalid IN position");
85 /* The out register of the operator at position pos is the
86 in register we need. */
87 op = get_irn_n(irn, pos);
89 reg = arch_get_irn_register(arch_env, op);
91 assert(reg && "no in register found");
96 * Returns the register at out position pos.
98 static const arch_register_t *get_out_reg(ir_node *irn, int pos) {
100 const arch_register_t *reg = NULL;
102 assert(get_irn_n_edges(irn) > pos && "Invalid OUT position");
104 /* 1st case: irn is not of mode_T, so it has only */
105 /* one OUT register -> good */
106 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
107 /* Proj with the corresponding projnum for the register */
109 if (get_irn_mode(irn) != mode_T) {
110 reg = arch_get_irn_register(arch_env, irn);
112 else if (is_ia32_irn(irn)) {
113 reg = get_ia32_out_reg(irn, pos);
116 const ir_edge_t *edge;
118 foreach_out_edge(irn, edge) {
119 proj = get_edge_src_irn(edge);
120 assert(is_Proj(proj) && "non-Proj from mode_T node");
121 if (get_Proj_proj(proj) == pos) {
122 reg = arch_get_irn_register(arch_env, proj);
128 assert(reg && "no out register found");
133 * Returns the number of the in register at position pos.
135 int get_ia32_reg_nr(ir_node *irn, int pos, int in_out) {
136 const arch_register_t *reg;
140 /* special case Proj P_fame_base */
141 op = get_irn_n(irn, pos);
142 if (is_Proj(op) && get_Proj_proj(op) == pn_Start_P_frame_base) {
146 reg = get_in_reg(irn, pos);
149 reg = get_out_reg(irn, pos);
152 return arch_register_get_index(reg);
156 * Returns the name of the in register at position pos.
158 const char *get_ia32_reg_name(ir_node *irn, int pos, int in_out) {
159 const arch_register_t *reg;
163 /* special case Proj P_fame_base */
164 op = get_irn_n(irn, pos);
165 if (is_Proj(op) && get_Proj_proj(op) == pn_Start_P_frame_base) {
168 reg = get_in_reg(irn, pos);
171 reg = get_out_reg(irn, pos);
174 return arch_register_get_name(reg);
178 * Get the register name for a node.
180 static int ia32_get_reg_name(lc_appendable_t *app,
181 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
184 ir_node *X = arg->v_ptr;
185 int nr = occ->width - 1;
188 return lc_arg_append(app, occ, "(null)", 6);
190 if (occ->conversion == 's') {
191 buf = get_ia32_reg_name(X, nr, 1);
194 buf = get_ia32_reg_name(X, nr, 0);
197 lc_appendable_chadd(app, '%');
198 return lc_arg_append(app, occ, buf, strlen(buf));
202 * Returns the tarval or offset of an ia32 as a string.
204 static int ia32_const_to_str(lc_appendable_t *app,
205 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
208 ir_node *X = arg->v_ptr;
211 return lc_arg_append(app, occ, "(null)", 6);
213 if (occ->conversion == 'c') {
214 buf = node_const_to_str(X);
217 buf = node_offset_to_str(X);
220 return lc_arg_append(app, occ, buf, strlen(buf));
224 * Determines the SSE suffix depending on the mode.
226 static int ia32_get_mode_suffix(lc_appendable_t *app,
227 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
229 ir_node *X = arg->v_ptr;
232 return lc_arg_append(app, occ, "(null)", 6);
234 if (get_mode_size_bits(get_irn_mode(X)) == 32)
235 return lc_appendable_chadd(app, 's');
237 return lc_appendable_chadd(app, 'd');
241 * Return the ia32 printf arg environment.
242 * We use the firm environment with some additional handlers.
244 const lc_arg_env_t *ia32_get_arg_env(void) {
245 static lc_arg_env_t *env = NULL;
247 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
248 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
249 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
252 /* extend the firm printer */
253 env = firm_get_arg_env();
255 lc_arg_register(env, "ia32:sreg", 's', &ia32_reg_handler);
256 lc_arg_register(env, "ia32:dreg", 'd', &ia32_reg_handler);
257 lc_arg_register(env, "ia32:cnst", 'c', &ia32_const_handler);
258 lc_arg_register(env, "ia32:offs", 'o', &ia32_const_handler);
259 lc_arg_register(env, "ia32:mode", 'm', &ia32_mode_handler);
266 * For 2-address code we need to make sure the first src reg is equal to dest reg.
268 void equalize_dest_src(FILE *F, ir_node *n) {
269 if (get_ia32_reg_nr(n, 0, 1) != get_ia32_reg_nr(n, 0, 0)) {
270 if (get_irn_arity(n) > 1 && get_ia32_reg_nr(n, 1, 1) == get_ia32_reg_nr(n, 0, 0)) {
271 if (! is_op_commutative(get_irn_op(n))) {
272 /* we only need to exchange for non-commutative ops */
273 lc_efprintf(ia32_get_arg_env(), F, "\txchg %1s, %2s\t\t\t/* xchg src1 <-> src2 for 2 address code */\n", n, n);
277 lc_efprintf(ia32_get_arg_env(), F, "\tmovl %1s, %1d\t\t\t/* src -> dest for 2 address code */\n", n, n);
283 * Add a number to a prefix. This number will not be used a second time.
285 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
286 static unsigned long id = 0;
287 snprintf(buf, buflen, "%s%lu", prefix, ++id);
292 /*************************************************
295 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
296 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
297 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
298 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
300 *************************************************/
303 * coding of conditions
305 struct cmp2conditon_t {
311 * positive conditions for signed compares
313 static const struct cmp2conditon_t cmp2condition_s[] = {
314 { NULL, pn_Cmp_False }, /* always false */
315 { "e", pn_Cmp_Eq }, /* == */
316 { "l", pn_Cmp_Lt }, /* < */
317 { "le", pn_Cmp_Le }, /* <= */
318 { "g", pn_Cmp_Gt }, /* > */
319 { "ge", pn_Cmp_Ge }, /* >= */
320 { "ne", pn_Cmp_Lg }, /* != */
321 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
322 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
323 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
324 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
325 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
326 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
327 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
328 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
329 { NULL, pn_Cmp_True }, /* always true */
333 * positive conditions for unsigned compares
335 static const struct cmp2conditon_t cmp2condition_u[] = {
336 { NULL, pn_Cmp_False }, /* always false */
337 { "e", pn_Cmp_Eq }, /* == */
338 { "b", pn_Cmp_Lt }, /* < */
339 { "be", pn_Cmp_Le }, /* <= */
340 { "a", pn_Cmp_Gt }, /* > */
341 { "ae", pn_Cmp_Ge }, /* >= */
342 { "ne", pn_Cmp_Lg }, /* != */
343 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
344 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
345 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
346 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
347 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
348 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
349 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
350 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
351 { NULL, pn_Cmp_True }, /* always true */
355 * returns the condition code
357 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
359 assert(cmp2condition_s[cmp_code].num == cmp_code);
360 assert(cmp2condition_u[cmp_code].num == cmp_code);
362 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
366 * Returns the target label for a control flow node.
368 static char *get_cfop_target(const ir_node *irn, char *buf) {
369 ir_node *bl = get_irn_link(irn);
371 snprintf(buf, SNPRINTF_BUF_LEN, "BLOCK_%ld", get_irn_node_nr(bl));
376 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
378 static void finish_CondJmp(FILE *F, ir_node *irn) {
380 const ir_edge_t *edge;
381 char buf[SNPRINTF_BUF_LEN];
383 edge = get_irn_out_edge_first(irn);
384 proj = get_edge_src_irn(edge);
385 assert(is_Proj(proj) && "CondJmp with a non-Proj");
387 if (get_Proj_proj(proj) == 1) {
388 fprintf(F, "\tj%s %s\t\t\t/* cmp(a, b) == TRUE */\n",
389 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
390 get_cfop_target(proj, buf));
393 fprintf(F, "\tjn%s %s\t\t\t/* cmp(a, b) == FALSE */\n",
394 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
395 get_cfop_target(proj, buf));
398 edge = get_irn_out_edge_next(irn, edge);
400 proj = get_edge_src_irn(edge);
401 assert(is_Proj(proj) && "CondJmp with a non-Proj");
402 fprintf(F, "\tjmp %s\t\t\t/* otherwise */\n", get_cfop_target(proj, buf));
407 * Emits code for conditional jump with two variables.
409 static void emit_ia32_CondJmp(ir_node *irn, emit_env_t *env) {
412 lc_efprintf(ia32_get_arg_env(), F, "\tcmp %2s, %1s\t\t\t/* CondJmp(%+F, %+F) */\n", irn, irn,
413 get_irn_n(irn, 0), get_irn_n(irn, 1));
414 finish_CondJmp(F, irn);
418 * Emits code for conditional jump with immediate.
420 void emit_ia32_CondJmp_i(ir_node *irn, emit_env_t *env) {
423 lc_efprintf(ia32_get_arg_env(), F, "\tcmp %c, %1s\t\t\t/* CondJmp_i(%+F) */\n", irn, irn, get_irn_n(irn, 0));
424 finish_CondJmp(F, irn);
429 /*********************************************************
432 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
433 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
434 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
435 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
438 *********************************************************/
440 /* jump table entry (target and corresponding number) */
441 typedef struct _branch_t {
446 /* jump table for switch generation */
447 typedef struct _jmp_tbl_t {
448 ir_node *defProj; /**< default target */
449 int min_value; /**< smallest switch case */
450 int max_value; /**< largest switch case */
451 int num_branches; /**< number of jumps */
452 char *label; /**< label of the jump table */
453 branch_t *branches; /**< jump array */
457 * Compare two variables of type branch_t. Used to sort all switch cases
459 static int ia32_cmp_branch_t(const void *a, const void *b) {
460 branch_t *b1 = (branch_t *)a;
461 branch_t *b2 = (branch_t *)b;
463 if (b1->value <= b2->value)
470 * Emits code for a SwitchJmp (creates a jump table if
471 * possible otherwise a cmp-jmp cascade). Port from
474 void emit_ia32_SwitchJmp(const ir_node *irn, emit_env_t *emit_env) {
475 unsigned long interval;
476 char buf[SNPRINTF_BUF_LEN];
477 int last_value, i, pn, do_jmp_tbl = 1;
480 const ir_edge_t *edge;
481 const lc_arg_env_t *env = ia32_get_arg_env();
482 FILE *F = emit_env->out;
484 /* fill the table structure */
485 tbl.label = malloc(SNPRINTF_BUF_LEN);
486 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
488 tbl.num_branches = get_irn_n_edges(irn);
489 tbl.branches = calloc(tbl.num_branches, sizeof(tbl.branches[0]));
490 tbl.min_value = INT_MAX;
491 tbl.max_value = INT_MIN;
494 /* go over all proj's and collect them */
495 foreach_out_edge(irn, edge) {
496 proj = get_edge_src_irn(edge);
497 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
499 pn = get_Proj_proj(proj);
501 /* create branch entry */
502 tbl.branches[i].target = proj;
503 tbl.branches[i].value = pn;
505 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
506 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
508 /* check for default proj */
509 if (pn == get_ia32_pncode(irn)) {
510 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
517 /* sort the branches by their number */
518 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
520 /* two-complement's magic make this work without overflow */
521 interval = tbl.max_value - tbl.min_value;
523 /* check value interval */
524 if (interval > 16 * 1024) {
528 /* check ratio of value interval to number of branches */
529 if ((float)(interval + 1) / (float)tbl.num_branches > 8.0) {
535 if (tbl.min_value != 0) {
536 fprintf(F, "\tcmpl %lu, -%d", interval, tbl.min_value);
537 lc_efprintf(env, F, "(%1s)\t\t/* first switch value is not 0 */\n", irn);
540 fprintf(F, "\tcmpl %lu, ", interval);
541 lc_efprintf(env, F, "%1s\t\t\t/* compare for switch */\n", irn);
544 fprintf(F, "\tja %s\t\t\t/* default jump if out of range */\n", get_cfop_target(tbl.defProj, buf));
546 if (tbl.num_branches > 1) {
549 fprintf(F, "\tjmp *%s", tbl.label);
550 lc_efprintf(env, F, "(,%1s,4)\t\t/* get jump table entry as target */\n", irn);
552 fprintf(F, "\t.section\t.rodata\t\t/* start jump table */\n");
553 fprintf(F, "\t.align 4\n");
555 fprintf(F, "%s:\n", tbl.label);
556 fprintf(F, "\t.long %s\t\t\t/* case %d */\n", get_cfop_target(tbl.branches[0].target, buf), tbl.branches[0].value);
558 last_value = tbl.branches[0].value;
559 for (i = 1; i < tbl.num_branches; ++i) {
560 while (++last_value < tbl.branches[i].value) {
561 fprintf(F, "\t.long %s\t\t/* default case */\n", get_cfop_target(tbl.defProj, buf));
563 fprintf(F, "\t.long %s\t\t\t/* case %d */\n", get_cfop_target(tbl.branches[i].target, buf), last_value);
566 fprintf(F, "\t.text\t\t\t\t/* end of jump table */\n");
569 /* one jump is enough */
570 fprintf(F, "\tjmp %s\t\t/* only one case given */\n", get_cfop_target(tbl.branches[0].target, buf));
573 else { // no jump table
574 for (i = 0; i < tbl.num_branches; ++i) {
575 fprintf(F, "\tcmpl %d, ", tbl.branches[i].value);
576 lc_efprintf(env, F, "%1s", irn);
577 fprintf(F, "\t\t\t/* case %d */\n", tbl.branches[i].value);
578 fprintf(F, "\tje %s\n", get_cfop_target(tbl.branches[i].target, buf));
581 fprintf(F, "\tjmp %s\t\t\t/* default case */\n", get_cfop_target(tbl.defProj, buf));
591 * Emits code for a unconditional jump.
593 void emit_Jmp(ir_node *irn, emit_env_t *env) {
596 char buf[SNPRINTF_BUF_LEN];
597 ir_fprintf(F, "\tjmp %s\t\t\t/* Jmp(%+F) */\n", get_cfop_target(irn, buf), get_irn_link(irn));
602 /****************************
605 * _ __ _ __ ___ _ ___
606 * | '_ \| '__/ _ \| |/ __|
607 * | |_) | | | (_) | |\__ \
608 * | .__/|_| \___/| ||___/
611 ****************************/
614 * Emits code for a proj -> node
616 void emit_Proj(ir_node *irn, emit_env_t *env) {
617 ir_node *pred = get_Proj_pred(irn);
619 if (get_irn_opcode(pred) == iro_Start) {
620 switch(get_Proj_proj(irn)) {
621 case pn_Start_X_initial_exec:
632 /***********************************************************************************
635 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
636 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
637 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
638 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
640 ***********************************************************************************/
643 * Emits code for a node.
645 void ia32_emit_node(ir_node *irn, void *env) {
646 emit_env_t *emit_env = env;
647 firm_dbg_module_t *mod = emit_env->mod;
648 FILE *F = emit_env->out;
650 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
652 #define IA32_EMIT(a) if (is_ia32_##a(irn)) { emit_ia32_##a(irn, emit_env); return; }
653 #define EMIT(a) if (get_irn_opcode(irn) == iro_##a) { emit_##a(irn, emit_env); return; }
655 /* generated int emitter functions */
704 /* generated floating point emitter */
720 /* other emitter functions */
722 IA32_EMIT(CondJmp_i);
723 IA32_EMIT(SwitchJmp);
728 ir_fprintf(F, "\t\t\t\t\t/* %+F */\n", irn);
732 * Walks over the nodes in a block connected by scheduling edges
733 * and emits code for each node.
735 void ia32_gen_block(ir_node *block, void *env) {
738 if (! is_Block(block))
741 fprintf(((emit_env_t *)env)->out, "BLOCK_%ld:\n", get_irn_node_nr(block));
742 sched_foreach(block, irn) {
743 ia32_emit_node(irn, env);
749 * Emits code for function start.
751 void ia32_emit_start(FILE *F, ir_graph *irg) {
752 const char *irg_name = get_entity_name(get_irg_entity(irg));
754 fprintf(F, "\t.text\n");
755 fprintf(F, ".globl %s\n", irg_name);
756 fprintf(F, "\t.type\t%s, @function\n", irg_name);
757 fprintf(F, "%s:\n", irg_name);
761 * Emits code for function end
763 void ia32_emit_end(FILE *F, ir_graph *irg) {
764 const char *irg_name = get_entity_name(get_irg_entity(irg));
766 fprintf(F, "\tret\n");
767 fprintf(F, "\t.size\t%s, .-%s\n\n", irg_name, irg_name);
771 * Sets labels for control flow nodes (jump target)
772 * TODO: Jump optimization
774 void ia32_gen_labels(ir_node *block, void *env) {
776 int n = get_Block_n_cfgpreds(block);
778 for (n--; n >= 0; n--) {
779 pred = get_Block_cfgpred(block, n);
780 set_irn_link(pred, block);
787 void ia32_gen_routine(FILE *F, ir_graph *irg, const arch_env_t *env) {
790 emit_env.mod = firm_dbg_register("ir.be.codegen.ia32");
792 emit_env.arch_env = env;
796 ia32_emit_start(F, irg);
797 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
798 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
799 ia32_emit_end(F, irg);