2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 /* in case of a joker register: just return a valid register */
90 if (arch_register_type_is(reg, joker)) {
91 const arch_register_req_t *req;
93 /* ask for the requirements */
94 req = arch_get_register_req(arch_env, irn, pos);
96 if (arch_register_req_is(req, limited)) {
97 /* in case of limited requirements: get the first allowed register */
98 unsigned idx = rbitset_next(req->limited, 0, 1);
99 reg = arch_register_for_index(req->cls, idx);
101 /* otherwise get first register in class */
102 reg = arch_register_for_index(req->cls, 0);
110 * Returns the register at out position pos.
113 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
116 const arch_env_t *arch_env = env->arch_env;
118 const arch_register_t *reg = NULL;
120 /* 1st case: irn is not of mode_T, so it has only */
121 /* one OUT register -> good */
122 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
123 /* Proj with the corresponding projnum for the register */
125 if (get_irn_mode(irn) != mode_T) {
126 reg = arch_get_irn_register(arch_env, irn);
127 } else if (is_ia32_irn(irn)) {
128 reg = get_ia32_out_reg(irn, pos);
130 const ir_edge_t *edge;
132 foreach_out_edge(irn, edge) {
133 proj = get_edge_src_irn(edge);
134 assert(is_Proj(proj) && "non-Proj from mode_T node");
135 if (get_Proj_proj(proj) == pos) {
136 reg = arch_get_irn_register(arch_env, proj);
142 assert(reg && "no out register found");
147 * Determine the gnu assembler suffix that indicates a mode
150 char get_mode_suffix(const ir_mode *mode) {
151 if(mode_is_float(mode)) {
152 switch(get_mode_size_bits(mode)) {
161 assert(mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode));
162 switch(get_mode_size_bits(mode)) {
173 panic("Can't output mode_suffix for %+F\n", mode);
177 int produces_result(const ir_node *node) {
178 return !(is_ia32_St(node) ||
179 is_ia32_CondJmp(node) ||
180 is_ia32_xCondJmp(node) ||
181 is_ia32_CmpSet(node) ||
182 is_ia32_xCmpSet(node) ||
183 is_ia32_SwitchJmp(node));
187 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
188 const arch_register_t *reg) {
189 switch(get_mode_size_bits(mode)) {
191 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
193 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
195 return (char *)arch_register_get_name(reg);
200 * Add a number to a prefix. This number will not be used a second time.
203 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
204 static unsigned long id = 0;
205 snprintf(buf, buflen, "%s%lu", prefix, ++id);
209 /*************************************************************
211 * (_) | | / _| | | | |
212 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
213 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
214 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
215 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
218 *************************************************************/
220 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
221 // be_emit_env_t* so we cheat a bit...
222 #define be_emit_char(env,c) be_emit_char(env->emit,c)
223 #define be_emit_string(env,s) be_emit_string(env->emit,s)
224 #undef be_emit_cstring
225 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
226 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
227 #define be_emit_tarval(env,tv) be_emit_tarval(env->emit,tv)
228 #define be_emit_write_line(env) be_emit_write_line(env->emit)
229 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
230 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
232 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
234 const arch_register_t *reg = get_in_reg(env, node, pos);
235 const char *reg_name = arch_register_get_name(reg);
237 assert(pos < get_irn_arity(node));
239 be_emit_char(env, '%');
240 be_emit_string(env, reg_name);
243 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
244 const arch_register_t *reg = get_out_reg(env, node, pos);
245 const char *reg_name = arch_register_get_name(reg);
247 be_emit_char(env, '%');
248 be_emit_string(env, reg_name);
251 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
253 const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
256 be_emit_char(env, '%');
257 be_emit_string(env, attr->x87[pos]->name);
260 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
266 be_emit_char(env, '$');
268 switch(get_ia32_immop_type(node)) {
270 tv = get_ia32_Immop_tarval(node);
271 be_emit_tarval(env, tv);
273 case ia32_ImmSymConst:
274 ent = get_ia32_Immop_symconst(node);
275 mark_entity_visited(ent);
276 id = get_entity_ld_ident(ent);
277 be_emit_ident(env, id);
284 be_emit_string(env, "BAD");
289 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
291 be_emit_char(env, get_mode_suffix(mode));
294 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
296 ir_mode *mode = get_ia32_ls_mode(node);
300 ia32_emit_mode_suffix_mode(env, mode);
303 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
305 ir_mode *mode = get_ia32_ls_mode(node);
307 ia32_emit_mode_suffix_mode(env, mode);
311 char get_xmm_mode_suffix(ir_mode *mode)
313 assert(mode_is_float(mode));
314 switch(get_mode_size_bits(mode)) {
325 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
327 ir_mode *mode = get_ia32_ls_mode(node);
328 assert(mode != NULL);
329 be_emit_char(env, 's');
330 be_emit_char(env, get_xmm_mode_suffix(mode));
333 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
335 ir_mode *mode = get_ia32_ls_mode(node);
336 assert(mode != NULL);
337 be_emit_char(env, get_xmm_mode_suffix(mode));
340 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
342 if(get_mode_size_bits(mode) == 32)
344 if(mode_is_signed(mode)) {
345 be_emit_char(env, 's');
347 be_emit_char(env, 'z');
352 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
354 switch (be_gas_flavour) {
355 case GAS_FLAVOUR_NORMAL:
356 be_emit_cstring(env, "\t.type\t");
357 be_emit_string(env, name);
358 be_emit_cstring(env, ", @function\n");
359 be_emit_write_line(env);
361 case GAS_FLAVOUR_MINGW:
362 be_emit_cstring(env, "\t.def\t");
363 be_emit_string(env, name);
364 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
365 be_emit_write_line(env);
373 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
375 switch (be_gas_flavour) {
376 case GAS_FLAVOUR_NORMAL:
377 be_emit_cstring(env, "\t.size\t");
378 be_emit_string(env, name);
379 be_emit_cstring(env, ", .-");
380 be_emit_string(env, name);
381 be_emit_char(env, '\n');
382 be_emit_write_line(env);
391 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node);
394 * Emits registers and/or address mode of a binary operation.
396 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
397 const ir_node *right_op;
399 switch(get_ia32_op_type(node)) {
401 right_op = get_irn_n(node, 3);
402 if(is_ia32_Immediate(right_op)) {
403 emit_ia32_Immediate(env, right_op);
404 be_emit_cstring(env, ", ");
405 ia32_emit_source_register(env, node, 2);
407 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
408 ia32_emit_immediate(env, node);
409 be_emit_cstring(env, ", ");
410 ia32_emit_source_register(env, node, 2);
412 const arch_register_t *in1 = get_in_reg(env, node, 2);
413 const arch_register_t *in2 = get_in_reg(env, node, 3);
414 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
415 const arch_register_t *in;
418 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
419 out = out ? out : in1;
420 in_name = arch_register_get_name(in);
422 if (is_ia32_emit_cl(node)) {
423 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
427 be_emit_char(env, '%');
428 be_emit_string(env, in_name);
429 be_emit_cstring(env, ", %");
430 be_emit_string(env, arch_register_get_name(out));
434 ia32_emit_am(env, node);
435 be_emit_cstring(env, ", ");
436 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
437 assert(!produces_result(node) && "Source AM with Const must not produce result");
438 ia32_emit_immediate(env, node);
439 } else if (produces_result(node)) {
440 ia32_emit_dest_register(env, node, 0);
442 ia32_emit_source_register(env, node, 2);
446 right_op = get_irn_n(node, 3);
447 if(is_ia32_Immediate(right_op)) {
448 emit_ia32_Immediate(env, right_op);
449 be_emit_cstring(env, ", ");
450 ia32_emit_am(env, node);
452 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
453 ia32_emit_immediate(env, node);
454 be_emit_cstring(env, ", ");
455 ia32_emit_am(env, node);
457 const arch_register_t *in1 = get_in_reg(env, node,
458 get_irn_arity(node) == 5 ? 3 : 2);
459 ir_mode *mode = get_ia32_ls_mode(node);
462 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
464 if (is_ia32_emit_cl(node)) {
465 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
469 be_emit_char(env, '%');
470 be_emit_string(env, in_name);
471 be_emit_cstring(env, ", ");
472 ia32_emit_am(env, node);
476 assert(0 && "unsupported op type");
481 * Emits registers and/or address mode of a binary operation.
483 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
484 switch(get_ia32_op_type(node)) {
486 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
487 // should not happen...
490 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
491 const arch_register_t *in1 = x87_attr->x87[0];
492 const arch_register_t *in2 = x87_attr->x87[1];
493 const arch_register_t *out = x87_attr->x87[2];
494 const arch_register_t *in;
496 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
497 out = out ? out : in1;
499 be_emit_char(env, '%');
500 be_emit_string(env, arch_register_get_name(in));
501 be_emit_cstring(env, ", %");
502 be_emit_string(env, arch_register_get_name(out));
507 ia32_emit_am(env, node);
510 assert(0 && "unsupported op type");
514 void ia32_emit_am_or_dest_register(ia32_emit_env_t *env, const ir_node *node,
516 if(get_ia32_op_type(node) == ia32_Normal) {
517 ia32_emit_dest_register(env, node, pos);
519 assert(get_ia32_op_type(node) == ia32_AddrModeD);
520 ia32_emit_am(env, node);
525 * Emits registers and/or address mode of a unary operation.
527 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node, int pos) {
530 switch(get_ia32_op_type(node)) {
532 op = get_irn_n(node, pos);
533 if (is_ia32_Immediate(op)) {
534 emit_ia32_Immediate(env, op);
535 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
536 ia32_emit_immediate(env, node);
538 ia32_emit_source_register(env, node, pos);
543 ia32_emit_am(env, node);
546 assert(0 && "unsupported op type");
551 * Emits address mode.
553 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
554 ir_entity *ent = get_ia32_am_sc(node);
555 int offs = get_ia32_am_offs_int(node);
556 ir_node *base = get_irn_n(node, 0);
557 int has_base = !is_ia32_NoReg_GP(base);
558 ir_node *index = get_irn_n(node, 1);
559 int has_index = !is_ia32_NoReg_GP(index);
561 /* just to be sure... */
562 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
568 mark_entity_visited(ent);
569 id = get_entity_ld_ident(ent);
570 if (is_ia32_am_sc_sign(node))
571 be_emit_char(env, '-');
572 be_emit_ident(env, id);
574 if(get_entity_owner(ent) == get_tls_type()) {
575 if (get_entity_visibility(ent) == visibility_external_allocated) {
576 be_emit_cstring(env, "@INDNTPOFF");
578 be_emit_cstring(env, "@NTPOFF");
585 be_emit_irprintf(env->emit, "%+d", offs);
587 be_emit_irprintf(env->emit, "%d", offs);
591 if (has_base || has_index) {
592 be_emit_char(env, '(');
596 ia32_emit_source_register(env, node, 0);
599 /* emit index + scale */
602 be_emit_char(env, ',');
603 ia32_emit_source_register(env, node, 1);
605 scale = get_ia32_am_scale(node);
607 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
610 be_emit_char(env, ')');
614 /*************************************************
617 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
618 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
619 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
620 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
622 *************************************************/
625 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
628 * coding of conditions
630 struct cmp2conditon_t {
636 * positive conditions for signed compares
639 const struct cmp2conditon_t cmp2condition_s[] = {
640 { NULL, pn_Cmp_False }, /* always false */
641 { "e", pn_Cmp_Eq }, /* == */
642 { "l", pn_Cmp_Lt }, /* < */
643 { "le", pn_Cmp_Le }, /* <= */
644 { "g", pn_Cmp_Gt }, /* > */
645 { "ge", pn_Cmp_Ge }, /* >= */
646 { "ne", pn_Cmp_Lg }, /* != */
647 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
648 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
649 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
650 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
651 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
652 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
653 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
654 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
655 { NULL, pn_Cmp_True }, /* always true */
659 * positive conditions for unsigned compares
662 const struct cmp2conditon_t cmp2condition_u[] = {
663 { NULL, pn_Cmp_False }, /* always false */
664 { "e", pn_Cmp_Eq }, /* == */
665 { "b", pn_Cmp_Lt }, /* < */
666 { "be", pn_Cmp_Le }, /* <= */
667 { "a", pn_Cmp_Gt }, /* > */
668 { "ae", pn_Cmp_Ge }, /* >= */
669 { "ne", pn_Cmp_Lg }, /* != */
670 { NULL, pn_Cmp_True }, /* always true */
674 * returns the condition code
677 const char *get_cmp_suffix(pn_Cmp cmp_code)
679 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
680 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
682 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
683 return cmp2condition_u[cmp_code & 7].name;
685 return cmp2condition_s[cmp_code & 15].name;
689 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
691 be_emit_string(env, get_cmp_suffix(pnc));
696 * Returns the target block for a control flow node.
699 ir_node *get_cfop_target_block(const ir_node *irn) {
700 return get_irn_link(irn);
704 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
706 be_emit_cstring(env, BLOCK_PREFIX);
707 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
711 * Returns the target label for a control flow node.
714 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
715 ir_node *block = get_cfop_target_block(node);
717 ia32_emit_block_name(env, block);
720 /** Return the next block in Block schedule */
721 static ir_node *next_blk_sched(const ir_node *block) {
722 return get_irn_link(block);
726 * Returns the Proj with projection number proj and NOT mode_M
729 ir_node *get_proj(const ir_node *node, long proj) {
730 const ir_edge_t *edge;
733 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
735 foreach_out_edge(node, edge) {
736 src = get_edge_src_irn(edge);
738 assert(is_Proj(src) && "Proj expected");
739 if (get_irn_mode(src) == mode_M)
742 if (get_Proj_proj(src) == proj)
749 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
752 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
754 const ir_node *proj_true;
755 const ir_node *proj_false;
756 const ir_node *block;
757 const ir_node *next_block;
760 /* get both Proj's */
761 proj_true = get_proj(node, pn_Cond_true);
762 assert(proj_true && "CondJmp without true Proj");
764 proj_false = get_proj(node, pn_Cond_false);
765 assert(proj_false && "CondJmp without false Proj");
767 /* for now, the code works for scheduled and non-schedules blocks */
768 block = get_nodes_block(node);
770 /* we have a block schedule */
771 next_block = next_blk_sched(block);
773 if (get_cfop_target_block(proj_true) == next_block) {
774 /* exchange both proj's so the second one can be omitted */
775 const ir_node *t = proj_true;
777 proj_true = proj_false;
780 pnc = get_negated_pnc(pnc, mode);
783 /* in case of unordered compare, check for parity */
784 if (pnc & pn_Cmp_Uo) {
785 be_emit_cstring(env, "\tjp ");
786 ia32_emit_cfop_target(env, proj_true);
787 be_emit_finish_line_gas(env, proj_true);
790 be_emit_cstring(env, "\tj");
791 ia32_emit_cmp_suffix(env, pnc);
792 be_emit_char(env, ' ');
793 ia32_emit_cfop_target(env, proj_true);
794 be_emit_finish_line_gas(env, proj_true);
796 /* the second Proj might be a fallthrough */
797 if (get_cfop_target_block(proj_false) != next_block) {
798 be_emit_cstring(env, "\tjmp ");
799 ia32_emit_cfop_target(env, proj_false);
800 be_emit_finish_line_gas(env, proj_false);
802 be_emit_cstring(env, "\t/* fallthrough to ");
803 ia32_emit_cfop_target(env, proj_false);
804 be_emit_cstring(env, " */");
805 be_emit_finish_line_gas(env, proj_false);
810 * Emits code for conditional jump.
813 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
814 be_emit_cstring(env, "\tcmp ");
815 ia32_emit_binop(env, node);
816 be_emit_finish_line_gas(env, node);
818 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
822 * Emits code for conditional jump with two variables.
825 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
826 CondJmp_emitter(env, node);
830 * Emits code for conditional test and jump.
833 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
834 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
835 be_emit_cstring(env, "\ttest ");
836 ia32_emit_immediate(env, node);
837 be_emit_cstring(env, ", ");
838 ia32_emit_source_register(env, node, 0);
839 be_emit_finish_line_gas(env, node);
841 be_emit_cstring(env, "\ttest ");
842 ia32_emit_source_register(env, node, 1);
843 be_emit_cstring(env, ", ");
844 ia32_emit_source_register(env, node, 0);
845 be_emit_finish_line_gas(env, node);
847 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
851 * Emits code for conditional test and jump with two variables.
854 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
855 TestJmp_emitter(env, node);
859 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
860 be_emit_cstring(env, "/* omitted redundant test */");
861 be_emit_finish_line_gas(env, node);
863 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
867 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
868 be_emit_cstring(env, "/* omitted redundant test/cmp */");
869 be_emit_finish_line_gas(env, node);
871 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
875 * Emits code for conditional SSE floating point jump with two variables.
878 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
879 be_emit_cstring(env, "\tucomi");
880 ia32_emit_xmm_mode_suffix(env, node);
881 be_emit_char(env, ' ');
882 ia32_emit_binop(env, node);
883 be_emit_finish_line_gas(env, node);
885 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
889 * Emits code for conditional x87 floating point jump with two variables.
892 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
893 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
894 const char *reg = x87_attr->x87[1]->name;
895 long pnc = get_ia32_pncode(node);
897 switch (get_ia32_irn_opcode(node)) {
898 case iro_ia32_fcomrJmp:
899 pnc = get_inversed_pnc(pnc);
900 reg = x87_attr->x87[0]->name;
901 case iro_ia32_fcomJmp:
903 be_emit_cstring(env, "\tfucom ");
905 case iro_ia32_fcomrpJmp:
906 pnc = get_inversed_pnc(pnc);
907 reg = x87_attr->x87[0]->name;
908 case iro_ia32_fcompJmp:
909 be_emit_cstring(env, "\tfucomp ");
911 case iro_ia32_fcomrppJmp:
912 pnc = get_inversed_pnc(pnc);
913 case iro_ia32_fcomppJmp:
914 be_emit_cstring(env, "\tfucompp ");
920 be_emit_char(env, '%');
921 be_emit_string(env, reg);
923 be_emit_finish_line_gas(env, node);
925 be_emit_cstring(env, "\tfnstsw %ax");
926 be_emit_finish_line_gas(env, node);
927 be_emit_cstring(env, "\tsahf");
928 be_emit_finish_line_gas(env, node);
930 finish_CondJmp(env, node, mode_E, pnc);
934 void emit_register_or_immediate(ia32_emit_env_t *env, const ir_node *node,
937 ir_node *op = get_irn_n(node, pos);
938 if(is_ia32_Immediate(op)) {
939 emit_ia32_Immediate(env, op);
941 ia32_emit_source_register(env, node, pos);
946 int is_ia32_Immediate_0(const ir_node *node)
948 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
949 tarval *tv = attr->offset;
951 if(tv == NULL || attr->symconst != NULL)
954 return classify_tarval(tv) == CNST_NULL;
958 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node)
960 long pnc = get_ia32_pncode(node);
961 const arch_register_t *in1, *in2, *out;
963 out = arch_get_irn_register(env->arch_env, node);
964 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 2));
965 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 3));
967 /* we have to emit the cmp first, because the destination register */
968 /* could be one of the compare registers */
969 if (is_ia32_CmpCMov(node)) {
970 long pncr = pnc & ~ia32_pn_Cmp_Unsigned;
971 ir_node *cmp_right = get_irn_n(node, 1);
973 if( (pncr == pn_Cmp_Eq || pncr == pn_Cmp_Lg)
974 && is_ia32_Immediate(cmp_right)
975 && is_ia32_Immediate_0(cmp_right)) {
976 be_emit_cstring(env, "\ttest ");
977 ia32_emit_source_register(env, node, 0);
978 be_emit_cstring(env, ", ");
979 ia32_emit_source_register(env, node, 0);
981 be_emit_cstring(env, "\tcmp ");
982 emit_register_or_immediate(env, node, 1);
983 be_emit_cstring(env, ", ");
984 ia32_emit_source_register(env, node, 0);
986 } else if (is_ia32_xCmpCMov(node)) {
987 be_emit_cstring(env, "\tucomis");
988 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
989 be_emit_char(env, ' ');
990 ia32_emit_source_register(env, node, 1);
991 be_emit_cstring(env, ", ");
992 ia32_emit_source_register(env, node, 0);
994 assert(0 && "unsupported CMov");
996 be_emit_finish_line_gas(env, node);
998 if (REGS_ARE_EQUAL(out, in2)) {
999 /* best case: default in == out -> do nothing */
1000 } else if (REGS_ARE_EQUAL(out, in1)) {
1001 ir_node *n = (ir_node*) node;
1002 /* true in == out -> need complement compare and exchange true and default in */
1003 ir_node *t = get_irn_n(n, 2);
1004 set_irn_n(n, 2, get_irn_n(n, 3));
1007 pnc = get_negated_pnc(pnc, get_irn_mode(node));
1009 /* out is different from in: need copy default -> out */
1010 be_emit_cstring(env, "\tmovl ");
1011 ia32_emit_source_register(env, node, n_ia32_CmpCMov_val_false);
1012 be_emit_cstring(env, ", ");
1013 ia32_emit_dest_register(env, node, 0);
1014 be_emit_finish_line_gas(env, node);
1017 be_emit_cstring(env, "\tcmov");
1018 ia32_emit_cmp_suffix(env, pnc);
1019 be_emit_cstring(env, "l ");
1020 ia32_emit_source_register(env, node, n_ia32_CmpCMov_val_true);
1021 be_emit_cstring(env, ", ");
1022 ia32_emit_dest_register(env, node, 0);
1023 be_emit_finish_line_gas(env, node);
1027 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node)
1029 CMov_emitter(env, node);
1033 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node)
1035 CMov_emitter(env, node);
1039 void Set_emitter(ia32_emit_env_t *env, const ir_node *node)
1041 long pnc = get_ia32_pncode(node);
1042 const char *reg8bit;
1043 const arch_register_t *out;
1045 out = arch_get_irn_register(env->arch_env, node);
1046 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1048 if (is_ia32_CmpSet(node)) {
1049 long pncr = pnc & ~ia32_pn_Cmp_Unsigned;
1050 ir_node *cmp_right = get_irn_n(node, n_ia32_CmpSet_cmp_right);
1052 if( (pncr == pn_Cmp_Eq || pncr == pn_Cmp_Lg)
1053 && is_ia32_Immediate(cmp_right)
1054 && is_ia32_Immediate_0(cmp_right)) {
1055 be_emit_cstring(env, "\ttest ");
1056 ia32_emit_source_register(env, node, n_ia32_CmpSet_cmp_left);
1057 be_emit_cstring(env, ", ");
1058 ia32_emit_source_register(env, node, n_ia32_CmpSet_cmp_left);
1060 be_emit_cstring(env, "\tcmp ");
1061 ia32_emit_binop(env, node);
1063 } else if (is_ia32_xCmpSet(node)) {
1064 be_emit_cstring(env, "\tucomis");
1065 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1066 be_emit_char(env, ' ');
1067 ia32_emit_binop(env, node);
1069 assert(0 && "unsupported Set");
1071 be_emit_finish_line_gas(env, node);
1073 /* use mov to clear target because it doesn't affect the eflags */
1074 be_emit_cstring(env, "\tmovl $0, %");
1075 be_emit_string(env, arch_register_get_name(out));
1076 be_emit_finish_line_gas(env, node);
1078 be_emit_cstring(env, "\tset");
1079 ia32_emit_cmp_suffix(env, pnc);
1080 be_emit_cstring(env, " %");
1081 be_emit_string(env, reg8bit);
1082 be_emit_finish_line_gas(env, node);
1086 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1087 Set_emitter(env, node);
1091 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1092 Set_emitter(env, node);
1096 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1098 long pnc = get_ia32_pncode(node);
1099 long unord = pnc & pn_Cmp_Uo;
1101 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1104 case pn_Cmp_Leg: /* odered */
1107 case pn_Cmp_Uo: /* unordered */
1111 case pn_Cmp_Eq: /* == */
1115 case pn_Cmp_Lt: /* < */
1119 case pn_Cmp_Le: /* <= */
1123 case pn_Cmp_Gt: /* > */
1127 case pn_Cmp_Ge: /* >= */
1131 case pn_Cmp_Lg: /* != */
1136 assert(sse_pnc >= 0 && "unsupported compare");
1138 if (unord && sse_pnc != 3) {
1140 We need a separate compare against unordered.
1141 Quick and Dirty solution:
1142 - get some memory on stack
1146 - and result and stored result
1149 be_emit_cstring(env, "\tsubl $8, %esp");
1150 be_emit_finish_line_gas(env, node);
1152 be_emit_cstring(env, "\tcmpsd $3, ");
1153 ia32_emit_binop(env, node);
1154 be_emit_finish_line_gas(env, node);
1156 be_emit_cstring(env, "\tmovsd ");
1157 ia32_emit_dest_register(env, node, 0);
1158 be_emit_cstring(env, ", (%esp)");
1159 be_emit_finish_line_gas(env, node);
1162 be_emit_cstring(env, "\tcmpsd ");
1163 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1164 ia32_emit_binop(env, node);
1165 be_emit_finish_line_gas(env, node);
1167 if (unord && sse_pnc != 3) {
1168 be_emit_cstring(env, "\tandpd (%esp), ");
1169 ia32_emit_dest_register(env, node, 0);
1170 be_emit_finish_line_gas(env, node);
1172 be_emit_cstring(env, "\taddl $8, %esp");
1173 be_emit_finish_line_gas(env, node);
1177 /*********************************************************
1180 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1181 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1182 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1183 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1186 *********************************************************/
1188 /* jump table entry (target and corresponding number) */
1189 typedef struct _branch_t {
1194 /* jump table for switch generation */
1195 typedef struct _jmp_tbl_t {
1196 ir_node *defProj; /**< default target */
1197 long min_value; /**< smallest switch case */
1198 long max_value; /**< largest switch case */
1199 long num_branches; /**< number of jumps */
1200 char *label; /**< label of the jump table */
1201 branch_t *branches; /**< jump array */
1205 * Compare two variables of type branch_t. Used to sort all switch cases
1208 int ia32_cmp_branch_t(const void *a, const void *b) {
1209 branch_t *b1 = (branch_t *)a;
1210 branch_t *b2 = (branch_t *)b;
1212 if (b1->value <= b2->value)
1219 * Emits code for a SwitchJmp (creates a jump table if
1220 * possible otherwise a cmp-jmp cascade). Port from
1224 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1225 unsigned long interval;
1230 const ir_edge_t *edge;
1232 /* fill the table structure */
1233 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1234 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1236 tbl.num_branches = get_irn_n_edges(node);
1237 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1238 tbl.min_value = INT_MAX;
1239 tbl.max_value = INT_MIN;
1242 /* go over all proj's and collect them */
1243 foreach_out_edge(node, edge) {
1244 proj = get_edge_src_irn(edge);
1245 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1247 pnc = get_Proj_proj(proj);
1249 /* create branch entry */
1250 tbl.branches[i].target = proj;
1251 tbl.branches[i].value = pnc;
1253 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1254 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1256 /* check for default proj */
1257 if (pnc == get_ia32_pncode(node)) {
1258 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1265 /* sort the branches by their number */
1266 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1268 /* two-complement's magic make this work without overflow */
1269 interval = tbl.max_value - tbl.min_value;
1271 /* emit the table */
1272 be_emit_cstring(env, "\tcmpl $");
1273 be_emit_irprintf(env->emit, "%u, ", interval);
1274 ia32_emit_source_register(env, node, 0);
1275 be_emit_finish_line_gas(env, node);
1277 be_emit_cstring(env, "\tja ");
1278 ia32_emit_cfop_target(env, tbl.defProj);
1279 be_emit_finish_line_gas(env, node);
1281 if (tbl.num_branches > 1) {
1283 be_emit_cstring(env, "\tjmp *");
1284 be_emit_string(env, tbl.label);
1285 be_emit_cstring(env, "(,");
1286 ia32_emit_source_register(env, node, 0);
1287 be_emit_cstring(env, ",4)");
1288 be_emit_finish_line_gas(env, node);
1290 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1291 be_emit_cstring(env, "\t.align 4\n");
1292 be_emit_write_line(env);
1294 be_emit_string(env, tbl.label);
1295 be_emit_cstring(env, ":\n");
1296 be_emit_write_line(env);
1298 be_emit_cstring(env, ".long ");
1299 ia32_emit_cfop_target(env, tbl.branches[0].target);
1300 be_emit_finish_line_gas(env, NULL);
1302 last_value = tbl.branches[0].value;
1303 for (i = 1; i < tbl.num_branches; ++i) {
1304 while (++last_value < tbl.branches[i].value) {
1305 be_emit_cstring(env, ".long ");
1306 ia32_emit_cfop_target(env, tbl.defProj);
1307 be_emit_finish_line_gas(env, NULL);
1309 be_emit_cstring(env, ".long ");
1310 ia32_emit_cfop_target(env, tbl.branches[i].target);
1311 be_emit_finish_line_gas(env, NULL);
1313 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1315 /* one jump is enough */
1316 be_emit_cstring(env, "\tjmp ");
1317 ia32_emit_cfop_target(env, tbl.branches[0].target);
1318 be_emit_finish_line_gas(env, node);
1328 * Emits code for a unconditional jump.
1331 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1332 ir_node *block, *next_block;
1334 /* for now, the code works for scheduled and non-schedules blocks */
1335 block = get_nodes_block(node);
1337 /* we have a block schedule */
1338 next_block = next_blk_sched(block);
1339 if (get_cfop_target_block(node) != next_block) {
1340 be_emit_cstring(env, "\tjmp ");
1341 ia32_emit_cfop_target(env, node);
1343 be_emit_cstring(env, "\t/* fallthrough to ");
1344 ia32_emit_cfop_target(env, node);
1345 be_emit_cstring(env, " */");
1347 be_emit_finish_line_gas(env, node);
1351 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node)
1353 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
1355 assert(attr->symconst != NULL || attr->offset != NULL);
1356 if(attr->symconst != NULL) {
1357 ident *id = get_entity_ld_ident(attr->symconst);
1359 if(attr->attr.data.am_sc_sign)
1360 be_emit_char(env, '-');
1361 be_emit_ident(env, id);
1363 if(attr->offset != NULL) {
1364 if(attr->symconst != NULL)
1365 be_emit_char(env, '+');
1367 be_emit_char(env, '$');
1368 be_emit_tarval(env, attr->offset);
1373 const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
1376 const arch_register_t *reg;
1377 const char *reg_name;
1381 const ia32_attr_t *attr;
1388 /* parse modifiers */
1391 ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node);
1392 be_emit_char(env, '%');
1395 be_emit_char(env, '%');
1415 ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier "
1416 "'%c' for asm op\n", node, c);
1422 sscanf(s, "%d%n", &num, &p);
1424 ir_fprintf(stderr, "Warning: Couldn't parse assembler operand (%+F)\n",
1432 attr = get_ia32_attr_const(node);
1433 n_outs = ARR_LEN(attr->slots);
1435 reg = get_out_reg(env, node, num);
1438 int in = num - n_outs;
1439 if(in >= get_irn_arity(node)) {
1440 ir_fprintf(stderr, "Warning: Invalid input %d specified in asm "
1441 "op (%+F)\n", num, node);
1444 pred = get_irn_n(node, in);
1445 /* might be an immediate value */
1446 if(is_ia32_Immediate(pred)) {
1447 emit_ia32_Immediate(env, pred);
1450 reg = get_in_reg(env, node, in);
1453 ir_fprintf(stderr, "Warning: no register assigned for %d asm op "
1454 "(%+F)\n", num, node);
1459 be_emit_char(env, '%');
1462 reg_name = arch_register_get_name(reg);
1465 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
1468 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit_high, reg);
1471 reg_name = ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
1474 panic("Invalid asm op modifier");
1476 be_emit_string(env, reg_name);
1482 * Emits code for an ASM pseudo op.
1485 void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node)
1487 const void *gen_attr = get_irn_generic_attr_const(node);
1488 const ia32_asm_attr_t *attr
1489 = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, gen_attr);
1490 ident *asm_text = attr->asm_text;
1491 const char *s = get_id_str(asm_text);
1493 be_emit_cstring(env, "# Begin ASM \t");
1494 be_emit_finish_line_gas(env, node);
1497 be_emit_char(env, '\t');
1501 s = emit_asm_operand(env, node, s);
1504 be_emit_char(env, *s);
1509 be_emit_char(env, '\n');
1510 be_emit_write_line(env);
1512 be_emit_cstring(env, "# End ASM\n");
1513 be_emit_write_line(env);
1516 /**********************************
1519 * | | ___ _ __ _ _| |_) |
1520 * | | / _ \| '_ \| | | | _ <
1521 * | |___| (_) | |_) | |_| | |_) |
1522 * \_____\___/| .__/ \__, |____/
1525 **********************************/
1528 * Emit movsb/w instructions to make mov count divideable by 4
1531 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1532 be_emit_cstring(env, "\tcld");
1533 be_emit_finish_line_gas(env, NULL);
1537 be_emit_cstring(env, "\tmovsb");
1538 be_emit_finish_line_gas(env, NULL);
1541 be_emit_cstring(env, "\tmovsw");
1542 be_emit_finish_line_gas(env, NULL);
1545 be_emit_cstring(env, "\tmovsb");
1546 be_emit_finish_line_gas(env, NULL);
1547 be_emit_cstring(env, "\tmovsw");
1548 be_emit_finish_line_gas(env, NULL);
1554 * Emit rep movsd instruction for memcopy.
1557 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1558 tarval *tv = get_ia32_Immop_tarval(node);
1559 int rem = get_tarval_long(tv);
1561 emit_CopyB_prolog(env, rem);
1563 be_emit_cstring(env, "\trep movsd");
1564 be_emit_finish_line_gas(env, node);
1568 * Emits unrolled memcopy.
1571 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1572 tarval *tv = get_ia32_Immop_tarval(node);
1573 int size = get_tarval_long(tv);
1575 emit_CopyB_prolog(env, size & 0x3);
1579 be_emit_cstring(env, "\tmovsd");
1580 be_emit_finish_line_gas(env, NULL);
1586 /***************************
1590 * | | / _ \| '_ \ \ / /
1591 * | |___| (_) | | | \ V /
1592 * \_____\___/|_| |_|\_/
1594 ***************************/
1597 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1600 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1601 ir_mode *ls_mode = get_ia32_ls_mode(node);
1602 int ls_bits = get_mode_size_bits(ls_mode);
1604 be_emit_cstring(env, "\tcvt");
1606 if(is_ia32_Conv_I2FP(node)) {
1608 be_emit_cstring(env, "si2ss");
1610 be_emit_cstring(env, "si2sd");
1612 } else if(is_ia32_Conv_FP2I(node)) {
1614 be_emit_cstring(env, "ss2si");
1616 be_emit_cstring(env, "sd2si");
1619 assert(is_ia32_Conv_FP2FP(node));
1621 be_emit_cstring(env, "sd2ss");
1623 be_emit_cstring(env, "ss2sd");
1626 be_emit_char(env, ' ');
1628 switch(get_ia32_op_type(node)) {
1630 ia32_emit_source_register(env, node, 2);
1631 be_emit_cstring(env, ", ");
1632 ia32_emit_dest_register(env, node, 0);
1634 case ia32_AddrModeS:
1635 ia32_emit_dest_register(env, node, 0);
1636 be_emit_cstring(env, ", ");
1637 ia32_emit_am(env, node);
1640 assert(0 && "unsupported op type for Conv");
1642 be_emit_finish_line_gas(env, node);
1646 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1647 emit_ia32_Conv_with_FP(env, node);
1651 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1652 emit_ia32_Conv_with_FP(env, node);
1656 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1657 emit_ia32_Conv_with_FP(env, node);
1661 * Emits code for an Int conversion.
1664 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1665 const char *sign_suffix;
1666 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1667 int smaller_bits = get_mode_size_bits(smaller_mode);
1669 const arch_register_t *in_reg, *out_reg;
1671 assert(!mode_is_float(smaller_mode));
1672 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1674 signed_mode = mode_is_signed(smaller_mode);
1675 if(smaller_bits == 32) {
1676 // this should not happen as it's no convert
1680 sign_suffix = signed_mode ? "s" : "z";
1683 switch(get_ia32_op_type(node)) {
1685 in_reg = get_in_reg(env, node, 2);
1686 out_reg = get_out_reg(env, node, 0);
1688 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1689 REGS_ARE_EQUAL(out_reg, in_reg) &&
1693 /* argument and result are both in EAX and */
1694 /* signedness is ok: -> use the smaller cwtl opcode */
1695 be_emit_cstring(env, "\tcwtl");
1697 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1699 be_emit_cstring(env, "\tmov");
1700 be_emit_string(env, sign_suffix);
1701 ia32_emit_mode_suffix_mode(env, smaller_mode);
1702 be_emit_cstring(env, "l %");
1703 be_emit_string(env, sreg);
1704 be_emit_cstring(env, ", ");
1705 ia32_emit_dest_register(env, node, 0);
1708 case ia32_AddrModeS: {
1709 be_emit_cstring(env, "\tmov");
1710 be_emit_string(env, sign_suffix);
1711 ia32_emit_mode_suffix_mode(env, smaller_mode);
1712 be_emit_cstring(env, "l %");
1713 ia32_emit_am(env, node);
1714 be_emit_cstring(env, ", ");
1715 ia32_emit_dest_register(env, node, 0);
1719 assert(0 && "unsupported op type for Conv");
1721 be_emit_finish_line_gas(env, node);
1725 * Emits code for an 8Bit Int conversion.
1727 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1728 emit_ia32_Conv_I2I(env, node);
1732 /*******************************************
1735 * | |__ ___ _ __ ___ __| | ___ ___
1736 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1737 * | |_) | __/ | | | (_) | (_| | __/\__ \
1738 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1740 *******************************************/
1743 * Emits a backend call
1746 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1747 ir_entity *ent = be_Call_get_entity(node);
1749 be_emit_cstring(env, "\tcall ");
1751 mark_entity_visited(ent);
1752 be_emit_string(env, get_entity_ld_name(ent));
1754 be_emit_char(env, '*');
1755 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1757 be_emit_finish_line_gas(env, node);
1761 * Emits code to increase stack pointer.
1764 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1765 int offs = be_get_IncSP_offset(node);
1771 be_emit_cstring(env, "\tsubl $");
1772 be_emit_irprintf(env->emit, "%u, ", offs);
1773 ia32_emit_source_register(env, node, 0);
1775 be_emit_cstring(env, "\taddl $");
1776 be_emit_irprintf(env->emit, "%u, ", -offs);
1777 ia32_emit_source_register(env, node, 0);
1779 be_emit_finish_line_gas(env, node);
1783 * Emits code to set stack pointer.
1786 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1787 be_emit_cstring(env, "\tmovl ");
1788 ia32_emit_source_register(env, node, 2);
1789 be_emit_cstring(env, ", ");
1790 ia32_emit_dest_register(env, node, 0);
1791 be_emit_finish_line_gas(env, node);
1795 * Emits code for Copy/CopyKeep.
1798 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1800 const arch_env_t *aenv = env->arch_env;
1803 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1804 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1807 mode = get_irn_mode(node);
1808 if (mode == mode_E) {
1809 be_emit_cstring(env, "\tmovsd ");
1810 ia32_emit_source_register(env, node, 0);
1811 be_emit_cstring(env, ", ");
1812 ia32_emit_dest_register(env, node, 0);
1814 be_emit_cstring(env, "\tmovl ");
1815 ia32_emit_source_register(env, node, 0);
1816 be_emit_cstring(env, ", ");
1817 ia32_emit_dest_register(env, node, 0);
1819 be_emit_finish_line_gas(env, node);
1823 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1824 Copy_emitter(env, node, be_get_Copy_op(node));
1828 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1829 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1833 * Emits code for exchange.
1836 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1837 const arch_register_t *in1, *in2;
1838 const arch_register_class_t *cls1, *cls2;
1840 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1841 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1843 cls1 = arch_register_get_class(in1);
1844 cls2 = arch_register_get_class(in2);
1846 assert(cls1 == cls2 && "Register class mismatch at Perm");
1848 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1849 be_emit_cstring(env, "\txchg ");
1850 ia32_emit_source_register(env, node, 1);
1851 be_emit_cstring(env, ", ");
1852 ia32_emit_source_register(env, node, 0);
1853 be_emit_finish_line_gas(env, node);
1854 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1855 be_emit_cstring(env, "\txorpd ");
1856 ia32_emit_source_register(env, node, 1);
1857 be_emit_cstring(env, ", ");
1858 ia32_emit_source_register(env, node, 0);
1859 be_emit_finish_line_gas(env, NULL);
1861 be_emit_cstring(env, "\txorpd ");
1862 ia32_emit_source_register(env, node, 0);
1863 be_emit_cstring(env, ", ");
1864 ia32_emit_source_register(env, node, 1);
1865 be_emit_finish_line_gas(env, NULL);
1867 be_emit_cstring(env, "\txorpd ");
1868 ia32_emit_source_register(env, node, 1);
1869 be_emit_cstring(env, ", ");
1870 ia32_emit_source_register(env, node, 0);
1871 be_emit_finish_line_gas(env, node);
1872 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1874 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1880 * Emits code for Constant loading.
1883 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1884 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1886 if (imm_tp == ia32_ImmSymConst) {
1887 be_emit_cstring(env, "\tmovl ");
1888 ia32_emit_immediate(env, node);
1889 be_emit_cstring(env, ", ");
1890 ia32_emit_dest_register(env, node, 0);
1892 tarval *tv = get_ia32_Immop_tarval(node);
1893 assert(get_irn_mode(node) == mode_Iu);
1894 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1895 if (tarval_is_null(tv)) {
1896 if (env->isa->opt_arch == arch_pentium_4) {
1897 /* P4 prefers sub r, r, others xor r, r */
1898 be_emit_cstring(env, "\tsubl ");
1900 be_emit_cstring(env, "\txorl ");
1902 ia32_emit_dest_register(env, node, 0);
1903 be_emit_cstring(env, ", ");
1904 ia32_emit_dest_register(env, node, 0);
1906 be_emit_cstring(env, "\tmovl ");
1907 ia32_emit_immediate(env, node);
1908 be_emit_cstring(env, ", ");
1909 ia32_emit_dest_register(env, node, 0);
1912 be_emit_finish_line_gas(env, node);
1916 * Emits code to load the TLS base
1919 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1920 be_emit_cstring(env, "\tmovl %gs:0, ");
1921 ia32_emit_dest_register(env, node, 0);
1922 be_emit_finish_line_gas(env, node);
1926 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node)
1928 be_emit_cstring(env, "\tret");
1929 be_emit_finish_line_gas(env, node);
1933 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node)
1940 /***********************************************************************************
1943 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1944 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1945 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1946 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1948 ***********************************************************************************/
1951 * Enters the emitter functions for handled nodes into the generic
1952 * pointer of an opcode.
1955 void ia32_register_emitters(void) {
1957 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1958 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1959 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1960 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1961 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1962 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1964 /* first clear the generic function pointer for all ops */
1965 clear_irp_opcodes_generic_func();
1967 /* register all emitter functions defined in spec */
1968 ia32_register_spec_emitters();
1970 /* other ia32 emitter functions */
1978 IA32_EMIT(SwitchJmp);
1981 IA32_EMIT(Conv_I2FP);
1982 IA32_EMIT(Conv_FP2I);
1983 IA32_EMIT(Conv_FP2FP);
1984 IA32_EMIT(Conv_I2I);
1985 IA32_EMIT(Conv_I2I8Bit);
1990 IA32_EMIT(xCmpCMov);
1991 IA32_EMIT(xCondJmp);
1992 IA32_EMIT2(fcomJmp, x87CondJmp);
1993 IA32_EMIT2(fcompJmp, x87CondJmp);
1994 IA32_EMIT2(fcomppJmp, x87CondJmp);
1995 IA32_EMIT2(fcomrJmp, x87CondJmp);
1996 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1997 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1999 /* benode emitter */
2025 static const char *last_name = NULL;
2026 static unsigned last_line = -1;
2027 static unsigned num = -1;
2030 * Emit the debug support for node node.
2033 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
2034 dbg_info *db = get_irn_dbg_info(node);
2036 const char *fname = be_retrieve_dbg_info(db, &lineno);
2038 if (! env->cg->birg->main_env->options->stabs_debug_support)
2042 if (last_name != fname) {
2044 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
2047 if (last_line != lineno) {
2050 snprintf(name, sizeof(name), ".LM%u", ++num);
2052 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
2053 be_emit_string(env, name);
2054 be_emit_cstring(env, ":\n");
2055 be_emit_write_line(env);
2060 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
2063 * Emits code for a node.
2066 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
2067 ir_op *op = get_irn_op(node);
2069 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
2071 if (op->ops.generic) {
2072 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
2073 ia32_emit_dbg(env, node);
2074 (*func) (env, node);
2076 emit_Nothing(env, node);
2077 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
2082 * Emits gas alignment directives
2085 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
2086 be_emit_cstring(env, "\t.p2align ");
2087 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
2088 be_emit_write_line(env);
2092 * Emits gas alignment directives for Functions depended on cpu architecture.
2095 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
2097 unsigned maximum_skip;
2112 maximum_skip = (1 << align) - 1;
2113 ia32_emit_alignment(env, align, maximum_skip);
2117 * Emits gas alignment directives for Labels depended on cpu architecture.
2120 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
2121 unsigned align; unsigned maximum_skip;
2136 maximum_skip = (1 << align) - 1;
2137 ia32_emit_alignment(env, align, maximum_skip);
2141 * Test wether a block should be aligned.
2142 * For cpus in the P4/Athlon class it is usefull to align jump labels to
2143 * 16 bytes. However we should only do that if the alignment nops before the
2144 * label aren't executed more often than we have jumps to the label.
2147 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
2148 static const double DELTA = .0001;
2149 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2151 double prev_freq = 0; /**< execfreq of the fallthrough block */
2152 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
2153 cpu_support cpu = env->isa->opt_arch;
2156 if(exec_freq == NULL)
2158 if(cpu == arch_i386 || cpu == arch_i486)
2161 block_freq = get_block_execfreq(exec_freq, block);
2162 if(block_freq < DELTA)
2165 n_cfgpreds = get_Block_n_cfgpreds(block);
2166 for(i = 0; i < n_cfgpreds; ++i) {
2167 ir_node *pred = get_Block_cfgpred_block(block, i);
2168 double pred_freq = get_block_execfreq(exec_freq, pred);
2171 prev_freq += pred_freq;
2173 jmp_freq += pred_freq;
2177 if(prev_freq < DELTA && !(jmp_freq < DELTA))
2180 jmp_freq /= prev_freq;
2184 case arch_athlon_64:
2186 return jmp_freq > 3;
2188 return jmp_freq > 2;
2193 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
2198 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2201 n_cfgpreds = get_Block_n_cfgpreds(block);
2202 if (n_cfgpreds == 0) {
2204 } else if (n_cfgpreds == 1) {
2205 ir_node *pred = get_Block_cfgpred(block, 0);
2206 ir_node *pred_block = get_nodes_block(pred);
2208 /* we don't need labels for fallthrough blocks, however switch-jmps
2209 * are no fallthoughs */
2210 if(pred_block == prev &&
2211 !(is_Proj(pred) && is_ia32_SwitchJmp(get_Proj_pred(pred)))) {
2220 if (should_align_block(env, block, prev)) {
2222 ia32_emit_align_label(env, env->isa->opt_arch);
2226 ia32_emit_block_name(env, block);
2227 be_emit_char(env, ':');
2229 be_emit_pad_comment(env);
2230 be_emit_cstring(env, " /* preds:");
2232 /* emit list of pred blocks in comment */
2233 arity = get_irn_arity(block);
2234 for (i = 0; i < arity; ++i) {
2235 ir_node *predblock = get_Block_cfgpred_block(block, i);
2236 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2239 be_emit_cstring(env, "\t/* ");
2240 ia32_emit_block_name(env, block);
2241 be_emit_cstring(env, ": ");
2243 if (exec_freq != NULL) {
2244 be_emit_irprintf(env->emit, " freq: %f",
2245 get_block_execfreq(exec_freq, block));
2247 be_emit_cstring(env, " */\n");
2248 be_emit_write_line(env);
2252 * Walks over the nodes in a block connected by scheduling edges
2253 * and emits code for each node.
2256 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2258 const ir_node *node;
2260 ia32_emit_block_header(env, block, last_block);
2262 /* emit the contents of the block */
2263 ia32_emit_dbg(env, block);
2264 sched_foreach(block, node) {
2265 ia32_emit_node(env, node);
2270 * Emits code for function start.
2273 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2274 ir_entity *irg_ent = get_irg_entity(irg);
2275 const char *irg_name = get_entity_ld_name(irg_ent);
2276 cpu_support cpu = env->isa->opt_arch;
2277 const be_irg_t *birg = env->cg->birg;
2279 be_emit_write_line(env);
2280 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2281 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2282 ia32_emit_align_func(env, cpu);
2283 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2284 be_emit_cstring(env, ".global ");
2285 be_emit_string(env, irg_name);
2286 be_emit_char(env, '\n');
2287 be_emit_write_line(env);
2289 ia32_emit_function_object(env, irg_name);
2290 be_emit_string(env, irg_name);
2291 be_emit_cstring(env, ":\n");
2292 be_emit_write_line(env);
2296 * Emits code for function end
2299 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2300 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2301 const be_irg_t *birg = env->cg->birg;
2303 ia32_emit_function_size(env, irg_name);
2304 be_dbg_method_end(birg->main_env->db_handle);
2305 be_emit_char(env, '\n');
2306 be_emit_write_line(env);
2311 * Sets labels for control flow nodes (jump target)
2314 void ia32_gen_labels(ir_node *block, void *data)
2317 int n = get_Block_n_cfgpreds(block);
2320 for (n--; n >= 0; n--) {
2321 pred = get_Block_cfgpred(block, n);
2322 set_irn_link(pred, block);
2327 * Emit an exception label if the current instruction can fail.
2329 void ia32_emit_exc_label(ia32_emit_env_t *env, const ir_node *node) {
2330 if (get_ia32_exc_label(node)) {
2331 be_emit_irprintf(env->emit, ".EXL%u\n", 0);
2332 be_emit_write_line(env);
2337 * Main driver. Emits the code for one routine.
2339 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2340 ia32_emit_env_t env;
2342 ir_node *last_block = NULL;
2345 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2346 env.emit = &env.isa->emit;
2347 env.arch_env = cg->arch_env;
2350 ia32_register_emitters();
2352 ia32_emit_func_prolog(&env, irg);
2353 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2355 n = ARR_LEN(cg->blk_sched);
2356 for (i = 0; i < n;) {
2359 block = cg->blk_sched[i];
2361 next_bl = i < n ? cg->blk_sched[i] : NULL;
2363 /* set here the link. the emitter expects to find the next block here */
2364 set_irn_link(block, next_bl);
2365 ia32_gen_block(&env, block, last_block);
2369 ia32_emit_func_epilog(&env, irg);
2372 void ia32_init_emitter(void)
2374 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");