3 * @brief This file implements the node emitter.
4 * @author Christian Wuerdig, Matthias Braun
22 #include "iredges_t.h"
25 #include "raw_bitset.h"
27 #include "../besched_t.h"
28 #include "../benode_t.h"
30 #include "../be_dbgout.h"
31 #include "../beemitter.h"
32 #include "../begnuas.h"
33 #include "../beirg_t.h"
35 #include "ia32_emitter.h"
36 #include "gen_ia32_emitter.h"
37 #include "gen_ia32_regalloc_if.h"
38 #include "ia32_nodes_attr.h"
39 #include "ia32_new_nodes.h"
40 #include "ia32_map_regs.h"
41 #include "bearch_ia32_t.h"
43 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
45 #define BLOCK_PREFIX ".L"
47 #define SNPRINTF_BUF_LEN 128
50 * Returns the register at in position pos.
53 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
56 const arch_env_t *arch_env = env->arch_env;
58 const arch_register_t *reg = NULL;
60 assert(get_irn_arity(irn) > pos && "Invalid IN position");
62 /* The out register of the operator at position pos is the
63 in register we need. */
64 op = get_irn_n(irn, pos);
66 reg = arch_get_irn_register(arch_env, op);
68 assert(reg && "no in register found");
70 /* in case of a joker register: just return a valid register */
71 if (arch_register_type_is(reg, joker)) {
72 const arch_register_req_t *req;
74 /* ask for the requirements */
75 req = arch_get_register_req(arch_env, irn, pos);
77 if (arch_register_req_is(req, limited)) {
78 /* in case of limited requirements: get the first allowed register */
79 unsigned idx = rbitset_next(req->limited, 0, 1);
80 reg = arch_register_for_index(req->cls, idx);
82 /* otherwise get first register in class */
83 reg = arch_register_for_index(req->cls, 0);
91 * Returns the register at out position pos.
94 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
97 const arch_env_t *arch_env = env->arch_env;
99 const arch_register_t *reg = NULL;
101 /* 1st case: irn is not of mode_T, so it has only */
102 /* one OUT register -> good */
103 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
104 /* Proj with the corresponding projnum for the register */
106 if (get_irn_mode(irn) != mode_T) {
107 reg = arch_get_irn_register(arch_env, irn);
108 } else if (is_ia32_irn(irn)) {
109 reg = get_ia32_out_reg(irn, pos);
111 const ir_edge_t *edge;
113 foreach_out_edge(irn, edge) {
114 proj = get_edge_src_irn(edge);
115 assert(is_Proj(proj) && "non-Proj from mode_T node");
116 if (get_Proj_proj(proj) == pos) {
117 reg = arch_get_irn_register(arch_env, proj);
123 assert(reg && "no out register found");
128 * Returns an ident for the given tarval tv.
131 ident *get_ident_for_tv(tarval *tv) {
133 tarval_snprintf(buf, sizeof(buf), tv);
134 return new_id_from_str(buf);
138 * Determine the gnu assembler suffix that indicates a mode
141 char get_mode_suffix(const ir_mode *mode) {
142 if(mode_is_float(mode)) {
143 switch(get_mode_size_bits(mode)) {
152 assert(mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode));
153 switch(get_mode_size_bits(mode)) {
164 panic("Can't output mode_suffix for %+F\n", mode);
168 int produces_result(const ir_node *node) {
169 return !(is_ia32_St(node) ||
170 is_ia32_Store8Bit(node) ||
171 is_ia32_CondJmp(node) ||
172 is_ia32_xCondJmp(node) ||
173 is_ia32_CmpSet(node) ||
174 is_ia32_xCmpSet(node) ||
175 is_ia32_SwitchJmp(node));
179 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
180 const arch_register_t *reg) {
181 switch(get_mode_size_bits(mode)) {
183 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
185 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
187 return (char *)arch_register_get_name(reg);
192 * Add a number to a prefix. This number will not be used a second time.
195 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
196 static unsigned long id = 0;
197 snprintf(buf, buflen, "%s%lu", prefix, ++id);
201 /*************************************************************
203 * (_) | | / _| | | | |
204 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
205 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
206 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
207 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
210 *************************************************************/
212 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
213 // be_emit_env_t* so we cheat a bit...
214 #define be_emit_char(env,c) be_emit_char(env->emit,c)
215 #define be_emit_string(env,s) be_emit_string(env->emit,s)
216 #undef be_emit_cstring
217 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
218 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
219 #define be_emit_write_line(env) be_emit_write_line(env->emit)
220 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
221 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
223 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
225 const arch_register_t *reg = get_in_reg(env, node, pos);
226 const char *reg_name = arch_register_get_name(reg);
228 assert(pos < get_irn_arity(node));
230 be_emit_char(env, '%');
231 be_emit_string(env, reg_name);
234 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
235 const arch_register_t *reg = get_out_reg(env, node, pos);
236 const char *reg_name = arch_register_get_name(reg);
238 be_emit_char(env, '%');
239 be_emit_string(env, reg_name);
242 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
244 ia32_attr_t *attr = get_ia32_attr(node);
247 be_emit_char(env, '%');
248 be_emit_string(env, attr->x87[pos]->name);
251 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
257 be_emit_char(env, '$');
259 switch(get_ia32_immop_type(node)) {
261 tv = get_ia32_Immop_tarval(node);
262 id = get_ident_for_tv(tv);
264 case ia32_ImmSymConst:
265 ent = get_ia32_Immop_symconst(node);
266 mark_entity_visited(ent);
267 id = get_entity_ld_ident(ent);
271 be_emit_string(env, "BAD");
275 be_emit_ident(env, id);
278 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode)
280 be_emit_char(env, get_mode_suffix(mode));
283 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
285 ir_mode *mode = get_ia32_ls_mode(node);
287 ia32_emit_mode_suffix(env, mode);
291 char get_xmm_mode_suffix(ir_mode *mode)
293 assert(mode_is_float(mode));
294 switch(get_mode_size_bits(mode)) {
305 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
307 ir_mode *mode = get_ia32_ls_mode(node);
308 assert(mode != NULL);
309 be_emit_char(env, 's');
310 be_emit_char(env, get_xmm_mode_suffix(mode));
313 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
315 ir_mode *mode = get_ia32_ls_mode(node);
316 assert(mode != NULL);
317 be_emit_char(env, get_xmm_mode_suffix(mode));
320 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
322 if(get_mode_size_bits(mode) == 32)
324 if(mode_is_signed(mode)) {
325 be_emit_char(env, 's');
327 be_emit_char(env, 'z');
332 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
334 switch (be_gas_flavour) {
335 case GAS_FLAVOUR_NORMAL:
336 be_emit_cstring(env, "\t.type\t");
337 be_emit_string(env, name);
338 be_emit_cstring(env, ", @function\n");
339 be_emit_write_line(env);
341 case GAS_FLAVOUR_MINGW:
342 be_emit_cstring(env, "\t.def\t");
343 be_emit_string(env, name);
344 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
345 be_emit_write_line(env);
353 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
355 switch (be_gas_flavour) {
356 case GAS_FLAVOUR_NORMAL:
357 be_emit_cstring(env, "\t.size\t");
358 be_emit_string(env, name);
359 be_emit_cstring(env, ", .-");
360 be_emit_string(env, name);
361 be_emit_char(env, '\n');
362 be_emit_write_line(env);
372 * Emits registers and/or address mode of a binary operation.
374 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
375 switch(get_ia32_op_type(node)) {
377 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
378 ia32_emit_immediate(env, node);
379 be_emit_cstring(env, ", ");
380 ia32_emit_source_register(env, node, 2);
382 const arch_register_t *in1 = get_in_reg(env, node, 2);
383 const arch_register_t *in2 = get_in_reg(env, node, 3);
384 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
385 const arch_register_t *in;
388 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
389 out = out ? out : in1;
390 in_name = arch_register_get_name(in);
392 if (is_ia32_emit_cl(node)) {
393 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
397 be_emit_char(env, '%');
398 be_emit_string(env, in_name);
399 be_emit_cstring(env, ", %");
400 be_emit_string(env, arch_register_get_name(out));
404 ia32_emit_am(env, node);
405 be_emit_cstring(env, ", ");
406 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
407 assert(!produces_result(node) && "Source AM with Const must not produce result");
408 ia32_emit_immediate(env, node);
409 } else if (produces_result(node)) {
410 ia32_emit_dest_register(env, node, 0);
412 ia32_emit_source_register(env, node, 2);
416 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
417 ia32_emit_immediate(env, node);
418 be_emit_cstring(env, ", ");
419 ia32_emit_am(env, node);
421 const arch_register_t *in1 = get_in_reg(env, node,
422 get_irn_arity(node) == 5 ? 3 : 2);
423 ir_mode *mode = get_ia32_ls_mode(node);
426 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
428 if (is_ia32_emit_cl(node)) {
429 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
433 be_emit_char(env, '%');
434 be_emit_string(env, in_name);
435 be_emit_cstring(env, ", ");
436 ia32_emit_am(env, node);
440 assert(0 && "unsupported op type");
445 * Emits registers and/or address mode of a binary operation.
447 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
448 switch(get_ia32_op_type(node)) {
450 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
451 // should not happen...
454 ia32_attr_t *attr = get_ia32_attr(node);
455 const arch_register_t *in1 = attr->x87[0];
456 const arch_register_t *in2 = attr->x87[1];
457 const arch_register_t *out = attr->x87[2];
458 const arch_register_t *in;
460 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
461 out = out ? out : in1;
463 be_emit_char(env, '%');
464 be_emit_string(env, arch_register_get_name(in));
465 be_emit_cstring(env, ", %");
466 be_emit_string(env, arch_register_get_name(out));
471 ia32_emit_am(env, node);
474 assert(0 && "unsupported op type");
479 * Emits registers and/or address mode of a unary operation.
481 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
482 switch(get_ia32_op_type(node)) {
484 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
485 ia32_emit_immediate(env, node);
487 if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
488 ia32_emit_source_register(env, node, 3);
489 } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
490 ia32_emit_source_register(env, node, 4);
491 } else if(is_ia32_Push(node)) {
492 ia32_emit_source_register(env, node, 2);
493 } else if(is_ia32_Pop(node)) {
494 ia32_emit_dest_register(env, node, 1);
496 ia32_emit_dest_register(env, node, 0);
502 ia32_emit_am(env, node);
505 assert(0 && "unsupported op type");
510 * Emits address mode.
512 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
513 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
514 ir_entity *ent = get_ia32_am_sc(node);
515 int offs = get_ia32_am_offs_int(node);
517 /* just to be sure... */
518 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
524 mark_entity_visited(ent);
525 id = get_entity_ld_ident(ent);
526 if (is_ia32_am_sc_sign(node))
527 be_emit_char(env, '-');
528 be_emit_ident(env, id);
530 if(get_entity_owner(ent) == get_tls_type()) {
531 if (get_entity_visibility(ent) == visibility_external_allocated) {
532 be_emit_cstring(env, "@INDNTPOFF");
534 be_emit_cstring(env, "@NTPOFF");
541 be_emit_irprintf(env->emit, "%+d", offs);
543 be_emit_irprintf(env->emit, "%d", offs);
547 if (am_flav & (ia32_B | ia32_I)) {
548 be_emit_char(env, '(');
551 if (am_flav & ia32_B) {
552 ia32_emit_source_register(env, node, 0);
555 /* emit index + scale */
556 if (am_flav & ia32_I) {
557 be_emit_char(env, ',');
558 ia32_emit_source_register(env, node, 1);
560 if (am_flav & ia32_S) {
561 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
564 be_emit_char(env, ')');
568 /*************************************************
571 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
572 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
573 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
574 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
576 *************************************************/
579 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
582 * coding of conditions
584 struct cmp2conditon_t {
590 * positive conditions for signed compares
593 const struct cmp2conditon_t cmp2condition_s[] = {
594 { NULL, pn_Cmp_False }, /* always false */
595 { "e", pn_Cmp_Eq }, /* == */
596 { "l", pn_Cmp_Lt }, /* < */
597 { "le", pn_Cmp_Le }, /* <= */
598 { "g", pn_Cmp_Gt }, /* > */
599 { "ge", pn_Cmp_Ge }, /* >= */
600 { "ne", pn_Cmp_Lg }, /* != */
601 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
602 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
603 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
604 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
605 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
606 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
607 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
608 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
609 { NULL, pn_Cmp_True }, /* always true */
613 * positive conditions for unsigned compares
616 const struct cmp2conditon_t cmp2condition_u[] = {
617 { NULL, pn_Cmp_False }, /* always false */
618 { "e", pn_Cmp_Eq }, /* == */
619 { "b", pn_Cmp_Lt }, /* < */
620 { "be", pn_Cmp_Le }, /* <= */
621 { "a", pn_Cmp_Gt }, /* > */
622 { "ae", pn_Cmp_Ge }, /* >= */
623 { "ne", pn_Cmp_Lg }, /* != */
624 { NULL, pn_Cmp_True }, /* always true */
628 * returns the condition code
631 const char *get_cmp_suffix(int cmp_code)
633 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
634 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
636 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
637 return cmp2condition_u[cmp_code & 7].name;
639 return cmp2condition_s[cmp_code & 15].name;
643 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
645 be_emit_string(env, get_cmp_suffix(pnc));
650 * Returns the target block for a control flow node.
653 ir_node *get_cfop_target_block(const ir_node *irn) {
654 return get_irn_link(irn);
658 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
660 be_emit_cstring(env, BLOCK_PREFIX);
661 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
665 * Returns the target label for a control flow node.
668 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
669 ir_node *block = get_cfop_target_block(node);
671 ia32_emit_block_name(env, block);
674 /** Return the next block in Block schedule */
675 static ir_node *next_blk_sched(const ir_node *block) {
676 return get_irn_link(block);
680 * Returns the Proj with projection number proj and NOT mode_M
683 ir_node *get_proj(const ir_node *node, long proj) {
684 const ir_edge_t *edge;
687 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
689 foreach_out_edge(node, edge) {
690 src = get_edge_src_irn(edge);
692 assert(is_Proj(src) && "Proj expected");
693 if (get_irn_mode(src) == mode_M)
696 if (get_Proj_proj(src) == proj)
703 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
706 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
708 const ir_node *proj_true;
709 const ir_node *proj_false;
710 const ir_node *block;
711 const ir_node *next_block;
714 /* get both Proj's */
715 proj_true = get_proj(node, pn_Cond_true);
716 assert(proj_true && "CondJmp without true Proj");
718 proj_false = get_proj(node, pn_Cond_false);
719 assert(proj_false && "CondJmp without false Proj");
721 /* for now, the code works for scheduled and non-schedules blocks */
722 block = get_nodes_block(node);
724 /* we have a block schedule */
725 next_block = next_blk_sched(block);
727 if (get_cfop_target_block(proj_true) == next_block) {
728 /* exchange both proj's so the second one can be omitted */
729 const ir_node *t = proj_true;
731 proj_true = proj_false;
734 pnc = get_negated_pnc(pnc, mode);
737 /* in case of unordered compare, check for parity */
738 if (pnc & pn_Cmp_Uo) {
739 be_emit_cstring(env, "\tjp ");
740 ia32_emit_cfop_target(env, proj_true);
741 be_emit_finish_line_gas(env, proj_true);
744 be_emit_cstring(env, "\tj");
745 ia32_emit_cmp_suffix(env, pnc);
746 be_emit_char(env, ' ');
747 ia32_emit_cfop_target(env, proj_true);
748 be_emit_finish_line_gas(env, proj_true);
750 /* the second Proj might be a fallthrough */
751 if (get_cfop_target_block(proj_false) != next_block) {
752 be_emit_cstring(env, "\tjmp ");
753 ia32_emit_cfop_target(env, proj_false);
754 be_emit_finish_line_gas(env, proj_false);
756 be_emit_cstring(env, "\t/* fallthrough to ");
757 ia32_emit_cfop_target(env, proj_false);
758 be_emit_cstring(env, " */");
759 be_emit_finish_line_gas(env, proj_false);
764 * Emits code for conditional jump.
767 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
768 be_emit_cstring(env, "\tcmp ");
769 ia32_emit_binop(env, node);
770 be_emit_finish_line_gas(env, node);
772 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
776 * Emits code for conditional jump with two variables.
779 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
780 CondJmp_emitter(env, node);
784 * Emits code for conditional test and jump.
787 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
788 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
789 be_emit_cstring(env, "\ttest ");
790 ia32_emit_immediate(env, node);
791 be_emit_cstring(env, ", ");
792 ia32_emit_source_register(env, node, 0);
793 be_emit_finish_line_gas(env, node);
795 be_emit_cstring(env, "\ttest ");
796 ia32_emit_source_register(env, node, 1);
797 be_emit_cstring(env, ", ");
798 ia32_emit_source_register(env, node, 0);
799 be_emit_finish_line_gas(env, node);
801 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
805 * Emits code for conditional test and jump with two variables.
808 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
809 TestJmp_emitter(env, node);
813 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
814 be_emit_cstring(env, "/* omitted redundant test */");
815 be_emit_finish_line_gas(env, node);
817 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
821 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
822 be_emit_cstring(env, "/* omitted redundant test/cmp */");
823 be_emit_finish_line_gas(env, node);
825 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
829 * Emits code for conditional SSE floating point jump with two variables.
832 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
833 be_emit_cstring(env, "\tucomi");
834 ia32_emit_xmm_mode_suffix(env, node);
835 be_emit_char(env, ' ');
836 ia32_emit_binop(env, node);
837 be_emit_finish_line_gas(env, node);
839 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
843 * Emits code for conditional x87 floating point jump with two variables.
846 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
847 ia32_attr_t *attr = get_ia32_attr(node);
848 const char *reg = attr->x87[1]->name;
849 long pnc = get_ia32_pncode(node);
851 switch (get_ia32_irn_opcode(node)) {
852 case iro_ia32_fcomrJmp:
853 pnc = get_inversed_pnc(pnc);
854 reg = attr->x87[0]->name;
855 case iro_ia32_fcomJmp:
857 be_emit_cstring(env, "\tfucom ");
859 case iro_ia32_fcomrpJmp:
860 pnc = get_inversed_pnc(pnc);
861 reg = attr->x87[0]->name;
862 case iro_ia32_fcompJmp:
863 be_emit_cstring(env, "\tfucomp ");
865 case iro_ia32_fcomrppJmp:
866 pnc = get_inversed_pnc(pnc);
867 case iro_ia32_fcomppJmp:
868 be_emit_cstring(env, "\tfucompp ");
874 be_emit_char(env, '%');
875 be_emit_string(env, reg);
877 be_emit_finish_line_gas(env, node);
879 be_emit_cstring(env, "\tfnstsw %ax");
880 be_emit_finish_line_gas(env, node);
881 be_emit_cstring(env, "\tsahf");
882 be_emit_finish_line_gas(env, node);
884 finish_CondJmp(env, node, mode_E, pnc);
888 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
889 long pnc = get_ia32_pncode(node);
890 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
891 int idx_left = 2 - is_PsiCondCMov;
892 int idx_right = 3 - is_PsiCondCMov;
893 const arch_register_t *in1, *in2, *out;
895 out = arch_get_irn_register(env->arch_env, node);
896 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
897 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
899 /* we have to emit the cmp first, because the destination register */
900 /* could be one of the compare registers */
901 if (is_ia32_CmpCMov(node)) {
902 be_emit_cstring(env, "\tcmp ");
903 ia32_emit_source_register(env, node, 1);
904 be_emit_cstring(env, ", ");
905 ia32_emit_source_register(env, node, 0);
906 } else if (is_ia32_xCmpCMov(node)) {
907 be_emit_cstring(env, "\tucomis");
908 ia32_emit_mode_suffix(env, get_irn_mode(node));
909 be_emit_char(env, ' ');
910 ia32_emit_source_register(env, node, 1);
911 be_emit_cstring(env, ", ");
912 ia32_emit_source_register(env, node, 0);
913 } else if (is_PsiCondCMov) {
914 /* omit compare because flags are already set by And/Or */
915 be_emit_cstring(env, "\ttest ");
916 ia32_emit_source_register(env, node, 0);
917 be_emit_cstring(env, ", ");
918 ia32_emit_source_register(env, node, 0);
920 assert(0 && "unsupported CMov");
922 be_emit_finish_line_gas(env, node);
924 if (REGS_ARE_EQUAL(out, in2)) {
925 /* best case: default in == out -> do nothing */
926 } else if (REGS_ARE_EQUAL(out, in1)) {
927 ir_node *n = (ir_node*) node;
928 /* true in == out -> need complement compare and exchange true and default in */
929 ir_node *t = get_irn_n(n, idx_left);
930 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
931 set_irn_n(n, idx_right, t);
933 pnc = get_negated_pnc(pnc, get_irn_mode(node));
935 /* out is different from in: need copy default -> out */
936 if (is_PsiCondCMov) {
937 be_emit_cstring(env, "\tmovl ");
938 ia32_emit_dest_register(env, node, 2);
939 be_emit_cstring(env, ", ");
940 ia32_emit_dest_register(env, node, 0);
942 be_emit_cstring(env, "\tmovl ");
943 ia32_emit_source_register(env, node, 3);
944 be_emit_cstring(env, ", ");
945 ia32_emit_dest_register(env, node, 0);
947 be_emit_finish_line_gas(env, node);
950 if (is_PsiCondCMov) {
951 be_emit_cstring(env, "\tcmov");
952 ia32_emit_cmp_suffix(env, pnc);
953 be_emit_cstring(env, "l ");
954 ia32_emit_source_register(env, node, 1);
955 be_emit_cstring(env, ", ");
956 ia32_emit_dest_register(env, node, 0);
958 be_emit_cstring(env, "\tcmov");
959 ia32_emit_cmp_suffix(env, pnc);
960 be_emit_cstring(env, "l ");
961 ia32_emit_source_register(env, node, 2);
962 be_emit_cstring(env, ", ");
963 ia32_emit_dest_register(env, node, 0);
965 be_emit_finish_line_gas(env, node);
969 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
970 CMov_emitter(env, node);
974 void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
975 CMov_emitter(env, node);
979 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
980 CMov_emitter(env, node);
984 void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
985 int pnc = get_ia32_pncode(node);
987 const arch_register_t *out;
989 out = arch_get_irn_register(env->arch_env, node);
990 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
992 if (is_ia32_CmpSet(node)) {
993 be_emit_cstring(env, "\tcmp ");
994 ia32_emit_binop(env, node);
995 } else if (is_ia32_xCmpSet(node)) {
996 be_emit_cstring(env, "\tucomis");
997 ia32_emit_mode_suffix(env, get_irn_mode(get_irn_n(node, 2)));
998 be_emit_char(env, ' ');
999 ia32_emit_binop(env, node);
1000 } else if (is_ia32_PsiCondSet(node)) {
1001 be_emit_cstring(env, "\tcmp $0, ");
1002 ia32_emit_source_register(env, node, 0);
1004 assert(0 && "unsupported Set");
1006 be_emit_finish_line_gas(env, node);
1008 /* use mov to clear target because it doesn't affect the eflags */
1009 be_emit_cstring(env, "\tmovl $0, %");
1010 be_emit_string(env, arch_register_get_name(out));
1011 be_emit_finish_line_gas(env, node);
1013 be_emit_cstring(env, "\tset");
1014 ia32_emit_cmp_suffix(env, pnc);
1015 be_emit_cstring(env, " %");
1016 be_emit_string(env, reg8bit);
1017 be_emit_finish_line_gas(env, node);
1021 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1022 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1026 void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
1027 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
1031 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1032 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1036 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1038 long pnc = get_ia32_pncode(node);
1039 long unord = pnc & pn_Cmp_Uo;
1041 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1044 case pn_Cmp_Leg: /* odered */
1047 case pn_Cmp_Uo: /* unordered */
1051 case pn_Cmp_Eq: /* == */
1055 case pn_Cmp_Lt: /* < */
1059 case pn_Cmp_Le: /* <= */
1063 case pn_Cmp_Gt: /* > */
1067 case pn_Cmp_Ge: /* >= */
1071 case pn_Cmp_Lg: /* != */
1076 assert(sse_pnc >= 0 && "unsupported compare");
1078 if (unord && sse_pnc != 3) {
1080 We need a separate compare against unordered.
1081 Quick and Dirty solution:
1082 - get some memory on stack
1086 - and result and stored result
1089 be_emit_cstring(env, "\tsubl $8, %esp");
1090 be_emit_finish_line_gas(env, node);
1092 be_emit_cstring(env, "\tcmpsd $3, ");
1093 ia32_emit_binop(env, node);
1094 be_emit_finish_line_gas(env, node);
1096 be_emit_cstring(env, "\tmovsd ");
1097 ia32_emit_dest_register(env, node, 0);
1098 be_emit_cstring(env, ", (%esp)");
1099 be_emit_finish_line_gas(env, node);
1102 be_emit_cstring(env, "\tcmpsd ");
1103 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1104 ia32_emit_binop(env, node);
1105 be_emit_finish_line_gas(env, node);
1107 if (unord && sse_pnc != 3) {
1108 be_emit_cstring(env, "\tandpd (%esp), ");
1109 ia32_emit_dest_register(env, node, 0);
1110 be_emit_finish_line_gas(env, node);
1112 be_emit_cstring(env, "\taddl $8, %esp");
1113 be_emit_finish_line_gas(env, node);
1117 /*********************************************************
1120 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1121 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1122 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1123 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1126 *********************************************************/
1128 /* jump table entry (target and corresponding number) */
1129 typedef struct _branch_t {
1134 /* jump table for switch generation */
1135 typedef struct _jmp_tbl_t {
1136 ir_node *defProj; /**< default target */
1137 int min_value; /**< smallest switch case */
1138 int max_value; /**< largest switch case */
1139 int num_branches; /**< number of jumps */
1140 char *label; /**< label of the jump table */
1141 branch_t *branches; /**< jump array */
1145 * Compare two variables of type branch_t. Used to sort all switch cases
1148 int ia32_cmp_branch_t(const void *a, const void *b) {
1149 branch_t *b1 = (branch_t *)a;
1150 branch_t *b2 = (branch_t *)b;
1152 if (b1->value <= b2->value)
1159 * Emits code for a SwitchJmp (creates a jump table if
1160 * possible otherwise a cmp-jmp cascade). Port from
1164 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1165 unsigned long interval;
1170 const ir_edge_t *edge;
1172 /* fill the table structure */
1173 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1174 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1176 tbl.num_branches = get_irn_n_edges(node);
1177 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1178 tbl.min_value = INT_MAX;
1179 tbl.max_value = INT_MIN;
1182 /* go over all proj's and collect them */
1183 foreach_out_edge(node, edge) {
1184 proj = get_edge_src_irn(edge);
1185 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1187 pnc = get_Proj_proj(proj);
1189 /* create branch entry */
1190 tbl.branches[i].target = proj;
1191 tbl.branches[i].value = pnc;
1193 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1194 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1196 /* check for default proj */
1197 if (pnc == get_ia32_pncode(node)) {
1198 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1205 /* sort the branches by their number */
1206 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1208 /* two-complement's magic make this work without overflow */
1209 interval = tbl.max_value - tbl.min_value;
1211 /* emit the table */
1212 be_emit_cstring(env, "\tcmpl $");
1213 be_emit_irprintf(env->emit, "%u, ", interval);
1214 ia32_emit_source_register(env, node, 0);
1215 be_emit_finish_line_gas(env, node);
1217 be_emit_cstring(env, "\tja ");
1218 ia32_emit_cfop_target(env, tbl.defProj);
1219 be_emit_finish_line_gas(env, node);
1221 if (tbl.num_branches > 1) {
1223 be_emit_cstring(env, "\tjmp *");
1224 be_emit_string(env, tbl.label);
1225 be_emit_cstring(env, "(,");
1226 ia32_emit_source_register(env, node, 0);
1227 be_emit_cstring(env, ",4)");
1228 be_emit_finish_line_gas(env, node);
1230 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1231 be_emit_cstring(env, "\t.align 4\n");
1232 be_emit_write_line(env);
1234 be_emit_string(env, tbl.label);
1235 be_emit_cstring(env, ":\n");
1236 be_emit_write_line(env);
1238 be_emit_cstring(env, ".long ");
1239 ia32_emit_cfop_target(env, tbl.branches[0].target);
1240 be_emit_finish_line_gas(env, NULL);
1242 last_value = tbl.branches[0].value;
1243 for (i = 1; i < tbl.num_branches; ++i) {
1244 while (++last_value < tbl.branches[i].value) {
1245 be_emit_cstring(env, ".long ");
1246 ia32_emit_cfop_target(env, tbl.defProj);
1247 be_emit_finish_line_gas(env, NULL);
1249 be_emit_cstring(env, ".long ");
1250 ia32_emit_cfop_target(env, tbl.branches[i].target);
1251 be_emit_finish_line_gas(env, NULL);
1253 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1255 /* one jump is enough */
1256 be_emit_cstring(env, "\tjmp ");
1257 ia32_emit_cfop_target(env, tbl.branches[0].target);
1258 be_emit_finish_line_gas(env, node);
1268 * Emits code for a unconditional jump.
1271 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1272 ir_node *block, *next_block;
1274 /* for now, the code works for scheduled and non-schedules blocks */
1275 block = get_nodes_block(node);
1277 /* we have a block schedule */
1278 next_block = next_blk_sched(block);
1279 if (get_cfop_target_block(node) != next_block) {
1280 be_emit_cstring(env, "\tjmp ");
1281 ia32_emit_cfop_target(env, node);
1283 be_emit_cstring(env, "\t/* fallthrough to ");
1284 ia32_emit_cfop_target(env, node);
1285 be_emit_cstring(env, " */");
1287 be_emit_finish_line_gas(env, node);
1290 /**********************************
1293 * | | ___ _ __ _ _| |_) |
1294 * | | / _ \| '_ \| | | | _ <
1295 * | |___| (_) | |_) | |_| | |_) |
1296 * \_____\___/| .__/ \__, |____/
1299 **********************************/
1302 * Emit movsb/w instructions to make mov count divideable by 4
1305 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1306 be_emit_cstring(env, "\tcld");
1307 be_emit_finish_line_gas(env, NULL);
1311 be_emit_cstring(env, "\tmovsb");
1312 be_emit_finish_line_gas(env, NULL);
1315 be_emit_cstring(env, "\tmovsw");
1316 be_emit_finish_line_gas(env, NULL);
1319 be_emit_cstring(env, "\tmovsb");
1320 be_emit_finish_line_gas(env, NULL);
1321 be_emit_cstring(env, "\tmovsw");
1322 be_emit_finish_line_gas(env, NULL);
1328 * Emit rep movsd instruction for memcopy.
1331 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1332 tarval *tv = get_ia32_Immop_tarval(node);
1333 int rem = get_tarval_long(tv);
1335 emit_CopyB_prolog(env, rem);
1337 be_emit_cstring(env, "\trep movsd");
1338 be_emit_finish_line_gas(env, node);
1342 * Emits unrolled memcopy.
1345 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1346 tarval *tv = get_ia32_Immop_tarval(node);
1347 int size = get_tarval_long(tv);
1349 emit_CopyB_prolog(env, size & 0x3);
1353 be_emit_cstring(env, "\tmovsd");
1354 be_emit_finish_line_gas(env, NULL);
1360 /***************************
1364 * | | / _ \| '_ \ \ / /
1365 * | |___| (_) | | | \ V /
1366 * \_____\___/|_| |_|\_/
1368 ***************************/
1371 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1374 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1375 ir_mode *ls_mode = get_ia32_ls_mode(node);
1376 int ls_bits = get_mode_size_bits(ls_mode);
1378 be_emit_cstring(env, "\tcvt");
1380 if(is_ia32_Conv_I2FP(node)) {
1382 be_emit_cstring(env, "si2ss");
1384 be_emit_cstring(env, "si2sd");
1386 } else if(is_ia32_Conv_FP2I(node)) {
1388 be_emit_cstring(env, "ss2si");
1390 be_emit_cstring(env, "sd2si");
1393 assert(is_ia32_Conv_FP2FP(node));
1395 be_emit_cstring(env, "sd2ss");
1397 be_emit_cstring(env, "ss2sd");
1400 be_emit_char(env, ' ');
1402 switch(get_ia32_op_type(node)) {
1404 ia32_emit_source_register(env, node, 2);
1405 be_emit_cstring(env, ", ");
1406 ia32_emit_dest_register(env, node, 0);
1408 case ia32_AddrModeS:
1409 ia32_emit_dest_register(env, node, 0);
1410 be_emit_cstring(env, ", ");
1411 ia32_emit_am(env, node);
1414 assert(0 && "unsupported op type for Conv");
1416 be_emit_finish_line_gas(env, node);
1420 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1421 emit_ia32_Conv_with_FP(env, node);
1425 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1426 emit_ia32_Conv_with_FP(env, node);
1430 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1431 emit_ia32_Conv_with_FP(env, node);
1435 * Emits code for an Int conversion.
1438 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1439 const char *sign_suffix;
1440 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1441 int smaller_bits = get_mode_size_bits(smaller_mode);
1443 const arch_register_t *in_reg, *out_reg;
1445 assert(!mode_is_float(smaller_mode));
1446 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1448 signed_mode = mode_is_signed(smaller_mode);
1449 if(smaller_bits == 32) {
1450 // this should not happen as it's no convert
1454 sign_suffix = signed_mode ? "s" : "z";
1457 switch(get_ia32_op_type(node)) {
1459 in_reg = get_in_reg(env, node, 2);
1460 out_reg = get_out_reg(env, node, 0);
1462 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1463 REGS_ARE_EQUAL(out_reg, in_reg) &&
1466 /* argument and result are both in EAX and */
1467 /* signedness is ok: -> use converts */
1468 if (smaller_bits == 8) {
1469 be_emit_cstring(env, "\tcbtw");
1470 } else if (smaller_bits == 16) {
1471 be_emit_cstring(env, "\tcwtl");
1475 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1476 /* argument and result are in the same register */
1477 /* and signedness is ok: -> use and with mask */
1478 int mask = (1 << smaller_bits) - 1;
1479 be_emit_cstring(env, "\tandl $0x");
1480 be_emit_irprintf(env->emit, "%x, ", mask);
1481 ia32_emit_dest_register(env, node, 0);
1483 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1485 be_emit_cstring(env, "\tmov");
1486 be_emit_string(env, sign_suffix);
1487 ia32_emit_mode_suffix(env, smaller_mode);
1488 be_emit_cstring(env, "l %");
1489 be_emit_string(env, sreg);
1490 be_emit_cstring(env, ", ");
1491 ia32_emit_dest_register(env, node, 0);
1494 case ia32_AddrModeS: {
1495 be_emit_cstring(env, "\tmov");
1496 be_emit_string(env, sign_suffix);
1497 ia32_emit_mode_suffix(env, smaller_mode);
1498 be_emit_cstring(env, "l %");
1499 ia32_emit_am(env, node);
1500 be_emit_cstring(env, ", ");
1501 ia32_emit_dest_register(env, node, 0);
1505 assert(0 && "unsupported op type for Conv");
1507 be_emit_finish_line_gas(env, node);
1511 * Emits code for an 8Bit Int conversion.
1513 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1514 emit_ia32_Conv_I2I(env, node);
1518 /*******************************************
1521 * | |__ ___ _ __ ___ __| | ___ ___
1522 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1523 * | |_) | __/ | | | (_) | (_| | __/\__ \
1524 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1526 *******************************************/
1529 * Emits a backend call
1532 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1533 ir_entity *ent = be_Call_get_entity(node);
1535 be_emit_cstring(env, "\tcall ");
1537 mark_entity_visited(ent);
1538 be_emit_string(env, get_entity_ld_name(ent));
1540 be_emit_char(env, '*');
1541 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1543 be_emit_finish_line_gas(env, node);
1547 * Emits code to increase stack pointer.
1550 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1551 int offs = be_get_IncSP_offset(node);
1557 be_emit_cstring(env, "\tsubl $");
1558 be_emit_irprintf(env->emit, "%u, ", offs);
1559 ia32_emit_source_register(env, node, 0);
1561 be_emit_cstring(env, "\taddl $");
1562 be_emit_irprintf(env->emit, "%u, ", -offs);
1563 ia32_emit_source_register(env, node, 0);
1565 be_emit_finish_line_gas(env, node);
1569 * Emits code to set stack pointer.
1572 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1573 be_emit_cstring(env, "\tmovl ");
1574 ia32_emit_source_register(env, node, 2);
1575 be_emit_cstring(env, ", ");
1576 ia32_emit_dest_register(env, node, 0);
1577 be_emit_finish_line_gas(env, node);
1581 * Emits code for Copy/CopyKeep.
1584 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1586 const arch_env_t *aenv = env->arch_env;
1589 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1590 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1593 mode = get_irn_mode(node);
1594 if (mode == mode_E) {
1595 be_emit_cstring(env, "\tmovsd ");
1596 ia32_emit_source_register(env, node, 0);
1597 be_emit_cstring(env, ", ");
1598 ia32_emit_dest_register(env, node, 0);
1600 be_emit_cstring(env, "\tmovl ");
1601 ia32_emit_source_register(env, node, 0);
1602 be_emit_cstring(env, ", ");
1603 ia32_emit_dest_register(env, node, 0);
1605 be_emit_finish_line_gas(env, node);
1609 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1610 Copy_emitter(env, node, be_get_Copy_op(node));
1614 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1615 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1619 * Emits code for exchange.
1622 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1623 const arch_register_t *in1, *in2;
1624 const arch_register_class_t *cls1, *cls2;
1626 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1627 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1629 cls1 = arch_register_get_class(in1);
1630 cls2 = arch_register_get_class(in2);
1632 assert(cls1 == cls2 && "Register class mismatch at Perm");
1634 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1635 be_emit_cstring(env, "\txchg ");
1636 ia32_emit_source_register(env, node, 1);
1637 be_emit_cstring(env, ", ");
1638 ia32_emit_source_register(env, node, 0);
1639 be_emit_finish_line_gas(env, node);
1640 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1641 be_emit_cstring(env, "\txorpd ");
1642 ia32_emit_source_register(env, node, 1);
1643 be_emit_cstring(env, ", ");
1644 ia32_emit_source_register(env, node, 0);
1645 be_emit_finish_line_gas(env, NULL);
1647 be_emit_cstring(env, "\txorpd ");
1648 ia32_emit_source_register(env, node, 0);
1649 be_emit_cstring(env, ", ");
1650 ia32_emit_source_register(env, node, 1);
1651 be_emit_finish_line_gas(env, NULL);
1653 be_emit_cstring(env, "\txorpd ");
1654 ia32_emit_source_register(env, node, 1);
1655 be_emit_cstring(env, ", ");
1656 ia32_emit_source_register(env, node, 0);
1657 be_emit_finish_line_gas(env, node);
1658 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1660 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1666 * Emits code for Constant loading.
1669 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1670 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1672 if (imm_tp == ia32_ImmSymConst) {
1673 be_emit_cstring(env, "\tmovl ");
1674 ia32_emit_immediate(env, node);
1675 be_emit_cstring(env, ", ");
1676 ia32_emit_dest_register(env, node, 0);
1678 tarval *tv = get_ia32_Immop_tarval(node);
1679 assert(get_irn_mode(node) == mode_Iu);
1680 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1681 if (tarval_is_null(tv)) {
1682 if (env->isa->opt_arch == arch_pentium_4) {
1683 /* P4 prefers sub r, r, others xor r, r */
1684 be_emit_cstring(env, "\tsubl ");
1686 be_emit_cstring(env, "\txorl ");
1688 ia32_emit_dest_register(env, node, 0);
1689 be_emit_cstring(env, ", ");
1690 ia32_emit_dest_register(env, node, 0);
1692 be_emit_cstring(env, "\tmovl ");
1693 ia32_emit_immediate(env, node);
1694 be_emit_cstring(env, ", ");
1695 ia32_emit_dest_register(env, node, 0);
1698 be_emit_finish_line_gas(env, node);
1702 * Emits code to load the TLS base
1705 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1706 be_emit_cstring(env, "\tmovl %gs:0, ");
1707 ia32_emit_dest_register(env, node, 0);
1708 be_emit_finish_line_gas(env, node);
1712 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1713 be_emit_cstring(env, "\tret");
1714 be_emit_finish_line_gas(env, node);
1718 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1722 /***********************************************************************************
1725 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1726 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1727 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1728 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1730 ***********************************************************************************/
1733 * Enters the emitter functions for handled nodes into the generic
1734 * pointer of an opcode.
1737 void ia32_register_emitters(void) {
1739 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1740 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1741 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1742 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1743 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1744 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1746 /* first clear the generic function pointer for all ops */
1747 clear_irp_opcodes_generic_func();
1749 /* register all emitter functions defined in spec */
1750 ia32_register_spec_emitters();
1752 /* other ia32 emitter functions */
1758 IA32_EMIT(PsiCondCMov);
1760 IA32_EMIT(PsiCondSet);
1761 IA32_EMIT(SwitchJmp);
1764 IA32_EMIT(Conv_I2FP);
1765 IA32_EMIT(Conv_FP2I);
1766 IA32_EMIT(Conv_FP2FP);
1767 IA32_EMIT(Conv_I2I);
1768 IA32_EMIT(Conv_I2I8Bit);
1773 IA32_EMIT(xCmpCMov);
1774 IA32_EMIT(xCondJmp);
1775 IA32_EMIT2(fcomJmp, x87CondJmp);
1776 IA32_EMIT2(fcompJmp, x87CondJmp);
1777 IA32_EMIT2(fcomppJmp, x87CondJmp);
1778 IA32_EMIT2(fcomrJmp, x87CondJmp);
1779 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1780 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1782 /* benode emitter */
1808 static const char *last_name = NULL;
1809 static unsigned last_line = -1;
1810 static unsigned num = -1;
1813 * Emit the debug support for node node.
1816 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1817 dbg_info *db = get_irn_dbg_info(node);
1819 const char *fname = be_retrieve_dbg_info(db, &lineno);
1821 if (! env->cg->birg->main_env->options->stabs_debug_support)
1825 if (last_name != fname) {
1827 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1830 if (last_line != lineno) {
1833 snprintf(name, sizeof(name), ".LM%u", ++num);
1835 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1836 be_emit_string(env, name);
1837 be_emit_cstring(env, ":\n");
1838 be_emit_write_line(env);
1843 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1846 * Emits code for a node.
1849 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1850 ir_op *op = get_irn_op(node);
1852 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
1854 if (op->ops.generic) {
1855 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1856 ia32_emit_dbg(env, node);
1857 (*func) (env, node);
1859 emit_Nothing(env, node);
1860 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1865 * Emits gas alignment directives
1868 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1869 be_emit_cstring(env, "\t.p2align ");
1870 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
1871 be_emit_write_line(env);
1875 * Emits gas alignment directives for Functions depended on cpu architecture.
1878 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1880 unsigned maximum_skip;
1895 maximum_skip = (1 << align) - 1;
1896 ia32_emit_alignment(env, align, maximum_skip);
1900 * Emits gas alignment directives for Labels depended on cpu architecture.
1903 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1904 unsigned align; unsigned maximum_skip;
1919 maximum_skip = (1 << align) - 1;
1920 ia32_emit_alignment(env, align, maximum_skip);
1924 * Test wether a block should be aligned.
1925 * For cpus in the P4/Athlon class it is usefull to align jump labels to
1926 * 16 bytes. However we should only do that if the alignment nops before the
1927 * label aren't executed more often than we have jumps to the label.
1930 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
1931 static const double DELTA = .0001;
1932 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1934 double prev_freq = 0; /**< execfreq of the fallthrough block */
1935 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
1936 cpu_support cpu = env->isa->opt_arch;
1939 if(exec_freq == NULL)
1941 if(cpu == arch_i386 || cpu == arch_i486)
1944 block_freq = get_block_execfreq(exec_freq, block);
1945 if(block_freq < DELTA)
1948 n_cfgpreds = get_Block_n_cfgpreds(block);
1949 for(i = 0; i < n_cfgpreds; ++i) {
1950 ir_node *pred = get_Block_cfgpred_block(block, i);
1951 double pred_freq = get_block_execfreq(exec_freq, pred);
1954 assert(prev_freq == 0);
1955 prev_freq += pred_freq;
1957 jmp_freq += pred_freq;
1961 if(prev_freq < DELTA && !(jmp_freq < DELTA))
1964 jmp_freq /= prev_freq;
1968 case arch_athlon_64:
1970 return jmp_freq > 3;
1972 return jmp_freq > 2;
1977 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
1982 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1985 n_cfgpreds = get_Block_n_cfgpreds(block);
1986 if (n_cfgpreds == 0) {
1988 } else if (n_cfgpreds == 1) {
1989 ir_node *pred = get_Block_cfgpred(block, 0);
1990 ir_node *pred_block = get_nodes_block(pred);
1992 /* we don't need labels for fallthrough blocks, however switch-jmps
1993 * are no fallthoughs */
1994 if(pred_block == prev &&
1995 !(is_Proj(pred) && is_ia32_SwitchJmp(get_Proj_pred(pred)))) {
2004 if (should_align_block(env, block, prev)) {
2006 ia32_emit_align_label(env, env->isa->opt_arch);
2010 ia32_emit_block_name(env, block);
2011 be_emit_char(env, ':');
2013 be_emit_pad_comment(env);
2014 be_emit_cstring(env, " /* preds:");
2016 /* emit list of pred blocks in comment */
2017 arity = get_irn_arity(block);
2018 for (i = 0; i < arity; ++i) {
2019 ir_node *predblock = get_Block_cfgpred_block(block, i);
2020 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2023 if (exec_freq != NULL) {
2024 be_emit_irprintf(env->emit, " freq: %f",
2025 get_block_execfreq(exec_freq, block));
2027 be_emit_cstring(env, " */\n");
2029 be_emit_cstring(env, "\t/* ");
2030 ia32_emit_block_name(env, block);
2031 be_emit_cstring(env, ": */\n");
2033 be_emit_write_line(env);
2037 * Walks over the nodes in a block connected by scheduling edges
2038 * and emits code for each node.
2041 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2043 const ir_node *node;
2045 ia32_emit_block_header(env, block, last_block);
2047 /* emit the contents of the block */
2048 ia32_emit_dbg(env, block);
2049 sched_foreach(block, node) {
2050 ia32_emit_node(env, node);
2055 * Emits code for function start.
2058 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2059 ir_entity *irg_ent = get_irg_entity(irg);
2060 const char *irg_name = get_entity_ld_name(irg_ent);
2061 cpu_support cpu = env->isa->opt_arch;
2062 const be_irg_t *birg = env->cg->birg;
2064 be_emit_write_line(env);
2065 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2066 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2067 ia32_emit_align_func(env, cpu);
2068 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2069 be_emit_cstring(env, ".global ");
2070 be_emit_string(env, irg_name);
2071 be_emit_char(env, '\n');
2072 be_emit_write_line(env);
2074 ia32_emit_function_object(env, irg_name);
2075 be_emit_string(env, irg_name);
2076 be_emit_cstring(env, ":\n");
2077 be_emit_write_line(env);
2081 * Emits code for function end
2084 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2085 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2086 const be_irg_t *birg = env->cg->birg;
2088 ia32_emit_function_size(env, irg_name);
2089 be_dbg_method_end(birg->main_env->db_handle);
2090 be_emit_char(env, '\n');
2091 be_emit_write_line(env);
2096 * Sets labels for control flow nodes (jump target)
2099 void ia32_gen_labels(ir_node *block, void *data) {
2101 int n = get_Block_n_cfgpreds(block);
2103 for (n--; n >= 0; n--) {
2104 pred = get_Block_cfgpred(block, n);
2105 set_irn_link(pred, block);
2110 * Main driver. Emits the code for one routine.
2112 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2113 ia32_emit_env_t env;
2115 ir_node *last_block = NULL;
2118 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2119 env.emit = &env.isa->emit;
2120 env.arch_env = cg->arch_env;
2123 ia32_register_emitters();
2125 ia32_emit_func_prolog(&env, irg);
2126 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2128 n = ARR_LEN(cg->blk_sched);
2129 for (i = 0; i < n;) {
2132 block = cg->blk_sched[i];
2134 next_bl = i < n ? cg->blk_sched[i] : NULL;
2136 /* set here the link. the emitter expects to find the next block here */
2137 set_irn_link(block, next_bl);
2138 ia32_gen_block(&env, block, last_block);
2142 ia32_emit_func_epilog(&env, irg);
2145 void ia32_init_emitter(void)
2147 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");