16 #include "../besched.h"
18 #include "ia32_emitter.h"
19 #include "gen_ia32_emitter.h"
20 #include "ia32_nodes_attr.h"
21 #include "ia32_new_nodes.h"
22 #include "ia32_map_regs.h"
24 #define SNPRINTF_BUF_LEN 128
26 static const arch_env_t *arch_env = NULL;
28 char *ia32_emit_binop(ir_node *irn) {
32 char *ia32_emit_unop(ir_node *irn) {
36 char *ia32_emit_am(ir_node *irn) {
40 /*************************************************************
42 * (_) | | / _| | | | |
43 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
44 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
45 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
46 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
49 *************************************************************/
52 * Return node's tarval as string.
54 const char *node_const_to_str(ir_node *n) {
55 char *s = get_ia32_cnst(n);
64 * Returns node's offset as string.
66 char *node_offset_to_str(ir_node *n) {
67 char *s = get_ia32_am_offs(n);
75 /* We always pass the ir_node which is a pointer. */
76 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
77 return lc_arg_type_ptr;
82 * Returns the register at in position pos.
84 static const arch_register_t *get_in_reg(ir_node *irn, int pos) {
86 const arch_register_t *reg = NULL;
88 assert(get_irn_arity(irn) > pos && "Invalid IN position");
90 /* The out register of the operator at position pos is the
91 in register we need. */
92 op = get_irn_n(irn, pos);
94 reg = arch_get_irn_register(arch_env, op);
96 assert(reg && "no in register found");
101 * Returns the register at out position pos.
103 static const arch_register_t *get_out_reg(ir_node *irn, int pos) {
105 const arch_register_t *reg = NULL;
107 assert(get_irn_n_edges(irn) > pos && "Invalid OUT position");
109 /* 1st case: irn is not of mode_T, so it has only */
110 /* one OUT register -> good */
111 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
112 /* Proj with the corresponding projnum for the register */
114 if (get_irn_mode(irn) != mode_T) {
115 reg = arch_get_irn_register(arch_env, irn);
117 else if (is_ia32_irn(irn)) {
118 reg = get_ia32_out_reg(irn, pos);
121 const ir_edge_t *edge;
123 foreach_out_edge(irn, edge) {
124 proj = get_edge_src_irn(edge);
125 assert(is_Proj(proj) && "non-Proj from mode_T node");
126 if (get_Proj_proj(proj) == pos) {
127 reg = arch_get_irn_register(arch_env, proj);
133 assert(reg && "no out register found");
138 * Returns the number of the in register at position pos.
140 int get_ia32_reg_nr(ir_node *irn, int pos, int in_out) {
141 const arch_register_t *reg;
144 reg = get_in_reg(irn, pos);
147 reg = get_out_reg(irn, pos);
150 return arch_register_get_index(reg);
154 * Returns the name of the in register at position pos.
156 const char *get_ia32_reg_name(ir_node *irn, int pos, int in_out) {
157 const arch_register_t *reg;
160 reg = get_in_reg(irn, pos);
163 reg = get_out_reg(irn, pos);
166 return arch_register_get_name(reg);
170 * Get the register name for a node.
172 static int ia32_get_reg_name(lc_appendable_t *app,
173 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
176 ir_node *X = arg->v_ptr;
177 int nr = occ->width - 1;
180 return lc_arg_append(app, occ, "(null)", 6);
182 if (occ->conversion == 'S') {
183 buf = get_ia32_reg_name(X, nr, 1);
186 buf = get_ia32_reg_name(X, nr, 0);
189 lc_appendable_chadd(app, '%');
190 return lc_arg_append(app, occ, buf, strlen(buf));
194 * Returns the tarval or offset of an ia32 as a string.
196 static int ia32_const_to_str(lc_appendable_t *app,
197 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
200 ir_node *X = arg->v_ptr;
203 return lc_arg_append(app, occ, "(null)", 6);
205 if (occ->conversion == 'C') {
206 buf = node_const_to_str(X);
209 buf = node_offset_to_str(X);
212 return lc_arg_append(app, occ, buf, strlen(buf));
216 * Determines the SSE suffix depending on the mode.
218 static int ia32_get_mode_suffix(lc_appendable_t *app,
219 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
221 ir_node *X = arg->v_ptr;
224 return lc_arg_append(app, occ, "(null)", 6);
226 if (get_mode_size_bits(get_irn_mode(X)) == 32)
227 return lc_appendable_chadd(app, 's');
229 return lc_appendable_chadd(app, 'd');
233 * Return the ia32 printf arg environment.
234 * We use the firm environment with some additional handlers.
236 const lc_arg_env_t *ia32_get_arg_env(void) {
237 static lc_arg_env_t *env = NULL;
239 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
240 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
241 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
244 /* extend the firm printer */
245 env = firm_get_arg_env();
248 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
249 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
250 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
251 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
252 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
259 * For 2-address code we need to make sure the first src reg is equal to dest reg.
261 void equalize_dest_src(FILE *F, ir_node *n) {
262 if (get_ia32_reg_nr(n, 0, 1) != get_ia32_reg_nr(n, 0, 0)) {
263 if (get_irn_arity(n) > 1 && get_ia32_reg_nr(n, 1, 1) == get_ia32_reg_nr(n, 0, 0)) {
264 if (! is_op_commutative(get_irn_op(n))) {
265 /* we only need to exchange for non-commutative ops */
266 lc_efprintf(ia32_get_arg_env(), F, "\txchg %1S, %2S\t\t\t/* xchg src1 <-> src2 for 2 address code */\n", n, n);
270 lc_efprintf(ia32_get_arg_env(), F, "\tmovl %1S, %1D\t\t\t/* src -> dest for 2 address code */\n", n, n);
276 * Add a number to a prefix. This number will not be used a second time.
278 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
279 static unsigned long id = 0;
280 snprintf(buf, buflen, "%s%lu", prefix, ++id);
285 /*************************************************
288 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
289 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
290 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
291 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
293 *************************************************/
296 * coding of conditions
298 struct cmp2conditon_t {
304 * positive conditions for signed compares
306 static const struct cmp2conditon_t cmp2condition_s[] = {
307 { NULL, pn_Cmp_False }, /* always false */
308 { "e", pn_Cmp_Eq }, /* == */
309 { "l", pn_Cmp_Lt }, /* < */
310 { "le", pn_Cmp_Le }, /* <= */
311 { "g", pn_Cmp_Gt }, /* > */
312 { "ge", pn_Cmp_Ge }, /* >= */
313 { "ne", pn_Cmp_Lg }, /* != */
314 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
315 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
316 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
317 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
318 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
319 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
320 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
321 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
322 { NULL, pn_Cmp_True }, /* always true */
326 * positive conditions for unsigned compares
328 static const struct cmp2conditon_t cmp2condition_u[] = {
329 { NULL, pn_Cmp_False }, /* always false */
330 { "e", pn_Cmp_Eq }, /* == */
331 { "b", pn_Cmp_Lt }, /* < */
332 { "be", pn_Cmp_Le }, /* <= */
333 { "a", pn_Cmp_Gt }, /* > */
334 { "ae", pn_Cmp_Ge }, /* >= */
335 { "ne", pn_Cmp_Lg }, /* != */
336 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
337 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
338 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
339 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
340 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
341 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
342 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
343 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
344 { NULL, pn_Cmp_True }, /* always true */
348 * returns the condition code
350 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
352 assert(cmp2condition_s[cmp_code].num == cmp_code);
353 assert(cmp2condition_u[cmp_code].num == cmp_code);
355 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
359 * Returns the target label for a control flow node.
361 static char *get_cfop_target(const ir_node *irn, char *buf) {
362 ir_node *bl = get_irn_link(irn);
364 snprintf(buf, SNPRINTF_BUF_LEN, "BLOCK_%ld", get_irn_node_nr(bl));
369 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
371 static void finish_CondJmp(FILE *F, ir_node *irn) {
373 const ir_edge_t *edge;
374 char buf[SNPRINTF_BUF_LEN];
376 edge = get_irn_out_edge_first(irn);
377 proj = get_edge_src_irn(edge);
378 assert(is_Proj(proj) && "CondJmp with a non-Proj");
380 if (get_Proj_proj(proj) == 1) {
381 fprintf(F, "\tj%s %s\t\t\t/* cmp(a, b) == TRUE */\n",
382 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
383 get_cfop_target(proj, buf));
386 fprintf(F, "\tjn%s %s\t\t\t/* cmp(a, b) == FALSE */\n",
387 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
388 get_cfop_target(proj, buf));
391 edge = get_irn_out_edge_next(irn, edge);
393 proj = get_edge_src_irn(edge);
394 assert(is_Proj(proj) && "CondJmp with a non-Proj");
395 fprintf(F, "\tjmp %s\t\t\t/* otherwise */\n", get_cfop_target(proj, buf));
400 * Emits code for conditional jump with two variables.
402 static void emit_ia32_CondJmp(ir_node *irn, emit_env_t *env) {
405 lc_efprintf(ia32_get_arg_env(), F, "\tcmp %2S, %1S\t\t\t/* CondJmp(%+F, %+F) */\n", irn, irn,
406 get_irn_n(irn, 0), get_irn_n(irn, 1));
407 finish_CondJmp(F, irn);
411 * Emits code for conditional jump with immediate.
413 void emit_ia32_CondJmp_i(ir_node *irn, emit_env_t *env) {
416 lc_efprintf(ia32_get_arg_env(), F, "\tcmp %C, %1S\t\t\t/* CondJmp_i(%+F) */\n", irn, irn, get_irn_n(irn, 0));
417 finish_CondJmp(F, irn);
422 /*********************************************************
425 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
426 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
427 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
428 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
431 *********************************************************/
433 /* jump table entry (target and corresponding number) */
434 typedef struct _branch_t {
439 /* jump table for switch generation */
440 typedef struct _jmp_tbl_t {
441 ir_node *defProj; /**< default target */
442 int min_value; /**< smallest switch case */
443 int max_value; /**< largest switch case */
444 int num_branches; /**< number of jumps */
445 char *label; /**< label of the jump table */
446 branch_t *branches; /**< jump array */
450 * Compare two variables of type branch_t. Used to sort all switch cases
452 static int ia32_cmp_branch_t(const void *a, const void *b) {
453 branch_t *b1 = (branch_t *)a;
454 branch_t *b2 = (branch_t *)b;
456 if (b1->value <= b2->value)
463 * Emits code for a SwitchJmp (creates a jump table if
464 * possible otherwise a cmp-jmp cascade). Port from
467 void emit_ia32_SwitchJmp(const ir_node *irn, emit_env_t *emit_env) {
468 unsigned long interval;
469 char buf[SNPRINTF_BUF_LEN];
470 int last_value, i, pn, do_jmp_tbl = 1;
473 const ir_edge_t *edge;
474 const lc_arg_env_t *env = ia32_get_arg_env();
475 FILE *F = emit_env->out;
477 /* fill the table structure */
478 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
479 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
481 tbl.num_branches = get_irn_n_edges(irn);
482 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
483 tbl.min_value = INT_MAX;
484 tbl.max_value = INT_MIN;
487 /* go over all proj's and collect them */
488 foreach_out_edge(irn, edge) {
489 proj = get_edge_src_irn(edge);
490 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
492 pn = get_Proj_proj(proj);
494 /* create branch entry */
495 tbl.branches[i].target = proj;
496 tbl.branches[i].value = pn;
498 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
499 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
501 /* check for default proj */
502 if (pn == get_ia32_pncode(irn)) {
503 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
510 /* sort the branches by their number */
511 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
513 /* two-complement's magic make this work without overflow */
514 interval = tbl.max_value - tbl.min_value;
516 /* check value interval */
517 if (interval > 16 * 1024) {
521 /* check ratio of value interval to number of branches */
522 if ((float)(interval + 1) / (float)tbl.num_branches > 8.0) {
528 if (tbl.min_value != 0) {
529 fprintf(F, "\tcmpl %lu, -%d", interval, tbl.min_value);
530 lc_efprintf(env, F, "(%1S)\t\t/* first switch value is not 0 */\n", irn);
533 fprintf(F, "\tcmpl %lu, ", interval);
534 lc_efprintf(env, F, "%1S\t\t\t/* compare for switch */\n", irn);
537 fprintf(F, "\tja %s\t\t\t/* default jump if out of range */\n", get_cfop_target(tbl.defProj, buf));
539 if (tbl.num_branches > 1) {
542 //fprintf(F, "\tjmp *%s", tbl.label);
543 lc_efprintf(env, F, "\tjmp *%s(,%1S,4)\t\t/* get jump table entry as target */\n", tbl.label, irn);
545 fprintf(F, "\t.section\t.rodata\t\t/* start jump table */\n");
546 fprintf(F, "\t.align 4\n");
548 fprintf(F, "%s:\n", tbl.label);
549 fprintf(F, "\t.long %s\t\t\t/* case %d */\n", get_cfop_target(tbl.branches[0].target, buf), tbl.branches[0].value);
551 last_value = tbl.branches[0].value;
552 for (i = 1; i < tbl.num_branches; ++i) {
553 while (++last_value < tbl.branches[i].value) {
554 fprintf(F, "\t.long %s\t\t/* default case */\n", get_cfop_target(tbl.defProj, buf));
556 fprintf(F, "\t.long %s\t\t\t/* case %d */\n", get_cfop_target(tbl.branches[i].target, buf), last_value);
559 fprintf(F, "\t.text\t\t\t\t/* end of jump table */\n");
562 /* one jump is enough */
563 fprintf(F, "\tjmp %s\t\t/* only one case given */\n", get_cfop_target(tbl.branches[0].target, buf));
566 else { // no jump table
567 for (i = 0; i < tbl.num_branches; ++i) {
568 fprintf(F, "\tcmpl %d, ", tbl.branches[i].value);
569 lc_efprintf(env, F, "%1S", irn);
570 fprintf(F, "\t\t\t/* case %d */\n", tbl.branches[i].value);
571 fprintf(F, "\tje %s\n", get_cfop_target(tbl.branches[i].target, buf));
574 fprintf(F, "\tjmp %s\t\t\t/* default case */\n", get_cfop_target(tbl.defProj, buf));
584 * Emits code for a unconditional jump.
586 void emit_Jmp(ir_node *irn, emit_env_t *env) {
589 char buf[SNPRINTF_BUF_LEN];
590 ir_fprintf(F, "\tjmp %s\t\t\t/* Jmp(%+F) */\n", get_cfop_target(irn, buf), get_irn_link(irn));
595 /****************************
598 * _ __ _ __ ___ _ ___
599 * | '_ \| '__/ _ \| |/ __|
600 * | |_) | | | (_) | |\__ \
601 * | .__/|_| \___/| ||___/
604 ****************************/
607 * Emits code for a proj -> node
609 void emit_Proj(ir_node *irn, emit_env_t *env) {
610 ir_node *pred = get_Proj_pred(irn);
612 if (get_irn_op(pred) == op_Start) {
613 switch(get_Proj_proj(irn)) {
614 case pn_Start_X_initial_exec:
623 /********************
631 ********************/
633 void emit_ia32_Call(ir_node *irn, emit_env_t *emit_env) {
634 int i, n = get_irn_arity(irn);
636 ir_node *sync = get_irn_n(irn, n - 1);
637 FILE *F = emit_env->out;
638 const lc_arg_env_t *env = ia32_get_arg_env();
640 if (get_irn_op(sync) == op_Sync) {
641 /* We have stack arguments */
642 ir_node **args = get_Sync_preds_arr(sync);
644 for (i = 0; i < get_Sync_n_preds(sync); i++) {
645 ir_node *n = get_irn_n(args[i], 1);
646 lc_efprintf(env, F, "\tpush %1D\t\t\t\t/* push %+F(%+F) on stack */\n", n, args[i], n);
648 if (mode_is_float(get_irn_mode(n))) {
657 lc_efprintf(env, F, "\tcall %C\t\t\t/* %+F */\n", irn, irn);
659 if (get_irn_op(sync) == op_Sync) {
660 /* We had stack arguments: clear the stack */
661 fprintf(F, "\tadd %d, ", args_size);
662 if (emit_env->cg->has_alloca) {
668 fprintf(F, "\t\t\t\t/* clear stack after call */\n");
675 * Emits code for Alloca (increase stack pointer, cpoy to destination)
677 void emit_Alloca(ir_node *irn, emit_env_t *emit_env, int is_imm) {
678 const lc_arg_env_t *env = ia32_get_arg_env();
679 FILE *F = emit_env->out;
682 if (emit_env->cg->has_alloca) {
690 /* allocate the memory */
691 fprintf(F, "\tsub %s", sp);
694 lc_efprintf(env, F, "%C", irn);
697 lc_efprintf(env, F, "%1S", irn);
700 fprintf(F, "\t\t\t\t/* reserve memory on stack */\n");
702 /* copy the new stack pointer to destination register */
703 lc_efprintf(env, F, "\tmov %s, %1D\t\t\t/* copy stack pointer to destination */\n", sp, irn);
706 void emit_ia32_Alloca(ir_node *irn, emit_env_t *emit_env) {
707 emit_Alloca(irn, emit_env, 0);
710 void emit_ia32_Alloca_i(ir_node *irn, emit_env_t *emit_env) {
711 emit_Alloca(irn, emit_env, 1);
715 /***********************************************************************************
718 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
719 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
720 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
721 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
723 ***********************************************************************************/
726 * Emits code for a node.
728 void ia32_emit_node(ir_node *irn, void *env) {
729 emit_env_t *emit_env = env;
730 firm_dbg_module_t *mod = emit_env->mod;
731 FILE *F = emit_env->out;
733 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
735 #define IA32_EMIT(a) if (is_ia32_##a(irn)) { emit_ia32_##a(irn, emit_env); return; }
736 #define EMIT(a) if (get_irn_opcode(irn) == iro_##a) { emit_##a(irn, emit_env); return; }
738 /* generated int emitter functions */
771 /* generated floating point emitter */
786 /* other emitter functions */
788 IA32_EMIT(SwitchJmp);
794 ir_fprintf(F, "\t\t\t\t\t/* %+F */\n", irn);
798 * Walks over the nodes in a block connected by scheduling edges
799 * and emits code for each node.
801 void ia32_gen_block(ir_node *block, void *env) {
804 if (! is_Block(block))
807 fprintf(((emit_env_t *)env)->out, "BLOCK_%ld:\n", get_irn_node_nr(block));
808 sched_foreach(block, irn) {
809 ia32_emit_node(irn, env);
815 * Emits code for function start.
817 void ia32_emit_start(FILE *F, ir_graph *irg) {
818 const char *irg_name = get_entity_name(get_irg_entity(irg));
820 fprintf(F, "\t.text\n");
821 fprintf(F, ".globl %s\n", irg_name);
822 fprintf(F, "\t.type\t%s, @function\n", irg_name);
823 fprintf(F, "%s:\n", irg_name);
827 * Emits code for function end
829 void ia32_emit_end(FILE *F, ir_graph *irg) {
830 const char *irg_name = get_entity_name(get_irg_entity(irg));
832 fprintf(F, "\tret\n");
833 fprintf(F, "\t.size\t%s, .-%s\n\n", irg_name, irg_name);
837 * Sets labels for control flow nodes (jump target)
838 * TODO: Jump optimization
840 void ia32_gen_labels(ir_node *block, void *env) {
842 int n = get_Block_n_cfgpreds(block);
844 for (n--; n >= 0; n--) {
845 pred = get_Block_cfgpred(block, n);
846 set_irn_link(pred, block);
853 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
856 emit_env.mod = firm_dbg_register("ir.be.codegen.ia32");
858 emit_env.arch_env = cg->arch_env;
861 /* set the global arch_env (needed by print hooks) */
862 arch_env = cg->arch_env;
864 ia32_emit_start(F, irg);
865 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
866 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
867 ia32_emit_end(F, irg);