2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 /* in case of a joker register: just return a valid register */
90 if (arch_register_type_is(reg, joker)) {
91 const arch_register_req_t *req;
93 /* ask for the requirements */
94 req = arch_get_register_req(arch_env, irn, pos);
96 if (arch_register_req_is(req, limited)) {
97 /* in case of limited requirements: get the first allowed register */
98 unsigned idx = rbitset_next(req->limited, 0, 1);
99 reg = arch_register_for_index(req->cls, idx);
101 /* otherwise get first register in class */
102 reg = arch_register_for_index(req->cls, 0);
110 * Returns the register at out position pos.
113 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
116 const arch_env_t *arch_env = env->arch_env;
118 const arch_register_t *reg = NULL;
120 /* 1st case: irn is not of mode_T, so it has only */
121 /* one OUT register -> good */
122 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
123 /* Proj with the corresponding projnum for the register */
125 if (get_irn_mode(irn) != mode_T) {
126 reg = arch_get_irn_register(arch_env, irn);
127 } else if (is_ia32_irn(irn)) {
128 reg = get_ia32_out_reg(irn, pos);
130 const ir_edge_t *edge;
132 foreach_out_edge(irn, edge) {
133 proj = get_edge_src_irn(edge);
134 assert(is_Proj(proj) && "non-Proj from mode_T node");
135 if (get_Proj_proj(proj) == pos) {
136 reg = arch_get_irn_register(arch_env, proj);
142 assert(reg && "no out register found");
147 * Determine the gnu assembler suffix that indicates a mode
150 char get_mode_suffix(const ir_mode *mode) {
151 if(mode_is_float(mode)) {
152 switch(get_mode_size_bits(mode)) {
162 assert(mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode));
163 switch(get_mode_size_bits(mode)) {
174 panic("Can't output mode_suffix for %+F\n", mode);
178 int produces_result(const ir_node *node) {
179 return !(is_ia32_St(node) ||
180 is_ia32_CondJmp(node) ||
181 is_ia32_xCondJmp(node) ||
182 is_ia32_CmpSet(node) ||
183 is_ia32_xCmpSet(node) ||
184 is_ia32_SwitchJmp(node));
188 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
189 const arch_register_t *reg) {
190 switch(get_mode_size_bits(mode)) {
192 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
194 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
196 return (char *)arch_register_get_name(reg);
201 * Add a number to a prefix. This number will not be used a second time.
204 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
205 static unsigned long id = 0;
206 snprintf(buf, buflen, "%s%lu", prefix, ++id);
210 /*************************************************************
212 * (_) | | / _| | | | |
213 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
214 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
215 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
216 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
219 *************************************************************/
221 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
222 // be_emit_env_t* so we cheat a bit...
223 #define be_emit_char(env,c) be_emit_char(env->emit,c)
224 #define be_emit_string(env,s) be_emit_string(env->emit,s)
225 #undef be_emit_cstring
226 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
227 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
228 #define be_emit_tarval(env,tv) be_emit_tarval(env->emit,tv)
229 #define be_emit_write_line(env) be_emit_write_line(env->emit)
230 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
231 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
233 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
235 const arch_register_t *reg = get_in_reg(env, node, pos);
236 const char *reg_name = arch_register_get_name(reg);
238 assert(pos < get_irn_arity(node));
240 be_emit_char(env, '%');
241 be_emit_string(env, reg_name);
244 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
245 const arch_register_t *reg = get_out_reg(env, node, pos);
246 const char *reg_name = arch_register_get_name(reg);
248 be_emit_char(env, '%');
249 be_emit_string(env, reg_name);
252 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
254 const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
257 be_emit_char(env, '%');
258 be_emit_string(env, attr->x87[pos]->name);
261 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
267 be_emit_char(env, '$');
269 switch(get_ia32_immop_type(node)) {
271 tv = get_ia32_Immop_tarval(node);
272 be_emit_tarval(env, tv);
274 case ia32_ImmSymConst:
275 ent = get_ia32_Immop_symconst(node);
276 set_entity_backend_marked(ent, 1);
277 id = get_entity_ld_ident(ent);
278 be_emit_ident(env, id);
285 be_emit_string(env, "BAD");
290 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
292 be_emit_char(env, get_mode_suffix(mode));
295 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
297 ir_mode *mode = get_ia32_ls_mode(node);
301 ia32_emit_mode_suffix_mode(env, mode);
304 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
306 ir_mode *mode = get_ia32_ls_mode(node);
308 ia32_emit_mode_suffix_mode(env, mode);
312 char get_xmm_mode_suffix(ir_mode *mode)
314 assert(mode_is_float(mode));
315 switch(get_mode_size_bits(mode)) {
326 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
328 ir_mode *mode = get_ia32_ls_mode(node);
329 assert(mode != NULL);
330 be_emit_char(env, 's');
331 be_emit_char(env, get_xmm_mode_suffix(mode));
334 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
336 ir_mode *mode = get_ia32_ls_mode(node);
337 assert(mode != NULL);
338 be_emit_char(env, get_xmm_mode_suffix(mode));
341 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
343 if(get_mode_size_bits(mode) == 32)
345 if(mode_is_signed(mode)) {
346 be_emit_char(env, 's');
348 be_emit_char(env, 'z');
353 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
355 switch (be_gas_flavour) {
356 case GAS_FLAVOUR_NORMAL:
357 be_emit_cstring(env, "\t.type\t");
358 be_emit_string(env, name);
359 be_emit_cstring(env, ", @function\n");
360 be_emit_write_line(env);
362 case GAS_FLAVOUR_MINGW:
363 be_emit_cstring(env, "\t.def\t");
364 be_emit_string(env, name);
365 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
366 be_emit_write_line(env);
374 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
376 switch (be_gas_flavour) {
377 case GAS_FLAVOUR_NORMAL:
378 be_emit_cstring(env, "\t.size\t");
379 be_emit_string(env, name);
380 be_emit_cstring(env, ", .-");
381 be_emit_string(env, name);
382 be_emit_char(env, '\n');
383 be_emit_write_line(env);
392 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node);
395 * Emits registers and/or address mode of a binary operation.
397 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
399 const ir_node *right_op;
401 switch(get_ia32_op_type(node)) {
403 right_op = get_irn_n(node, 3);
404 if(is_ia32_Immediate(right_op)) {
405 emit_ia32_Immediate(env, right_op);
406 be_emit_cstring(env, ", ");
407 ia32_emit_source_register(env, node, 2);
409 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
410 ia32_emit_immediate(env, node);
411 be_emit_cstring(env, ", ");
412 ia32_emit_source_register(env, node, 2);
414 const arch_register_t *in1 = get_in_reg(env, node, 2);
415 const arch_register_t *in2 = get_in_reg(env, node, 3);
416 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
417 const arch_register_t *in;
420 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
421 out = out ? out : in1;
422 in_name = arch_register_get_name(in);
424 if (is_ia32_emit_cl(node)) {
425 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
429 be_emit_char(env, '%');
430 be_emit_string(env, in_name);
431 be_emit_cstring(env, ", %");
432 be_emit_string(env, arch_register_get_name(out));
436 ia32_emit_am(env, node);
437 be_emit_cstring(env, ", ");
438 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
439 assert(!produces_result(node) && "Source AM with Const must not produce result");
440 ia32_emit_immediate(env, node);
441 } else if (produces_result(node)) {
442 ia32_emit_dest_register(env, node, 0);
444 ia32_emit_source_register(env, node, 2);
448 right_pos = get_irn_arity(node) == 5 ? 3 : 2;
449 right_op = get_irn_n(node, right_pos);
450 if(is_ia32_Immediate(right_op)) {
451 emit_ia32_Immediate(env, right_op);
452 be_emit_cstring(env, ", ");
453 ia32_emit_am(env, node);
455 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
456 ia32_emit_immediate(env, node);
457 be_emit_cstring(env, ", ");
458 ia32_emit_am(env, node);
460 const arch_register_t *in1 = get_in_reg(env, node, right_pos);
461 ir_mode *mode = get_ia32_ls_mode(node);
464 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
466 if (is_ia32_emit_cl(node)) {
467 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
471 be_emit_char(env, '%');
472 be_emit_string(env, in_name);
473 be_emit_cstring(env, ", ");
474 ia32_emit_am(env, node);
478 assert(0 && "unsupported op type");
483 * Emits registers and/or address mode of a binary operation.
485 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
486 switch(get_ia32_op_type(node)) {
488 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
489 // should not happen...
492 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
493 const arch_register_t *in1 = x87_attr->x87[0];
494 const arch_register_t *in2 = x87_attr->x87[1];
495 const arch_register_t *out = x87_attr->x87[2];
496 const arch_register_t *in;
498 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
499 out = out ? out : in1;
501 be_emit_char(env, '%');
502 be_emit_string(env, arch_register_get_name(in));
503 be_emit_cstring(env, ", %");
504 be_emit_string(env, arch_register_get_name(out));
509 ia32_emit_am(env, node);
512 assert(0 && "unsupported op type");
516 void ia32_emit_am_or_dest_register(ia32_emit_env_t *env, const ir_node *node,
518 if(get_ia32_op_type(node) == ia32_Normal) {
519 ia32_emit_dest_register(env, node, pos);
521 assert(get_ia32_op_type(node) == ia32_AddrModeD);
522 ia32_emit_am(env, node);
527 * Emits registers and/or address mode of a unary operation.
529 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node, int pos) {
532 switch(get_ia32_op_type(node)) {
534 op = get_irn_n(node, pos);
535 if (is_ia32_Immediate(op)) {
536 emit_ia32_Immediate(env, op);
537 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
538 ia32_emit_immediate(env, node);
540 ia32_emit_source_register(env, node, pos);
545 ia32_emit_am(env, node);
548 assert(0 && "unsupported op type");
553 * Emits address mode.
555 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
556 ir_entity *ent = get_ia32_am_sc(node);
557 int offs = get_ia32_am_offs_int(node);
558 ir_node *base = get_irn_n(node, 0);
559 int has_base = !is_ia32_NoReg_GP(base);
560 ir_node *index = get_irn_n(node, 1);
561 int has_index = !is_ia32_NoReg_GP(index);
563 /* just to be sure... */
564 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
570 set_entity_backend_marked(ent, 1);
571 id = get_entity_ld_ident(ent);
572 if (is_ia32_am_sc_sign(node))
573 be_emit_char(env, '-');
574 be_emit_ident(env, id);
576 if(get_entity_owner(ent) == get_tls_type()) {
577 if (get_entity_visibility(ent) == visibility_external_allocated) {
578 be_emit_cstring(env, "@INDNTPOFF");
580 be_emit_cstring(env, "@NTPOFF");
587 be_emit_irprintf(env->emit, "%+d", offs);
589 be_emit_irprintf(env->emit, "%d", offs);
593 if (has_base || has_index) {
594 be_emit_char(env, '(');
598 ia32_emit_source_register(env, node, 0);
601 /* emit index + scale */
604 be_emit_char(env, ',');
605 ia32_emit_source_register(env, node, 1);
607 scale = get_ia32_am_scale(node);
609 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
612 be_emit_char(env, ')');
616 /*************************************************
619 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
620 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
621 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
622 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
624 *************************************************/
627 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
630 * coding of conditions
632 struct cmp2conditon_t {
638 * positive conditions for signed compares
641 const struct cmp2conditon_t cmp2condition_s[] = {
642 { NULL, pn_Cmp_False }, /* always false */
643 { "e", pn_Cmp_Eq }, /* == */
644 { "l", pn_Cmp_Lt }, /* < */
645 { "le", pn_Cmp_Le }, /* <= */
646 { "g", pn_Cmp_Gt }, /* > */
647 { "ge", pn_Cmp_Ge }, /* >= */
648 { "ne", pn_Cmp_Lg }, /* != */
649 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
650 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
651 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
652 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
653 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
654 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
655 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
656 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
657 { NULL, pn_Cmp_True }, /* always true */
661 * positive conditions for unsigned compares
664 const struct cmp2conditon_t cmp2condition_u[] = {
665 { NULL, pn_Cmp_False }, /* always false */
666 { "e", pn_Cmp_Eq }, /* == */
667 { "b", pn_Cmp_Lt }, /* < */
668 { "be", pn_Cmp_Le }, /* <= */
669 { "a", pn_Cmp_Gt }, /* > */
670 { "ae", pn_Cmp_Ge }, /* >= */
671 { "ne", pn_Cmp_Lg }, /* != */
672 { NULL, pn_Cmp_True }, /* always true */
676 * returns the condition code
679 const char *get_cmp_suffix(pn_Cmp cmp_code)
681 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
682 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
684 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
685 return cmp2condition_u[cmp_code & 7].name;
687 return cmp2condition_s[cmp_code & 15].name;
691 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
693 be_emit_string(env, get_cmp_suffix(pnc));
698 * Returns the target block for a control flow node.
701 ir_node *get_cfop_target_block(const ir_node *irn) {
702 return get_irn_link(irn);
706 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
708 be_emit_cstring(env, BLOCK_PREFIX);
709 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
713 * Returns the target label for a control flow node.
716 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
717 ir_node *block = get_cfop_target_block(node);
719 ia32_emit_block_name(env, block);
722 /** Return the next block in Block schedule */
723 static ir_node *next_blk_sched(const ir_node *block) {
724 return get_irn_link(block);
728 * Returns the Proj with projection number proj and NOT mode_M
731 ir_node *get_proj(const ir_node *node, long proj) {
732 const ir_edge_t *edge;
735 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
737 foreach_out_edge(node, edge) {
738 src = get_edge_src_irn(edge);
740 assert(is_Proj(src) && "Proj expected");
741 if (get_irn_mode(src) == mode_M)
744 if (get_Proj_proj(src) == proj)
751 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
754 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
756 const ir_node *proj_true;
757 const ir_node *proj_false;
758 const ir_node *block;
759 const ir_node *next_block;
762 /* get both Proj's */
763 proj_true = get_proj(node, pn_Cond_true);
764 assert(proj_true && "CondJmp without true Proj");
766 proj_false = get_proj(node, pn_Cond_false);
767 assert(proj_false && "CondJmp without false Proj");
769 /* for now, the code works for scheduled and non-schedules blocks */
770 block = get_nodes_block(node);
772 /* we have a block schedule */
773 next_block = next_blk_sched(block);
775 if (get_cfop_target_block(proj_true) == next_block) {
776 /* exchange both proj's so the second one can be omitted */
777 const ir_node *t = proj_true;
779 proj_true = proj_false;
782 pnc = get_negated_pnc(pnc, mode);
785 /* in case of unordered compare, check for parity */
786 if (pnc & pn_Cmp_Uo) {
787 be_emit_cstring(env, "\tjp ");
788 ia32_emit_cfop_target(env, proj_true);
789 be_emit_finish_line_gas(env, proj_true);
792 be_emit_cstring(env, "\tj");
793 ia32_emit_cmp_suffix(env, pnc);
794 be_emit_char(env, ' ');
795 ia32_emit_cfop_target(env, proj_true);
796 be_emit_finish_line_gas(env, proj_true);
798 /* the second Proj might be a fallthrough */
799 if (get_cfop_target_block(proj_false) != next_block) {
800 be_emit_cstring(env, "\tjmp ");
801 ia32_emit_cfop_target(env, proj_false);
802 be_emit_finish_line_gas(env, proj_false);
804 be_emit_cstring(env, "\t/* fallthrough to ");
805 ia32_emit_cfop_target(env, proj_false);
806 be_emit_cstring(env, " */");
807 be_emit_finish_line_gas(env, proj_false);
812 * Emits code for conditional jump.
815 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
816 be_emit_cstring(env, "\tcmp ");
817 ia32_emit_binop(env, node);
818 be_emit_finish_line_gas(env, node);
820 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
824 * Emits code for conditional jump with two variables.
827 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
828 CondJmp_emitter(env, node);
832 * Emits code for conditional test and jump.
835 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
836 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
837 be_emit_cstring(env, "\ttest ");
838 ia32_emit_immediate(env, node);
839 be_emit_cstring(env, ", ");
840 ia32_emit_source_register(env, node, 0);
841 be_emit_finish_line_gas(env, node);
843 be_emit_cstring(env, "\ttest ");
844 ia32_emit_source_register(env, node, 1);
845 be_emit_cstring(env, ", ");
846 ia32_emit_source_register(env, node, 0);
847 be_emit_finish_line_gas(env, node);
849 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
853 * Emits code for conditional test and jump with two variables.
856 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
857 TestJmp_emitter(env, node);
861 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
862 be_emit_cstring(env, "/* omitted redundant test */");
863 be_emit_finish_line_gas(env, node);
865 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
869 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
870 be_emit_cstring(env, "/* omitted redundant test/cmp */");
871 be_emit_finish_line_gas(env, node);
873 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
877 * Emits code for conditional SSE floating point jump with two variables.
880 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
881 be_emit_cstring(env, "\tucomi");
882 ia32_emit_xmm_mode_suffix(env, node);
883 be_emit_char(env, ' ');
884 ia32_emit_binop(env, node);
885 be_emit_finish_line_gas(env, node);
887 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
891 * Emits code for conditional x87 floating point jump with two variables.
894 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
895 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
896 const char *reg = x87_attr->x87[1]->name;
897 long pnc = get_ia32_pncode(node);
899 switch (get_ia32_irn_opcode(node)) {
900 case iro_ia32_fcomrJmp:
901 pnc = get_inversed_pnc(pnc);
902 reg = x87_attr->x87[0]->name;
903 case iro_ia32_fcomJmp:
905 be_emit_cstring(env, "\tfucom ");
907 case iro_ia32_fcomrpJmp:
908 pnc = get_inversed_pnc(pnc);
909 reg = x87_attr->x87[0]->name;
910 case iro_ia32_fcompJmp:
911 be_emit_cstring(env, "\tfucomp ");
913 case iro_ia32_fcomrppJmp:
914 pnc = get_inversed_pnc(pnc);
915 case iro_ia32_fcomppJmp:
916 be_emit_cstring(env, "\tfucompp ");
922 be_emit_char(env, '%');
923 be_emit_string(env, reg);
925 be_emit_finish_line_gas(env, node);
927 be_emit_cstring(env, "\tfnstsw %ax");
928 be_emit_finish_line_gas(env, node);
929 be_emit_cstring(env, "\tsahf");
930 be_emit_finish_line_gas(env, node);
932 finish_CondJmp(env, node, mode_E, pnc);
936 void emit_register_or_immediate(ia32_emit_env_t *env, const ir_node *node,
939 ir_node *op = get_irn_n(node, pos);
940 if(is_ia32_Immediate(op)) {
941 emit_ia32_Immediate(env, op);
943 ia32_emit_source_register(env, node, pos);
948 int is_ia32_Immediate_0(const ir_node *node)
950 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
952 return attr->offset == 0 && attr->symconst == NULL;
956 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node)
958 long pnc = get_ia32_pncode(node);
959 const arch_register_t *in1, *in2, *out;
961 out = arch_get_irn_register(env->arch_env, node);
962 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 2));
963 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 3));
965 /* we have to emit the cmp first, because the destination register */
966 /* could be one of the compare registers */
967 if (is_ia32_CmpCMov(node)) {
968 long pncr = pnc & ~ia32_pn_Cmp_Unsigned;
969 ir_node *cmp_right = get_irn_n(node, 1);
971 if( (pncr == pn_Cmp_Eq || pncr == pn_Cmp_Lg)
972 && is_ia32_Immediate(cmp_right)
973 && is_ia32_Immediate_0(cmp_right)) {
974 be_emit_cstring(env, "\ttest ");
975 ia32_emit_source_register(env, node, 0);
976 be_emit_cstring(env, ", ");
977 ia32_emit_source_register(env, node, 0);
979 be_emit_cstring(env, "\tcmp ");
980 emit_register_or_immediate(env, node, 1);
981 be_emit_cstring(env, ", ");
982 ia32_emit_source_register(env, node, 0);
984 } else if (is_ia32_xCmpCMov(node)) {
985 be_emit_cstring(env, "\tucomis");
986 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
987 be_emit_char(env, ' ');
988 ia32_emit_source_register(env, node, 1);
989 be_emit_cstring(env, ", ");
990 ia32_emit_source_register(env, node, 0);
992 assert(0 && "unsupported CMov");
994 be_emit_finish_line_gas(env, node);
996 if (REGS_ARE_EQUAL(out, in2)) {
997 /* best case: default in == out -> do nothing */
998 } else if (REGS_ARE_EQUAL(out, in1)) {
999 ir_node *n = (ir_node*) node;
1000 /* true in == out -> need complement compare and exchange true and default in */
1001 ir_node *t = get_irn_n(n, 2);
1002 set_irn_n(n, 2, get_irn_n(n, 3));
1005 pnc = get_negated_pnc(pnc, get_irn_mode(node));
1007 /* out is different from in: need copy default -> out */
1008 be_emit_cstring(env, "\tmovl ");
1009 ia32_emit_source_register(env, node, n_ia32_CmpCMov_val_false);
1010 be_emit_cstring(env, ", ");
1011 ia32_emit_dest_register(env, node, 0);
1012 be_emit_finish_line_gas(env, node);
1015 be_emit_cstring(env, "\tcmov");
1016 ia32_emit_cmp_suffix(env, pnc);
1017 be_emit_cstring(env, "l ");
1018 ia32_emit_source_register(env, node, n_ia32_CmpCMov_val_true);
1019 be_emit_cstring(env, ", ");
1020 ia32_emit_dest_register(env, node, 0);
1021 be_emit_finish_line_gas(env, node);
1025 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node)
1027 CMov_emitter(env, node);
1031 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node)
1033 CMov_emitter(env, node);
1037 void Set_emitter(ia32_emit_env_t *env, const ir_node *node)
1039 long pnc = get_ia32_pncode(node);
1040 const char *reg8bit;
1041 const arch_register_t *out;
1043 out = arch_get_irn_register(env->arch_env, node);
1044 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1046 if (is_ia32_CmpSet(node)) {
1047 long pncr = pnc & ~ia32_pn_Cmp_Unsigned;
1048 ir_node *cmp_right = get_irn_n(node, n_ia32_CmpSet_cmp_right);
1050 if( (pncr == pn_Cmp_Eq || pncr == pn_Cmp_Lg)
1051 && is_ia32_Immediate(cmp_right)
1052 && is_ia32_Immediate_0(cmp_right)) {
1053 be_emit_cstring(env, "\ttest ");
1054 ia32_emit_source_register(env, node, n_ia32_CmpSet_cmp_left);
1055 be_emit_cstring(env, ", ");
1056 ia32_emit_source_register(env, node, n_ia32_CmpSet_cmp_left);
1058 be_emit_cstring(env, "\tcmp ");
1059 ia32_emit_binop(env, node);
1061 } else if (is_ia32_xCmpSet(node)) {
1062 be_emit_cstring(env, "\tucomis");
1063 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1064 be_emit_char(env, ' ');
1065 ia32_emit_binop(env, node);
1067 assert(0 && "unsupported Set");
1069 be_emit_finish_line_gas(env, node);
1071 /* use mov to clear target because it doesn't affect the eflags */
1072 be_emit_cstring(env, "\tmovl $0, %");
1073 be_emit_string(env, arch_register_get_name(out));
1074 be_emit_finish_line_gas(env, node);
1076 be_emit_cstring(env, "\tset");
1077 ia32_emit_cmp_suffix(env, pnc);
1078 be_emit_cstring(env, " %");
1079 be_emit_string(env, reg8bit);
1080 be_emit_finish_line_gas(env, node);
1084 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1085 Set_emitter(env, node);
1089 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1090 Set_emitter(env, node);
1094 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1096 long pnc = get_ia32_pncode(node);
1097 long unord = pnc & pn_Cmp_Uo;
1099 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1102 case pn_Cmp_Leg: /* odered */
1105 case pn_Cmp_Uo: /* unordered */
1109 case pn_Cmp_Eq: /* == */
1113 case pn_Cmp_Lt: /* < */
1117 case pn_Cmp_Le: /* <= */
1121 case pn_Cmp_Gt: /* > */
1125 case pn_Cmp_Ge: /* >= */
1129 case pn_Cmp_Lg: /* != */
1134 assert(sse_pnc >= 0 && "unsupported compare");
1136 if (unord && sse_pnc != 3) {
1138 We need a separate compare against unordered.
1139 Quick and Dirty solution:
1140 - get some memory on stack
1144 - and result and stored result
1147 be_emit_cstring(env, "\tsubl $8, %esp");
1148 be_emit_finish_line_gas(env, node);
1150 be_emit_cstring(env, "\tcmpsd $3, ");
1151 ia32_emit_binop(env, node);
1152 be_emit_finish_line_gas(env, node);
1154 be_emit_cstring(env, "\tmovsd ");
1155 ia32_emit_dest_register(env, node, 0);
1156 be_emit_cstring(env, ", (%esp)");
1157 be_emit_finish_line_gas(env, node);
1160 be_emit_cstring(env, "\tcmpsd ");
1161 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1162 ia32_emit_binop(env, node);
1163 be_emit_finish_line_gas(env, node);
1165 if (unord && sse_pnc != 3) {
1166 be_emit_cstring(env, "\tandpd (%esp), ");
1167 ia32_emit_dest_register(env, node, 0);
1168 be_emit_finish_line_gas(env, node);
1170 be_emit_cstring(env, "\taddl $8, %esp");
1171 be_emit_finish_line_gas(env, node);
1175 /*********************************************************
1178 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1179 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1180 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1181 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1184 *********************************************************/
1186 /* jump table entry (target and corresponding number) */
1187 typedef struct _branch_t {
1192 /* jump table for switch generation */
1193 typedef struct _jmp_tbl_t {
1194 ir_node *defProj; /**< default target */
1195 long min_value; /**< smallest switch case */
1196 long max_value; /**< largest switch case */
1197 long num_branches; /**< number of jumps */
1198 char *label; /**< label of the jump table */
1199 branch_t *branches; /**< jump array */
1203 * Compare two variables of type branch_t. Used to sort all switch cases
1206 int ia32_cmp_branch_t(const void *a, const void *b) {
1207 branch_t *b1 = (branch_t *)a;
1208 branch_t *b2 = (branch_t *)b;
1210 if (b1->value <= b2->value)
1217 * Emits code for a SwitchJmp (creates a jump table if
1218 * possible otherwise a cmp-jmp cascade). Port from
1222 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1223 unsigned long interval;
1228 const ir_edge_t *edge;
1230 /* fill the table structure */
1231 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1232 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1234 tbl.num_branches = get_irn_n_edges(node);
1235 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1236 tbl.min_value = INT_MAX;
1237 tbl.max_value = INT_MIN;
1240 /* go over all proj's and collect them */
1241 foreach_out_edge(node, edge) {
1242 proj = get_edge_src_irn(edge);
1243 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1245 pnc = get_Proj_proj(proj);
1247 /* create branch entry */
1248 tbl.branches[i].target = proj;
1249 tbl.branches[i].value = pnc;
1251 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1252 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1254 /* check for default proj */
1255 if (pnc == get_ia32_pncode(node)) {
1256 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1263 /* sort the branches by their number */
1264 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1266 /* two-complement's magic make this work without overflow */
1267 interval = tbl.max_value - tbl.min_value;
1269 /* emit the table */
1270 be_emit_cstring(env, "\tcmpl $");
1271 be_emit_irprintf(env->emit, "%u, ", interval);
1272 ia32_emit_source_register(env, node, 0);
1273 be_emit_finish_line_gas(env, node);
1275 be_emit_cstring(env, "\tja ");
1276 ia32_emit_cfop_target(env, tbl.defProj);
1277 be_emit_finish_line_gas(env, node);
1279 if (tbl.num_branches > 1) {
1281 be_emit_cstring(env, "\tjmp *");
1282 be_emit_string(env, tbl.label);
1283 be_emit_cstring(env, "(,");
1284 ia32_emit_source_register(env, node, 0);
1285 be_emit_cstring(env, ",4)");
1286 be_emit_finish_line_gas(env, node);
1288 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1289 be_emit_cstring(env, "\t.align 4\n");
1290 be_emit_write_line(env);
1292 be_emit_string(env, tbl.label);
1293 be_emit_cstring(env, ":\n");
1294 be_emit_write_line(env);
1296 be_emit_cstring(env, ".long ");
1297 ia32_emit_cfop_target(env, tbl.branches[0].target);
1298 be_emit_finish_line_gas(env, NULL);
1300 last_value = tbl.branches[0].value;
1301 for (i = 1; i < tbl.num_branches; ++i) {
1302 while (++last_value < tbl.branches[i].value) {
1303 be_emit_cstring(env, ".long ");
1304 ia32_emit_cfop_target(env, tbl.defProj);
1305 be_emit_finish_line_gas(env, NULL);
1307 be_emit_cstring(env, ".long ");
1308 ia32_emit_cfop_target(env, tbl.branches[i].target);
1309 be_emit_finish_line_gas(env, NULL);
1311 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1313 /* one jump is enough */
1314 be_emit_cstring(env, "\tjmp ");
1315 ia32_emit_cfop_target(env, tbl.branches[0].target);
1316 be_emit_finish_line_gas(env, node);
1326 * Emits code for a unconditional jump.
1329 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1330 ir_node *block, *next_block;
1332 /* for now, the code works for scheduled and non-schedules blocks */
1333 block = get_nodes_block(node);
1335 /* we have a block schedule */
1336 next_block = next_blk_sched(block);
1337 if (get_cfop_target_block(node) != next_block) {
1338 be_emit_cstring(env, "\tjmp ");
1339 ia32_emit_cfop_target(env, node);
1341 be_emit_cstring(env, "\t/* fallthrough to ");
1342 ia32_emit_cfop_target(env, node);
1343 be_emit_cstring(env, " */");
1345 be_emit_finish_line_gas(env, node);
1349 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node)
1351 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
1353 be_emit_char(env, '$');
1354 if(attr->symconst != NULL) {
1355 ident *id = get_entity_ld_ident(attr->symconst);
1357 if(attr->attr.data.am_sc_sign)
1358 be_emit_char(env, '-');
1359 be_emit_ident(env, id);
1361 if(attr->symconst == NULL || attr->offset != 0) {
1362 if(attr->symconst != NULL)
1363 be_emit_char(env, '+');
1364 be_emit_irprintf(env->emit, "%d", attr->offset);
1369 const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
1372 const arch_register_t *reg;
1373 const char *reg_name;
1377 const ia32_attr_t *attr;
1384 /* parse modifiers */
1387 ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node);
1388 be_emit_char(env, '%');
1391 be_emit_char(env, '%');
1411 ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier "
1412 "'%c' for asm op\n", node, c);
1418 sscanf(s, "%d%n", &num, &p);
1420 ir_fprintf(stderr, "Warning: Couldn't parse assembler operand (%+F)\n",
1428 attr = get_ia32_attr_const(node);
1429 n_outs = ARR_LEN(attr->slots);
1431 reg = get_out_reg(env, node, num);
1434 int in = num - n_outs;
1435 if(in >= get_irn_arity(node)) {
1436 ir_fprintf(stderr, "Warning: Invalid input %d specified in asm "
1437 "op (%+F)\n", num, node);
1440 pred = get_irn_n(node, in);
1441 /* might be an immediate value */
1442 if(is_ia32_Immediate(pred)) {
1443 emit_ia32_Immediate(env, pred);
1446 reg = get_in_reg(env, node, in);
1449 ir_fprintf(stderr, "Warning: no register assigned for %d asm op "
1450 "(%+F)\n", num, node);
1455 be_emit_char(env, '%');
1458 reg_name = arch_register_get_name(reg);
1461 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
1464 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit_high, reg);
1467 reg_name = ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
1470 panic("Invalid asm op modifier");
1472 be_emit_string(env, reg_name);
1478 * Emits code for an ASM pseudo op.
1481 void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node)
1483 const void *gen_attr = get_irn_generic_attr_const(node);
1484 const ia32_asm_attr_t *attr
1485 = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, gen_attr);
1486 ident *asm_text = attr->asm_text;
1487 const char *s = get_id_str(asm_text);
1489 be_emit_cstring(env, "# Begin ASM \t");
1490 be_emit_finish_line_gas(env, node);
1493 be_emit_char(env, '\t');
1497 s = emit_asm_operand(env, node, s);
1500 be_emit_char(env, *s);
1505 be_emit_char(env, '\n');
1506 be_emit_write_line(env);
1508 be_emit_cstring(env, "# End ASM\n");
1509 be_emit_write_line(env);
1512 /**********************************
1515 * | | ___ _ __ _ _| |_) |
1516 * | | / _ \| '_ \| | | | _ <
1517 * | |___| (_) | |_) | |_| | |_) |
1518 * \_____\___/| .__/ \__, |____/
1521 **********************************/
1524 * Emit movsb/w instructions to make mov count divideable by 4
1527 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1528 be_emit_cstring(env, "\tcld");
1529 be_emit_finish_line_gas(env, NULL);
1533 be_emit_cstring(env, "\tmovsb");
1534 be_emit_finish_line_gas(env, NULL);
1537 be_emit_cstring(env, "\tmovsw");
1538 be_emit_finish_line_gas(env, NULL);
1541 be_emit_cstring(env, "\tmovsb");
1542 be_emit_finish_line_gas(env, NULL);
1543 be_emit_cstring(env, "\tmovsw");
1544 be_emit_finish_line_gas(env, NULL);
1550 * Emit rep movsd instruction for memcopy.
1553 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1554 tarval *tv = get_ia32_Immop_tarval(node);
1555 int rem = get_tarval_long(tv);
1557 emit_CopyB_prolog(env, rem);
1559 be_emit_cstring(env, "\trep movsd");
1560 be_emit_finish_line_gas(env, node);
1564 * Emits unrolled memcopy.
1567 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1568 tarval *tv = get_ia32_Immop_tarval(node);
1569 int size = get_tarval_long(tv);
1571 emit_CopyB_prolog(env, size & 0x3);
1575 be_emit_cstring(env, "\tmovsd");
1576 be_emit_finish_line_gas(env, NULL);
1582 /***************************
1586 * | | / _ \| '_ \ \ / /
1587 * | |___| (_) | | | \ V /
1588 * \_____\___/|_| |_|\_/
1590 ***************************/
1593 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1596 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1597 ir_mode *ls_mode = get_ia32_ls_mode(node);
1598 int ls_bits = get_mode_size_bits(ls_mode);
1600 be_emit_cstring(env, "\tcvt");
1602 if(is_ia32_Conv_I2FP(node)) {
1604 be_emit_cstring(env, "si2ss");
1606 be_emit_cstring(env, "si2sd");
1608 } else if(is_ia32_Conv_FP2I(node)) {
1610 be_emit_cstring(env, "ss2si");
1612 be_emit_cstring(env, "sd2si");
1615 assert(is_ia32_Conv_FP2FP(node));
1617 be_emit_cstring(env, "sd2ss");
1619 be_emit_cstring(env, "ss2sd");
1622 be_emit_char(env, ' ');
1624 switch(get_ia32_op_type(node)) {
1626 ia32_emit_source_register(env, node, 2);
1627 be_emit_cstring(env, ", ");
1628 ia32_emit_dest_register(env, node, 0);
1630 case ia32_AddrModeS:
1631 ia32_emit_dest_register(env, node, 0);
1632 be_emit_cstring(env, ", ");
1633 ia32_emit_am(env, node);
1636 assert(0 && "unsupported op type for Conv");
1638 be_emit_finish_line_gas(env, node);
1642 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1643 emit_ia32_Conv_with_FP(env, node);
1647 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1648 emit_ia32_Conv_with_FP(env, node);
1652 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1653 emit_ia32_Conv_with_FP(env, node);
1657 * Emits code for an Int conversion.
1660 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1661 const char *sign_suffix;
1662 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1663 int smaller_bits = get_mode_size_bits(smaller_mode);
1665 const arch_register_t *in_reg, *out_reg;
1667 assert(!mode_is_float(smaller_mode));
1668 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1670 signed_mode = mode_is_signed(smaller_mode);
1671 if(smaller_bits == 32) {
1672 // this should not happen as it's no convert
1676 sign_suffix = signed_mode ? "s" : "z";
1679 switch(get_ia32_op_type(node)) {
1681 in_reg = get_in_reg(env, node, 2);
1682 out_reg = get_out_reg(env, node, 0);
1684 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1685 REGS_ARE_EQUAL(out_reg, in_reg) &&
1689 /* argument and result are both in EAX and */
1690 /* signedness is ok: -> use the smaller cwtl opcode */
1691 be_emit_cstring(env, "\tcwtl");
1693 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1695 be_emit_cstring(env, "\tmov");
1696 be_emit_string(env, sign_suffix);
1697 ia32_emit_mode_suffix_mode(env, smaller_mode);
1698 be_emit_cstring(env, "l %");
1699 be_emit_string(env, sreg);
1700 be_emit_cstring(env, ", ");
1701 ia32_emit_dest_register(env, node, 0);
1704 case ia32_AddrModeS: {
1705 be_emit_cstring(env, "\tmov");
1706 be_emit_string(env, sign_suffix);
1707 ia32_emit_mode_suffix_mode(env, smaller_mode);
1708 be_emit_cstring(env, "l %");
1709 ia32_emit_am(env, node);
1710 be_emit_cstring(env, ", ");
1711 ia32_emit_dest_register(env, node, 0);
1715 assert(0 && "unsupported op type for Conv");
1717 be_emit_finish_line_gas(env, node);
1721 * Emits code for an 8Bit Int conversion.
1723 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1724 emit_ia32_Conv_I2I(env, node);
1728 /*******************************************
1731 * | |__ ___ _ __ ___ __| | ___ ___
1732 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1733 * | |_) | __/ | | | (_) | (_| | __/\__ \
1734 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1736 *******************************************/
1739 * Emits a backend call
1742 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1743 ir_entity *ent = be_Call_get_entity(node);
1745 be_emit_cstring(env, "\tcall ");
1747 set_entity_backend_marked(ent, 1);
1748 be_emit_string(env, get_entity_ld_name(ent));
1750 be_emit_char(env, '*');
1751 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1753 be_emit_finish_line_gas(env, node);
1757 * Emits code to increase stack pointer.
1760 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1761 int offs = be_get_IncSP_offset(node);
1767 be_emit_cstring(env, "\tsubl $");
1768 be_emit_irprintf(env->emit, "%u, ", offs);
1769 ia32_emit_source_register(env, node, 0);
1771 be_emit_cstring(env, "\taddl $");
1772 be_emit_irprintf(env->emit, "%u, ", -offs);
1773 ia32_emit_source_register(env, node, 0);
1775 be_emit_finish_line_gas(env, node);
1779 * Emits code to set stack pointer.
1782 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1783 be_emit_cstring(env, "\tmovl ");
1784 ia32_emit_source_register(env, node, 2);
1785 be_emit_cstring(env, ", ");
1786 ia32_emit_dest_register(env, node, 0);
1787 be_emit_finish_line_gas(env, node);
1791 * Emits code for Copy/CopyKeep.
1794 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1796 const arch_env_t *aenv = env->arch_env;
1799 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1800 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1803 mode = get_irn_mode(node);
1804 if (mode == mode_E) {
1805 be_emit_cstring(env, "\tmovsd ");
1806 ia32_emit_source_register(env, node, 0);
1807 be_emit_cstring(env, ", ");
1808 ia32_emit_dest_register(env, node, 0);
1810 be_emit_cstring(env, "\tmovl ");
1811 ia32_emit_source_register(env, node, 0);
1812 be_emit_cstring(env, ", ");
1813 ia32_emit_dest_register(env, node, 0);
1815 be_emit_finish_line_gas(env, node);
1819 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1820 Copy_emitter(env, node, be_get_Copy_op(node));
1824 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1825 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1829 * Emits code for exchange.
1832 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1833 const arch_register_t *in1, *in2;
1834 const arch_register_class_t *cls1, *cls2;
1836 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1837 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1839 cls1 = arch_register_get_class(in1);
1840 cls2 = arch_register_get_class(in2);
1842 assert(cls1 == cls2 && "Register class mismatch at Perm");
1844 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1845 be_emit_cstring(env, "\txchg ");
1846 ia32_emit_source_register(env, node, 1);
1847 be_emit_cstring(env, ", ");
1848 ia32_emit_source_register(env, node, 0);
1849 be_emit_finish_line_gas(env, node);
1850 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1851 be_emit_cstring(env, "\txorpd ");
1852 ia32_emit_source_register(env, node, 1);
1853 be_emit_cstring(env, ", ");
1854 ia32_emit_source_register(env, node, 0);
1855 be_emit_finish_line_gas(env, NULL);
1857 be_emit_cstring(env, "\txorpd ");
1858 ia32_emit_source_register(env, node, 0);
1859 be_emit_cstring(env, ", ");
1860 ia32_emit_source_register(env, node, 1);
1861 be_emit_finish_line_gas(env, NULL);
1863 be_emit_cstring(env, "\txorpd ");
1864 ia32_emit_source_register(env, node, 1);
1865 be_emit_cstring(env, ", ");
1866 ia32_emit_source_register(env, node, 0);
1867 be_emit_finish_line_gas(env, node);
1868 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1870 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1876 * Emits code for Constant loading.
1879 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1880 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1882 if (imm_tp == ia32_ImmSymConst) {
1883 be_emit_cstring(env, "\tmovl ");
1884 ia32_emit_immediate(env, node);
1885 be_emit_cstring(env, ", ");
1886 ia32_emit_dest_register(env, node, 0);
1888 tarval *tv = get_ia32_Immop_tarval(node);
1889 assert(get_irn_mode(node) == mode_Iu);
1890 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1891 if (tarval_is_null(tv)) {
1892 if (env->isa->opt_arch == arch_pentium_4) {
1893 /* P4 prefers sub r, r, others xor r, r */
1894 be_emit_cstring(env, "\tsubl ");
1896 be_emit_cstring(env, "\txorl ");
1898 ia32_emit_dest_register(env, node, 0);
1899 be_emit_cstring(env, ", ");
1900 ia32_emit_dest_register(env, node, 0);
1902 be_emit_cstring(env, "\tmovl ");
1903 ia32_emit_immediate(env, node);
1904 be_emit_cstring(env, ", ");
1905 ia32_emit_dest_register(env, node, 0);
1908 be_emit_finish_line_gas(env, node);
1912 * Emits code to load the TLS base
1915 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1916 be_emit_cstring(env, "\tmovl %gs:0, ");
1917 ia32_emit_dest_register(env, node, 0);
1918 be_emit_finish_line_gas(env, node);
1922 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node)
1924 be_emit_cstring(env, "\tret");
1925 be_emit_finish_line_gas(env, node);
1929 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node)
1936 /***********************************************************************************
1939 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1940 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1941 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1942 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1944 ***********************************************************************************/
1947 * Enters the emitter functions for handled nodes into the generic
1948 * pointer of an opcode.
1951 void ia32_register_emitters(void) {
1953 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1954 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1955 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1956 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1957 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1958 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1960 /* first clear the generic function pointer for all ops */
1961 clear_irp_opcodes_generic_func();
1963 /* register all emitter functions defined in spec */
1964 ia32_register_spec_emitters();
1966 /* other ia32 emitter functions */
1974 IA32_EMIT(SwitchJmp);
1977 IA32_EMIT(Conv_I2FP);
1978 IA32_EMIT(Conv_FP2I);
1979 IA32_EMIT(Conv_FP2FP);
1980 IA32_EMIT(Conv_I2I);
1981 IA32_EMIT(Conv_I2I8Bit);
1986 IA32_EMIT(xCmpCMov);
1987 IA32_EMIT(xCondJmp);
1988 IA32_EMIT2(fcomJmp, x87CondJmp);
1989 IA32_EMIT2(fcompJmp, x87CondJmp);
1990 IA32_EMIT2(fcomppJmp, x87CondJmp);
1991 IA32_EMIT2(fcomrJmp, x87CondJmp);
1992 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1993 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1995 /* benode emitter */
2021 static const char *last_name = NULL;
2022 static unsigned last_line = -1;
2023 static unsigned num = -1;
2026 * Emit the debug support for node node.
2029 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
2030 dbg_info *db = get_irn_dbg_info(node);
2032 const char *fname = be_retrieve_dbg_info(db, &lineno);
2034 if (! env->cg->birg->main_env->options->stabs_debug_support)
2038 if (last_name != fname) {
2040 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
2043 if (last_line != lineno) {
2046 snprintf(name, sizeof(name), ".LM%u", ++num);
2048 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
2049 be_emit_string(env, name);
2050 be_emit_cstring(env, ":\n");
2051 be_emit_write_line(env);
2056 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
2059 * Emits code for a node.
2062 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
2063 ir_op *op = get_irn_op(node);
2065 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
2067 if (op->ops.generic) {
2068 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
2069 ia32_emit_dbg(env, node);
2070 (*func) (env, node);
2072 emit_Nothing(env, node);
2073 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
2078 * Emits gas alignment directives
2081 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
2082 be_emit_cstring(env, "\t.p2align ");
2083 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
2084 be_emit_write_line(env);
2088 * Emits gas alignment directives for Functions depended on cpu architecture.
2091 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
2093 unsigned maximum_skip;
2108 maximum_skip = (1 << align) - 1;
2109 ia32_emit_alignment(env, align, maximum_skip);
2113 * Emits gas alignment directives for Labels depended on cpu architecture.
2116 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
2117 unsigned align; unsigned maximum_skip;
2132 maximum_skip = (1 << align) - 1;
2133 ia32_emit_alignment(env, align, maximum_skip);
2137 * Test wether a block should be aligned.
2138 * For cpus in the P4/Athlon class it is usefull to align jump labels to
2139 * 16 bytes. However we should only do that if the alignment nops before the
2140 * label aren't executed more often than we have jumps to the label.
2143 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
2144 static const double DELTA = .0001;
2145 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2147 double prev_freq = 0; /**< execfreq of the fallthrough block */
2148 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
2149 cpu_support cpu = env->isa->opt_arch;
2152 if(exec_freq == NULL)
2154 if(cpu == arch_i386 || cpu == arch_i486)
2157 block_freq = get_block_execfreq(exec_freq, block);
2158 if(block_freq < DELTA)
2161 n_cfgpreds = get_Block_n_cfgpreds(block);
2162 for(i = 0; i < n_cfgpreds; ++i) {
2163 ir_node *pred = get_Block_cfgpred_block(block, i);
2164 double pred_freq = get_block_execfreq(exec_freq, pred);
2167 prev_freq += pred_freq;
2169 jmp_freq += pred_freq;
2173 if(prev_freq < DELTA && !(jmp_freq < DELTA))
2176 jmp_freq /= prev_freq;
2180 case arch_athlon_64:
2182 return jmp_freq > 3;
2184 return jmp_freq > 2;
2189 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
2194 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2197 n_cfgpreds = get_Block_n_cfgpreds(block);
2198 if (n_cfgpreds == 0) {
2200 } else if (n_cfgpreds == 1) {
2201 ir_node *pred = get_Block_cfgpred(block, 0);
2202 ir_node *pred_block = get_nodes_block(pred);
2204 /* we don't need labels for fallthrough blocks, however switch-jmps
2205 * are no fallthoughs */
2206 if(pred_block == prev &&
2207 !(is_Proj(pred) && is_ia32_SwitchJmp(get_Proj_pred(pred)))) {
2216 if (should_align_block(env, block, prev)) {
2218 ia32_emit_align_label(env, env->isa->opt_arch);
2222 ia32_emit_block_name(env, block);
2223 be_emit_char(env, ':');
2225 be_emit_pad_comment(env);
2226 be_emit_cstring(env, " /* preds:");
2228 /* emit list of pred blocks in comment */
2229 arity = get_irn_arity(block);
2230 for (i = 0; i < arity; ++i) {
2231 ir_node *predblock = get_Block_cfgpred_block(block, i);
2232 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2235 be_emit_cstring(env, "\t/* ");
2236 ia32_emit_block_name(env, block);
2237 be_emit_cstring(env, ": ");
2239 if (exec_freq != NULL) {
2240 be_emit_irprintf(env->emit, " freq: %f",
2241 get_block_execfreq(exec_freq, block));
2243 be_emit_cstring(env, " */\n");
2244 be_emit_write_line(env);
2248 * Walks over the nodes in a block connected by scheduling edges
2249 * and emits code for each node.
2252 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2254 const ir_node *node;
2256 ia32_emit_block_header(env, block, last_block);
2258 /* emit the contents of the block */
2259 ia32_emit_dbg(env, block);
2260 sched_foreach(block, node) {
2261 ia32_emit_node(env, node);
2266 * Emits code for function start.
2269 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2270 ir_entity *irg_ent = get_irg_entity(irg);
2271 const char *irg_name = get_entity_ld_name(irg_ent);
2272 cpu_support cpu = env->isa->opt_arch;
2273 const be_irg_t *birg = env->cg->birg;
2275 be_emit_write_line(env);
2276 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2277 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2278 ia32_emit_align_func(env, cpu);
2279 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2280 be_emit_cstring(env, ".global ");
2281 be_emit_string(env, irg_name);
2282 be_emit_char(env, '\n');
2283 be_emit_write_line(env);
2285 ia32_emit_function_object(env, irg_name);
2286 be_emit_string(env, irg_name);
2287 be_emit_cstring(env, ":\n");
2288 be_emit_write_line(env);
2292 * Emits code for function end
2295 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2296 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2297 const be_irg_t *birg = env->cg->birg;
2299 ia32_emit_function_size(env, irg_name);
2300 be_dbg_method_end(birg->main_env->db_handle);
2301 be_emit_char(env, '\n');
2302 be_emit_write_line(env);
2307 * Sets labels for control flow nodes (jump target)
2310 void ia32_gen_labels(ir_node *block, void *data)
2313 int n = get_Block_n_cfgpreds(block);
2316 for (n--; n >= 0; n--) {
2317 pred = get_Block_cfgpred(block, n);
2318 set_irn_link(pred, block);
2323 * Emit an exception label if the current instruction can fail.
2325 void ia32_emit_exc_label(ia32_emit_env_t *env, const ir_node *node) {
2326 if (get_ia32_exc_label(node)) {
2327 be_emit_irprintf(env->emit, ".EXL%u\n", 0);
2328 be_emit_write_line(env);
2333 * Main driver. Emits the code for one routine.
2335 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2336 ia32_emit_env_t env;
2338 ir_node *last_block = NULL;
2341 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2342 env.emit = &env.isa->emit;
2343 env.arch_env = cg->arch_env;
2346 ia32_register_emitters();
2348 ia32_emit_func_prolog(&env, irg);
2349 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2351 n = ARR_LEN(cg->blk_sched);
2352 for (i = 0; i < n;) {
2355 block = cg->blk_sched[i];
2357 next_bl = i < n ? cg->blk_sched[i] : NULL;
2359 /* set here the link. the emitter expects to find the next block here */
2360 set_irn_link(block, next_bl);
2361 ia32_gen_block(&env, block, last_block);
2365 ia32_emit_func_epilog(&env, irg);
2368 void ia32_init_emitter(void)
2370 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");