2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 /* in case of a joker register: just return a valid register */
90 if (arch_register_type_is(reg, joker)) {
91 const arch_register_req_t *req;
93 /* ask for the requirements */
94 req = arch_get_register_req(arch_env, irn, pos);
96 if (arch_register_req_is(req, limited)) {
97 /* in case of limited requirements: get the first allowed register */
98 unsigned idx = rbitset_next(req->limited, 0, 1);
99 reg = arch_register_for_index(req->cls, idx);
101 /* otherwise get first register in class */
102 reg = arch_register_for_index(req->cls, 0);
110 * Returns the register at out position pos.
113 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
116 const arch_env_t *arch_env = env->arch_env;
118 const arch_register_t *reg = NULL;
120 /* 1st case: irn is not of mode_T, so it has only */
121 /* one OUT register -> good */
122 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
123 /* Proj with the corresponding projnum for the register */
125 if (get_irn_mode(irn) != mode_T) {
126 reg = arch_get_irn_register(arch_env, irn);
127 } else if (is_ia32_irn(irn)) {
128 reg = get_ia32_out_reg(irn, pos);
130 const ir_edge_t *edge;
132 foreach_out_edge(irn, edge) {
133 proj = get_edge_src_irn(edge);
134 assert(is_Proj(proj) && "non-Proj from mode_T node");
135 if (get_Proj_proj(proj) == pos) {
136 reg = arch_get_irn_register(arch_env, proj);
142 assert(reg && "no out register found");
147 * Determine the gnu assembler suffix that indicates a mode
150 char get_mode_suffix(const ir_mode *mode) {
151 if(mode_is_float(mode)) {
152 switch(get_mode_size_bits(mode)) {
161 assert(mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode));
162 switch(get_mode_size_bits(mode)) {
173 panic("Can't output mode_suffix for %+F\n", mode);
177 int produces_result(const ir_node *node) {
178 return !(is_ia32_St(node) ||
179 is_ia32_Store8Bit(node) ||
180 is_ia32_CondJmp(node) ||
181 is_ia32_xCondJmp(node) ||
182 is_ia32_CmpSet(node) ||
183 is_ia32_xCmpSet(node) ||
184 is_ia32_SwitchJmp(node));
188 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
189 const arch_register_t *reg) {
190 switch(get_mode_size_bits(mode)) {
192 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
194 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
196 return (char *)arch_register_get_name(reg);
201 * Add a number to a prefix. This number will not be used a second time.
204 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
205 static unsigned long id = 0;
206 snprintf(buf, buflen, "%s%lu", prefix, ++id);
210 /*************************************************************
212 * (_) | | / _| | | | |
213 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
214 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
215 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
216 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
219 *************************************************************/
221 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
222 // be_emit_env_t* so we cheat a bit...
223 #define be_emit_char(env,c) be_emit_char(env->emit,c)
224 #define be_emit_string(env,s) be_emit_string(env->emit,s)
225 #undef be_emit_cstring
226 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
227 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
228 #define be_emit_write_line(env) be_emit_write_line(env->emit)
229 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
230 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
232 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
234 const arch_register_t *reg = get_in_reg(env, node, pos);
235 const char *reg_name = arch_register_get_name(reg);
237 assert(pos < get_irn_arity(node));
239 be_emit_char(env, '%');
240 be_emit_string(env, reg_name);
243 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
244 const arch_register_t *reg = get_out_reg(env, node, pos);
245 const char *reg_name = arch_register_get_name(reg);
247 be_emit_char(env, '%');
248 be_emit_string(env, reg_name);
251 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
253 ia32_attr_t *attr = get_ia32_attr(node);
256 be_emit_char(env, '%');
257 be_emit_string(env, attr->x87[pos]->name);
260 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
266 be_emit_char(env, '$');
268 switch(get_ia32_immop_type(node)) {
270 tv = get_ia32_Immop_tarval(node);
271 be_emit_tarval(env->emit, tv);
273 case ia32_ImmSymConst:
274 ent = get_ia32_Immop_symconst(node);
275 mark_entity_visited(ent);
276 id = get_entity_ld_ident(ent);
277 be_emit_ident(env, id);
284 be_emit_string(env, "BAD");
289 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
291 be_emit_char(env, get_mode_suffix(mode));
294 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
296 ir_mode *mode = get_ia32_ls_mode(node);
300 ia32_emit_mode_suffix_mode(env, mode);
304 char get_xmm_mode_suffix(ir_mode *mode)
306 assert(mode_is_float(mode));
307 switch(get_mode_size_bits(mode)) {
318 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
320 ir_mode *mode = get_ia32_ls_mode(node);
321 assert(mode != NULL);
322 be_emit_char(env, 's');
323 be_emit_char(env, get_xmm_mode_suffix(mode));
326 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
328 ir_mode *mode = get_ia32_ls_mode(node);
329 assert(mode != NULL);
330 be_emit_char(env, get_xmm_mode_suffix(mode));
333 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
335 if(get_mode_size_bits(mode) == 32)
337 if(mode_is_signed(mode)) {
338 be_emit_char(env, 's');
340 be_emit_char(env, 'z');
345 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
347 switch (be_gas_flavour) {
348 case GAS_FLAVOUR_NORMAL:
349 be_emit_cstring(env, "\t.type\t");
350 be_emit_string(env, name);
351 be_emit_cstring(env, ", @function\n");
352 be_emit_write_line(env);
354 case GAS_FLAVOUR_MINGW:
355 be_emit_cstring(env, "\t.def\t");
356 be_emit_string(env, name);
357 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
358 be_emit_write_line(env);
366 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
368 switch (be_gas_flavour) {
369 case GAS_FLAVOUR_NORMAL:
370 be_emit_cstring(env, "\t.size\t");
371 be_emit_string(env, name);
372 be_emit_cstring(env, ", .-");
373 be_emit_string(env, name);
374 be_emit_char(env, '\n');
375 be_emit_write_line(env);
385 * Emits registers and/or address mode of a binary operation.
387 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
388 switch(get_ia32_op_type(node)) {
390 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
391 ia32_emit_immediate(env, node);
392 be_emit_cstring(env, ", ");
393 ia32_emit_source_register(env, node, 2);
395 const arch_register_t *in1 = get_in_reg(env, node, 2);
396 const arch_register_t *in2 = get_in_reg(env, node, 3);
397 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
398 const arch_register_t *in;
401 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
402 out = out ? out : in1;
403 in_name = arch_register_get_name(in);
405 if (is_ia32_emit_cl(node)) {
406 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
410 be_emit_char(env, '%');
411 be_emit_string(env, in_name);
412 be_emit_cstring(env, ", %");
413 be_emit_string(env, arch_register_get_name(out));
417 ia32_emit_am(env, node);
418 be_emit_cstring(env, ", ");
419 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
420 assert(!produces_result(node) && "Source AM with Const must not produce result");
421 ia32_emit_immediate(env, node);
422 } else if (produces_result(node)) {
423 ia32_emit_dest_register(env, node, 0);
425 ia32_emit_source_register(env, node, 2);
429 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
430 ia32_emit_immediate(env, node);
431 be_emit_cstring(env, ", ");
432 ia32_emit_am(env, node);
434 const arch_register_t *in1 = get_in_reg(env, node,
435 get_irn_arity(node) == 5 ? 3 : 2);
436 ir_mode *mode = get_ia32_ls_mode(node);
439 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
441 if (is_ia32_emit_cl(node)) {
442 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
446 be_emit_char(env, '%');
447 be_emit_string(env, in_name);
448 be_emit_cstring(env, ", ");
449 ia32_emit_am(env, node);
453 assert(0 && "unsupported op type");
458 * Emits registers and/or address mode of a binary operation.
460 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
461 switch(get_ia32_op_type(node)) {
463 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
464 // should not happen...
467 ia32_attr_t *attr = get_ia32_attr(node);
468 const arch_register_t *in1 = attr->x87[0];
469 const arch_register_t *in2 = attr->x87[1];
470 const arch_register_t *out = attr->x87[2];
471 const arch_register_t *in;
473 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
474 out = out ? out : in1;
476 be_emit_char(env, '%');
477 be_emit_string(env, arch_register_get_name(in));
478 be_emit_cstring(env, ", %");
479 be_emit_string(env, arch_register_get_name(out));
484 ia32_emit_am(env, node);
487 assert(0 && "unsupported op type");
492 * Emits registers and/or address mode of a unary operation.
494 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
495 switch(get_ia32_op_type(node)) {
497 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
498 ia32_emit_immediate(env, node);
500 if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
501 ia32_emit_source_register(env, node, 3);
502 } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
503 ia32_emit_source_register(env, node, 4);
504 } else if(is_ia32_Push(node)) {
505 ia32_emit_source_register(env, node, 2);
506 } else if(is_ia32_Pop(node)) {
507 ia32_emit_dest_register(env, node, 1);
509 ia32_emit_dest_register(env, node, 0);
515 ia32_emit_am(env, node);
518 assert(0 && "unsupported op type");
523 * Emits address mode.
525 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
526 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
527 ir_entity *ent = get_ia32_am_sc(node);
528 int offs = get_ia32_am_offs_int(node);
530 /* just to be sure... */
531 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
537 mark_entity_visited(ent);
538 id = get_entity_ld_ident(ent);
539 if (is_ia32_am_sc_sign(node))
540 be_emit_char(env, '-');
541 be_emit_ident(env, id);
543 if(get_entity_owner(ent) == get_tls_type()) {
544 if (get_entity_visibility(ent) == visibility_external_allocated) {
545 be_emit_cstring(env, "@INDNTPOFF");
547 be_emit_cstring(env, "@NTPOFF");
554 be_emit_irprintf(env->emit, "%+d", offs);
556 be_emit_irprintf(env->emit, "%d", offs);
560 if (am_flav & (ia32_B | ia32_I)) {
561 be_emit_char(env, '(');
564 if (am_flav & ia32_B) {
565 ia32_emit_source_register(env, node, 0);
568 /* emit index + scale */
569 if (am_flav & ia32_I) {
570 be_emit_char(env, ',');
571 ia32_emit_source_register(env, node, 1);
573 if (am_flav & ia32_S) {
574 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
577 be_emit_char(env, ')');
581 /*************************************************
584 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
585 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
586 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
587 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
589 *************************************************/
592 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
595 * coding of conditions
597 struct cmp2conditon_t {
603 * positive conditions for signed compares
606 const struct cmp2conditon_t cmp2condition_s[] = {
607 { NULL, pn_Cmp_False }, /* always false */
608 { "e", pn_Cmp_Eq }, /* == */
609 { "l", pn_Cmp_Lt }, /* < */
610 { "le", pn_Cmp_Le }, /* <= */
611 { "g", pn_Cmp_Gt }, /* > */
612 { "ge", pn_Cmp_Ge }, /* >= */
613 { "ne", pn_Cmp_Lg }, /* != */
614 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
615 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
616 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
617 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
618 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
619 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
620 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
621 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
622 { NULL, pn_Cmp_True }, /* always true */
626 * positive conditions for unsigned compares
629 const struct cmp2conditon_t cmp2condition_u[] = {
630 { NULL, pn_Cmp_False }, /* always false */
631 { "e", pn_Cmp_Eq }, /* == */
632 { "b", pn_Cmp_Lt }, /* < */
633 { "be", pn_Cmp_Le }, /* <= */
634 { "a", pn_Cmp_Gt }, /* > */
635 { "ae", pn_Cmp_Ge }, /* >= */
636 { "ne", pn_Cmp_Lg }, /* != */
637 { NULL, pn_Cmp_True }, /* always true */
641 * returns the condition code
644 const char *get_cmp_suffix(int cmp_code)
646 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
647 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
649 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
650 return cmp2condition_u[cmp_code & 7].name;
652 return cmp2condition_s[cmp_code & 15].name;
656 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
658 be_emit_string(env, get_cmp_suffix(pnc));
663 * Returns the target block for a control flow node.
666 ir_node *get_cfop_target_block(const ir_node *irn) {
667 return get_irn_link(irn);
671 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
673 be_emit_cstring(env, BLOCK_PREFIX);
674 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
678 * Returns the target label for a control flow node.
681 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
682 ir_node *block = get_cfop_target_block(node);
684 ia32_emit_block_name(env, block);
687 /** Return the next block in Block schedule */
688 static ir_node *next_blk_sched(const ir_node *block) {
689 return get_irn_link(block);
693 * Returns the Proj with projection number proj and NOT mode_M
696 ir_node *get_proj(const ir_node *node, long proj) {
697 const ir_edge_t *edge;
700 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
702 foreach_out_edge(node, edge) {
703 src = get_edge_src_irn(edge);
705 assert(is_Proj(src) && "Proj expected");
706 if (get_irn_mode(src) == mode_M)
709 if (get_Proj_proj(src) == proj)
716 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
719 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
721 const ir_node *proj_true;
722 const ir_node *proj_false;
723 const ir_node *block;
724 const ir_node *next_block;
727 /* get both Proj's */
728 proj_true = get_proj(node, pn_Cond_true);
729 assert(proj_true && "CondJmp without true Proj");
731 proj_false = get_proj(node, pn_Cond_false);
732 assert(proj_false && "CondJmp without false Proj");
734 /* for now, the code works for scheduled and non-schedules blocks */
735 block = get_nodes_block(node);
737 /* we have a block schedule */
738 next_block = next_blk_sched(block);
740 if (get_cfop_target_block(proj_true) == next_block) {
741 /* exchange both proj's so the second one can be omitted */
742 const ir_node *t = proj_true;
744 proj_true = proj_false;
747 pnc = get_negated_pnc(pnc, mode);
750 /* in case of unordered compare, check for parity */
751 if (pnc & pn_Cmp_Uo) {
752 be_emit_cstring(env, "\tjp ");
753 ia32_emit_cfop_target(env, proj_true);
754 be_emit_finish_line_gas(env, proj_true);
757 be_emit_cstring(env, "\tj");
758 ia32_emit_cmp_suffix(env, pnc);
759 be_emit_char(env, ' ');
760 ia32_emit_cfop_target(env, proj_true);
761 be_emit_finish_line_gas(env, proj_true);
763 /* the second Proj might be a fallthrough */
764 if (get_cfop_target_block(proj_false) != next_block) {
765 be_emit_cstring(env, "\tjmp ");
766 ia32_emit_cfop_target(env, proj_false);
767 be_emit_finish_line_gas(env, proj_false);
769 be_emit_cstring(env, "\t/* fallthrough to ");
770 ia32_emit_cfop_target(env, proj_false);
771 be_emit_cstring(env, " */");
772 be_emit_finish_line_gas(env, proj_false);
777 * Emits code for conditional jump.
780 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
781 be_emit_cstring(env, "\tcmp ");
782 ia32_emit_binop(env, node);
783 be_emit_finish_line_gas(env, node);
785 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
789 * Emits code for conditional jump with two variables.
792 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
793 CondJmp_emitter(env, node);
797 * Emits code for conditional test and jump.
800 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
801 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
802 be_emit_cstring(env, "\ttest ");
803 ia32_emit_immediate(env, node);
804 be_emit_cstring(env, ", ");
805 ia32_emit_source_register(env, node, 0);
806 be_emit_finish_line_gas(env, node);
808 be_emit_cstring(env, "\ttest ");
809 ia32_emit_source_register(env, node, 1);
810 be_emit_cstring(env, ", ");
811 ia32_emit_source_register(env, node, 0);
812 be_emit_finish_line_gas(env, node);
814 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
818 * Emits code for conditional test and jump with two variables.
821 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
822 TestJmp_emitter(env, node);
826 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
827 be_emit_cstring(env, "/* omitted redundant test */");
828 be_emit_finish_line_gas(env, node);
830 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
834 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
835 be_emit_cstring(env, "/* omitted redundant test/cmp */");
836 be_emit_finish_line_gas(env, node);
838 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
842 * Emits code for conditional SSE floating point jump with two variables.
845 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
846 be_emit_cstring(env, "\tucomi");
847 ia32_emit_xmm_mode_suffix(env, node);
848 be_emit_char(env, ' ');
849 ia32_emit_binop(env, node);
850 be_emit_finish_line_gas(env, node);
852 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
856 * Emits code for conditional x87 floating point jump with two variables.
859 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
860 ia32_attr_t *attr = get_ia32_attr(node);
861 const char *reg = attr->x87[1]->name;
862 long pnc = get_ia32_pncode(node);
864 switch (get_ia32_irn_opcode(node)) {
865 case iro_ia32_fcomrJmp:
866 pnc = get_inversed_pnc(pnc);
867 reg = attr->x87[0]->name;
868 case iro_ia32_fcomJmp:
870 be_emit_cstring(env, "\tfucom ");
872 case iro_ia32_fcomrpJmp:
873 pnc = get_inversed_pnc(pnc);
874 reg = attr->x87[0]->name;
875 case iro_ia32_fcompJmp:
876 be_emit_cstring(env, "\tfucomp ");
878 case iro_ia32_fcomrppJmp:
879 pnc = get_inversed_pnc(pnc);
880 case iro_ia32_fcomppJmp:
881 be_emit_cstring(env, "\tfucompp ");
887 be_emit_char(env, '%');
888 be_emit_string(env, reg);
890 be_emit_finish_line_gas(env, node);
892 be_emit_cstring(env, "\tfnstsw %ax");
893 be_emit_finish_line_gas(env, node);
894 be_emit_cstring(env, "\tsahf");
895 be_emit_finish_line_gas(env, node);
897 finish_CondJmp(env, node, mode_E, pnc);
901 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
902 long pnc = get_ia32_pncode(node);
903 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
904 int idx_left = 2 - is_PsiCondCMov;
905 int idx_right = 3 - is_PsiCondCMov;
906 const arch_register_t *in1, *in2, *out;
908 out = arch_get_irn_register(env->arch_env, node);
909 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
910 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
912 /* we have to emit the cmp first, because the destination register */
913 /* could be one of the compare registers */
914 if (is_ia32_CmpCMov(node)) {
915 be_emit_cstring(env, "\tcmp ");
916 ia32_emit_source_register(env, node, 1);
917 be_emit_cstring(env, ", ");
918 ia32_emit_source_register(env, node, 0);
919 } else if (is_ia32_xCmpCMov(node)) {
920 be_emit_cstring(env, "\tucomis");
921 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
922 be_emit_char(env, ' ');
923 ia32_emit_source_register(env, node, 1);
924 be_emit_cstring(env, ", ");
925 ia32_emit_source_register(env, node, 0);
926 } else if (is_PsiCondCMov) {
927 /* omit compare because flags are already set by And/Or */
928 be_emit_cstring(env, "\ttest ");
929 ia32_emit_source_register(env, node, 0);
930 be_emit_cstring(env, ", ");
931 ia32_emit_source_register(env, node, 0);
933 assert(0 && "unsupported CMov");
935 be_emit_finish_line_gas(env, node);
937 if (REGS_ARE_EQUAL(out, in2)) {
938 /* best case: default in == out -> do nothing */
939 } else if (REGS_ARE_EQUAL(out, in1)) {
940 ir_node *n = (ir_node*) node;
941 /* true in == out -> need complement compare and exchange true and default in */
942 ir_node *t = get_irn_n(n, idx_left);
943 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
944 set_irn_n(n, idx_right, t);
946 pnc = get_negated_pnc(pnc, get_irn_mode(node));
948 /* out is different from in: need copy default -> out */
949 if (is_PsiCondCMov) {
950 be_emit_cstring(env, "\tmovl ");
951 ia32_emit_dest_register(env, node, 2);
952 be_emit_cstring(env, ", ");
953 ia32_emit_dest_register(env, node, 0);
955 be_emit_cstring(env, "\tmovl ");
956 ia32_emit_source_register(env, node, 3);
957 be_emit_cstring(env, ", ");
958 ia32_emit_dest_register(env, node, 0);
960 be_emit_finish_line_gas(env, node);
963 if (is_PsiCondCMov) {
964 be_emit_cstring(env, "\tcmov");
965 ia32_emit_cmp_suffix(env, pnc);
966 be_emit_cstring(env, "l ");
967 ia32_emit_source_register(env, node, 1);
968 be_emit_cstring(env, ", ");
969 ia32_emit_dest_register(env, node, 0);
971 be_emit_cstring(env, "\tcmov");
972 ia32_emit_cmp_suffix(env, pnc);
973 be_emit_cstring(env, "l ");
974 ia32_emit_source_register(env, node, 2);
975 be_emit_cstring(env, ", ");
976 ia32_emit_dest_register(env, node, 0);
978 be_emit_finish_line_gas(env, node);
982 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
983 CMov_emitter(env, node);
987 void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
988 CMov_emitter(env, node);
992 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
993 CMov_emitter(env, node);
997 void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
998 int pnc = get_ia32_pncode(node);
1000 const arch_register_t *out;
1002 out = arch_get_irn_register(env->arch_env, node);
1003 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1005 if (is_ia32_CmpSet(node)) {
1006 be_emit_cstring(env, "\tcmp ");
1007 ia32_emit_binop(env, node);
1008 } else if (is_ia32_xCmpSet(node)) {
1009 be_emit_cstring(env, "\tucomis");
1010 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1011 be_emit_char(env, ' ');
1012 ia32_emit_binop(env, node);
1013 } else if (is_ia32_PsiCondSet(node)) {
1014 be_emit_cstring(env, "\tcmp $0, ");
1015 ia32_emit_source_register(env, node, 0);
1017 assert(0 && "unsupported Set");
1019 be_emit_finish_line_gas(env, node);
1021 /* use mov to clear target because it doesn't affect the eflags */
1022 be_emit_cstring(env, "\tmovl $0, %");
1023 be_emit_string(env, arch_register_get_name(out));
1024 be_emit_finish_line_gas(env, node);
1026 be_emit_cstring(env, "\tset");
1027 ia32_emit_cmp_suffix(env, pnc);
1028 be_emit_cstring(env, " %");
1029 be_emit_string(env, reg8bit);
1030 be_emit_finish_line_gas(env, node);
1034 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1035 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1039 void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
1040 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
1044 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1045 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1049 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1051 long pnc = get_ia32_pncode(node);
1052 long unord = pnc & pn_Cmp_Uo;
1054 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1057 case pn_Cmp_Leg: /* odered */
1060 case pn_Cmp_Uo: /* unordered */
1064 case pn_Cmp_Eq: /* == */
1068 case pn_Cmp_Lt: /* < */
1072 case pn_Cmp_Le: /* <= */
1076 case pn_Cmp_Gt: /* > */
1080 case pn_Cmp_Ge: /* >= */
1084 case pn_Cmp_Lg: /* != */
1089 assert(sse_pnc >= 0 && "unsupported compare");
1091 if (unord && sse_pnc != 3) {
1093 We need a separate compare against unordered.
1094 Quick and Dirty solution:
1095 - get some memory on stack
1099 - and result and stored result
1102 be_emit_cstring(env, "\tsubl $8, %esp");
1103 be_emit_finish_line_gas(env, node);
1105 be_emit_cstring(env, "\tcmpsd $3, ");
1106 ia32_emit_binop(env, node);
1107 be_emit_finish_line_gas(env, node);
1109 be_emit_cstring(env, "\tmovsd ");
1110 ia32_emit_dest_register(env, node, 0);
1111 be_emit_cstring(env, ", (%esp)");
1112 be_emit_finish_line_gas(env, node);
1115 be_emit_cstring(env, "\tcmpsd ");
1116 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1117 ia32_emit_binop(env, node);
1118 be_emit_finish_line_gas(env, node);
1120 if (unord && sse_pnc != 3) {
1121 be_emit_cstring(env, "\tandpd (%esp), ");
1122 ia32_emit_dest_register(env, node, 0);
1123 be_emit_finish_line_gas(env, node);
1125 be_emit_cstring(env, "\taddl $8, %esp");
1126 be_emit_finish_line_gas(env, node);
1130 /*********************************************************
1133 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1134 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1135 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1136 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1139 *********************************************************/
1141 /* jump table entry (target and corresponding number) */
1142 typedef struct _branch_t {
1147 /* jump table for switch generation */
1148 typedef struct _jmp_tbl_t {
1149 ir_node *defProj; /**< default target */
1150 int min_value; /**< smallest switch case */
1151 int max_value; /**< largest switch case */
1152 int num_branches; /**< number of jumps */
1153 char *label; /**< label of the jump table */
1154 branch_t *branches; /**< jump array */
1158 * Compare two variables of type branch_t. Used to sort all switch cases
1161 int ia32_cmp_branch_t(const void *a, const void *b) {
1162 branch_t *b1 = (branch_t *)a;
1163 branch_t *b2 = (branch_t *)b;
1165 if (b1->value <= b2->value)
1172 * Emits code for a SwitchJmp (creates a jump table if
1173 * possible otherwise a cmp-jmp cascade). Port from
1177 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1178 unsigned long interval;
1183 const ir_edge_t *edge;
1185 /* fill the table structure */
1186 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1187 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1189 tbl.num_branches = get_irn_n_edges(node);
1190 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1191 tbl.min_value = INT_MAX;
1192 tbl.max_value = INT_MIN;
1195 /* go over all proj's and collect them */
1196 foreach_out_edge(node, edge) {
1197 proj = get_edge_src_irn(edge);
1198 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1200 pnc = get_Proj_proj(proj);
1202 /* create branch entry */
1203 tbl.branches[i].target = proj;
1204 tbl.branches[i].value = pnc;
1206 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1207 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1209 /* check for default proj */
1210 if (pnc == get_ia32_pncode(node)) {
1211 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1218 /* sort the branches by their number */
1219 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1221 /* two-complement's magic make this work without overflow */
1222 interval = tbl.max_value - tbl.min_value;
1224 /* emit the table */
1225 be_emit_cstring(env, "\tcmpl $");
1226 be_emit_irprintf(env->emit, "%u, ", interval);
1227 ia32_emit_source_register(env, node, 0);
1228 be_emit_finish_line_gas(env, node);
1230 be_emit_cstring(env, "\tja ");
1231 ia32_emit_cfop_target(env, tbl.defProj);
1232 be_emit_finish_line_gas(env, node);
1234 if (tbl.num_branches > 1) {
1236 be_emit_cstring(env, "\tjmp *");
1237 be_emit_string(env, tbl.label);
1238 be_emit_cstring(env, "(,");
1239 ia32_emit_source_register(env, node, 0);
1240 be_emit_cstring(env, ",4)");
1241 be_emit_finish_line_gas(env, node);
1243 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1244 be_emit_cstring(env, "\t.align 4\n");
1245 be_emit_write_line(env);
1247 be_emit_string(env, tbl.label);
1248 be_emit_cstring(env, ":\n");
1249 be_emit_write_line(env);
1251 be_emit_cstring(env, ".long ");
1252 ia32_emit_cfop_target(env, tbl.branches[0].target);
1253 be_emit_finish_line_gas(env, NULL);
1255 last_value = tbl.branches[0].value;
1256 for (i = 1; i < tbl.num_branches; ++i) {
1257 while (++last_value < tbl.branches[i].value) {
1258 be_emit_cstring(env, ".long ");
1259 ia32_emit_cfop_target(env, tbl.defProj);
1260 be_emit_finish_line_gas(env, NULL);
1262 be_emit_cstring(env, ".long ");
1263 ia32_emit_cfop_target(env, tbl.branches[i].target);
1264 be_emit_finish_line_gas(env, NULL);
1266 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1268 /* one jump is enough */
1269 be_emit_cstring(env, "\tjmp ");
1270 ia32_emit_cfop_target(env, tbl.branches[0].target);
1271 be_emit_finish_line_gas(env, node);
1281 * Emits code for a unconditional jump.
1284 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1285 ir_node *block, *next_block;
1287 /* for now, the code works for scheduled and non-schedules blocks */
1288 block = get_nodes_block(node);
1290 /* we have a block schedule */
1291 next_block = next_blk_sched(block);
1292 if (get_cfop_target_block(node) != next_block) {
1293 be_emit_cstring(env, "\tjmp ");
1294 ia32_emit_cfop_target(env, node);
1296 be_emit_cstring(env, "\t/* fallthrough to ");
1297 ia32_emit_cfop_target(env, node);
1298 be_emit_cstring(env, " */");
1300 be_emit_finish_line_gas(env, node);
1303 /**********************************
1306 * | | ___ _ __ _ _| |_) |
1307 * | | / _ \| '_ \| | | | _ <
1308 * | |___| (_) | |_) | |_| | |_) |
1309 * \_____\___/| .__/ \__, |____/
1312 **********************************/
1315 * Emit movsb/w instructions to make mov count divideable by 4
1318 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1319 be_emit_cstring(env, "\tcld");
1320 be_emit_finish_line_gas(env, NULL);
1324 be_emit_cstring(env, "\tmovsb");
1325 be_emit_finish_line_gas(env, NULL);
1328 be_emit_cstring(env, "\tmovsw");
1329 be_emit_finish_line_gas(env, NULL);
1332 be_emit_cstring(env, "\tmovsb");
1333 be_emit_finish_line_gas(env, NULL);
1334 be_emit_cstring(env, "\tmovsw");
1335 be_emit_finish_line_gas(env, NULL);
1341 * Emit rep movsd instruction for memcopy.
1344 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1345 tarval *tv = get_ia32_Immop_tarval(node);
1346 int rem = get_tarval_long(tv);
1348 emit_CopyB_prolog(env, rem);
1350 be_emit_cstring(env, "\trep movsd");
1351 be_emit_finish_line_gas(env, node);
1355 * Emits unrolled memcopy.
1358 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1359 tarval *tv = get_ia32_Immop_tarval(node);
1360 int size = get_tarval_long(tv);
1362 emit_CopyB_prolog(env, size & 0x3);
1366 be_emit_cstring(env, "\tmovsd");
1367 be_emit_finish_line_gas(env, NULL);
1373 /***************************
1377 * | | / _ \| '_ \ \ / /
1378 * | |___| (_) | | | \ V /
1379 * \_____\___/|_| |_|\_/
1381 ***************************/
1384 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1387 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1388 ir_mode *ls_mode = get_ia32_ls_mode(node);
1389 int ls_bits = get_mode_size_bits(ls_mode);
1391 be_emit_cstring(env, "\tcvt");
1393 if(is_ia32_Conv_I2FP(node)) {
1395 be_emit_cstring(env, "si2ss");
1397 be_emit_cstring(env, "si2sd");
1399 } else if(is_ia32_Conv_FP2I(node)) {
1401 be_emit_cstring(env, "ss2si");
1403 be_emit_cstring(env, "sd2si");
1406 assert(is_ia32_Conv_FP2FP(node));
1408 be_emit_cstring(env, "sd2ss");
1410 be_emit_cstring(env, "ss2sd");
1413 be_emit_char(env, ' ');
1415 switch(get_ia32_op_type(node)) {
1417 ia32_emit_source_register(env, node, 2);
1418 be_emit_cstring(env, ", ");
1419 ia32_emit_dest_register(env, node, 0);
1421 case ia32_AddrModeS:
1422 ia32_emit_dest_register(env, node, 0);
1423 be_emit_cstring(env, ", ");
1424 ia32_emit_am(env, node);
1427 assert(0 && "unsupported op type for Conv");
1429 be_emit_finish_line_gas(env, node);
1433 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1434 emit_ia32_Conv_with_FP(env, node);
1438 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1439 emit_ia32_Conv_with_FP(env, node);
1443 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1444 emit_ia32_Conv_with_FP(env, node);
1448 * Emits code for an Int conversion.
1451 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1452 const char *sign_suffix;
1453 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1454 int smaller_bits = get_mode_size_bits(smaller_mode);
1456 const arch_register_t *in_reg, *out_reg;
1458 assert(!mode_is_float(smaller_mode));
1459 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1461 signed_mode = mode_is_signed(smaller_mode);
1462 if(smaller_bits == 32) {
1463 // this should not happen as it's no convert
1467 sign_suffix = signed_mode ? "s" : "z";
1470 switch(get_ia32_op_type(node)) {
1472 in_reg = get_in_reg(env, node, 2);
1473 out_reg = get_out_reg(env, node, 0);
1475 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1476 REGS_ARE_EQUAL(out_reg, in_reg) &&
1479 /* argument and result are both in EAX and */
1480 /* signedness is ok: -> use converts */
1481 if (smaller_bits == 8) {
1482 be_emit_cstring(env, "\tcbtw");
1483 } else if (smaller_bits == 16) {
1484 be_emit_cstring(env, "\tcwtl");
1488 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1489 /* argument and result are in the same register */
1490 /* and signedness is ok: -> use and with mask */
1491 int mask = (1 << smaller_bits) - 1;
1492 be_emit_cstring(env, "\tandl $0x");
1493 be_emit_irprintf(env->emit, "%x, ", mask);
1494 ia32_emit_dest_register(env, node, 0);
1496 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1498 be_emit_cstring(env, "\tmov");
1499 be_emit_string(env, sign_suffix);
1500 ia32_emit_mode_suffix_mode(env, smaller_mode);
1501 be_emit_cstring(env, "l %");
1502 be_emit_string(env, sreg);
1503 be_emit_cstring(env, ", ");
1504 ia32_emit_dest_register(env, node, 0);
1507 case ia32_AddrModeS: {
1508 be_emit_cstring(env, "\tmov");
1509 be_emit_string(env, sign_suffix);
1510 ia32_emit_mode_suffix_mode(env, smaller_mode);
1511 be_emit_cstring(env, "l %");
1512 ia32_emit_am(env, node);
1513 be_emit_cstring(env, ", ");
1514 ia32_emit_dest_register(env, node, 0);
1518 assert(0 && "unsupported op type for Conv");
1520 be_emit_finish_line_gas(env, node);
1524 * Emits code for an 8Bit Int conversion.
1526 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1527 emit_ia32_Conv_I2I(env, node);
1531 /*******************************************
1534 * | |__ ___ _ __ ___ __| | ___ ___
1535 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1536 * | |_) | __/ | | | (_) | (_| | __/\__ \
1537 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1539 *******************************************/
1542 * Emits a backend call
1545 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1546 ir_entity *ent = be_Call_get_entity(node);
1548 be_emit_cstring(env, "\tcall ");
1550 mark_entity_visited(ent);
1551 be_emit_string(env, get_entity_ld_name(ent));
1553 be_emit_char(env, '*');
1554 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1556 be_emit_finish_line_gas(env, node);
1560 * Emits code to increase stack pointer.
1563 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1564 int offs = be_get_IncSP_offset(node);
1570 be_emit_cstring(env, "\tsubl $");
1571 be_emit_irprintf(env->emit, "%u, ", offs);
1572 ia32_emit_source_register(env, node, 0);
1574 be_emit_cstring(env, "\taddl $");
1575 be_emit_irprintf(env->emit, "%u, ", -offs);
1576 ia32_emit_source_register(env, node, 0);
1578 be_emit_finish_line_gas(env, node);
1582 * Emits code to set stack pointer.
1585 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1586 be_emit_cstring(env, "\tmovl ");
1587 ia32_emit_source_register(env, node, 2);
1588 be_emit_cstring(env, ", ");
1589 ia32_emit_dest_register(env, node, 0);
1590 be_emit_finish_line_gas(env, node);
1594 * Emits code for Copy/CopyKeep.
1597 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1599 const arch_env_t *aenv = env->arch_env;
1602 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1603 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1606 mode = get_irn_mode(node);
1607 if (mode == mode_E) {
1608 be_emit_cstring(env, "\tmovsd ");
1609 ia32_emit_source_register(env, node, 0);
1610 be_emit_cstring(env, ", ");
1611 ia32_emit_dest_register(env, node, 0);
1613 be_emit_cstring(env, "\tmovl ");
1614 ia32_emit_source_register(env, node, 0);
1615 be_emit_cstring(env, ", ");
1616 ia32_emit_dest_register(env, node, 0);
1618 be_emit_finish_line_gas(env, node);
1622 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1623 Copy_emitter(env, node, be_get_Copy_op(node));
1627 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1628 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1632 * Emits code for exchange.
1635 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1636 const arch_register_t *in1, *in2;
1637 const arch_register_class_t *cls1, *cls2;
1639 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1640 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1642 cls1 = arch_register_get_class(in1);
1643 cls2 = arch_register_get_class(in2);
1645 assert(cls1 == cls2 && "Register class mismatch at Perm");
1647 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1648 be_emit_cstring(env, "\txchg ");
1649 ia32_emit_source_register(env, node, 1);
1650 be_emit_cstring(env, ", ");
1651 ia32_emit_source_register(env, node, 0);
1652 be_emit_finish_line_gas(env, node);
1653 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1654 be_emit_cstring(env, "\txorpd ");
1655 ia32_emit_source_register(env, node, 1);
1656 be_emit_cstring(env, ", ");
1657 ia32_emit_source_register(env, node, 0);
1658 be_emit_finish_line_gas(env, NULL);
1660 be_emit_cstring(env, "\txorpd ");
1661 ia32_emit_source_register(env, node, 0);
1662 be_emit_cstring(env, ", ");
1663 ia32_emit_source_register(env, node, 1);
1664 be_emit_finish_line_gas(env, NULL);
1666 be_emit_cstring(env, "\txorpd ");
1667 ia32_emit_source_register(env, node, 1);
1668 be_emit_cstring(env, ", ");
1669 ia32_emit_source_register(env, node, 0);
1670 be_emit_finish_line_gas(env, node);
1671 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1673 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1679 * Emits code for Constant loading.
1682 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1683 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1685 if (imm_tp == ia32_ImmSymConst) {
1686 be_emit_cstring(env, "\tmovl ");
1687 ia32_emit_immediate(env, node);
1688 be_emit_cstring(env, ", ");
1689 ia32_emit_dest_register(env, node, 0);
1691 tarval *tv = get_ia32_Immop_tarval(node);
1692 assert(get_irn_mode(node) == mode_Iu);
1693 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1694 if (tarval_is_null(tv)) {
1695 if (env->isa->opt_arch == arch_pentium_4) {
1696 /* P4 prefers sub r, r, others xor r, r */
1697 be_emit_cstring(env, "\tsubl ");
1699 be_emit_cstring(env, "\txorl ");
1701 ia32_emit_dest_register(env, node, 0);
1702 be_emit_cstring(env, ", ");
1703 ia32_emit_dest_register(env, node, 0);
1705 be_emit_cstring(env, "\tmovl ");
1706 ia32_emit_immediate(env, node);
1707 be_emit_cstring(env, ", ");
1708 ia32_emit_dest_register(env, node, 0);
1711 be_emit_finish_line_gas(env, node);
1715 * Emits code to load the TLS base
1718 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1719 be_emit_cstring(env, "\tmovl %gs:0, ");
1720 ia32_emit_dest_register(env, node, 0);
1721 be_emit_finish_line_gas(env, node);
1725 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1726 be_emit_cstring(env, "\tret");
1727 be_emit_finish_line_gas(env, node);
1731 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1735 /***********************************************************************************
1738 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1739 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1740 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1741 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1743 ***********************************************************************************/
1746 * Enters the emitter functions for handled nodes into the generic
1747 * pointer of an opcode.
1750 void ia32_register_emitters(void) {
1752 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1753 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1754 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1755 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1756 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1757 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1759 /* first clear the generic function pointer for all ops */
1760 clear_irp_opcodes_generic_func();
1762 /* register all emitter functions defined in spec */
1763 ia32_register_spec_emitters();
1765 /* other ia32 emitter functions */
1771 IA32_EMIT(PsiCondCMov);
1773 IA32_EMIT(PsiCondSet);
1774 IA32_EMIT(SwitchJmp);
1777 IA32_EMIT(Conv_I2FP);
1778 IA32_EMIT(Conv_FP2I);
1779 IA32_EMIT(Conv_FP2FP);
1780 IA32_EMIT(Conv_I2I);
1781 IA32_EMIT(Conv_I2I8Bit);
1786 IA32_EMIT(xCmpCMov);
1787 IA32_EMIT(xCondJmp);
1788 IA32_EMIT2(fcomJmp, x87CondJmp);
1789 IA32_EMIT2(fcompJmp, x87CondJmp);
1790 IA32_EMIT2(fcomppJmp, x87CondJmp);
1791 IA32_EMIT2(fcomrJmp, x87CondJmp);
1792 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1793 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1795 /* benode emitter */
1821 static const char *last_name = NULL;
1822 static unsigned last_line = -1;
1823 static unsigned num = -1;
1826 * Emit the debug support for node node.
1829 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1830 dbg_info *db = get_irn_dbg_info(node);
1832 const char *fname = be_retrieve_dbg_info(db, &lineno);
1834 if (! env->cg->birg->main_env->options->stabs_debug_support)
1838 if (last_name != fname) {
1840 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1843 if (last_line != lineno) {
1846 snprintf(name, sizeof(name), ".LM%u", ++num);
1848 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1849 be_emit_string(env, name);
1850 be_emit_cstring(env, ":\n");
1851 be_emit_write_line(env);
1856 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1859 * Emits code for a node.
1862 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1863 ir_op *op = get_irn_op(node);
1865 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
1867 if (op->ops.generic) {
1868 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1869 ia32_emit_dbg(env, node);
1870 (*func) (env, node);
1872 emit_Nothing(env, node);
1873 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1878 * Emits gas alignment directives
1881 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1882 be_emit_cstring(env, "\t.p2align ");
1883 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
1884 be_emit_write_line(env);
1888 * Emits gas alignment directives for Functions depended on cpu architecture.
1891 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1893 unsigned maximum_skip;
1908 maximum_skip = (1 << align) - 1;
1909 ia32_emit_alignment(env, align, maximum_skip);
1913 * Emits gas alignment directives for Labels depended on cpu architecture.
1916 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1917 unsigned align; unsigned maximum_skip;
1932 maximum_skip = (1 << align) - 1;
1933 ia32_emit_alignment(env, align, maximum_skip);
1937 * Test wether a block should be aligned.
1938 * For cpus in the P4/Athlon class it is usefull to align jump labels to
1939 * 16 bytes. However we should only do that if the alignment nops before the
1940 * label aren't executed more often than we have jumps to the label.
1943 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
1944 static const double DELTA = .0001;
1945 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1947 double prev_freq = 0; /**< execfreq of the fallthrough block */
1948 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
1949 cpu_support cpu = env->isa->opt_arch;
1952 if(exec_freq == NULL)
1954 if(cpu == arch_i386 || cpu == arch_i486)
1957 block_freq = get_block_execfreq(exec_freq, block);
1958 if(block_freq < DELTA)
1961 n_cfgpreds = get_Block_n_cfgpreds(block);
1962 for(i = 0; i < n_cfgpreds; ++i) {
1963 ir_node *pred = get_Block_cfgpred_block(block, i);
1964 double pred_freq = get_block_execfreq(exec_freq, pred);
1967 prev_freq += pred_freq;
1969 jmp_freq += pred_freq;
1973 if(prev_freq < DELTA && !(jmp_freq < DELTA))
1976 jmp_freq /= prev_freq;
1980 case arch_athlon_64:
1982 return jmp_freq > 3;
1984 return jmp_freq > 2;
1989 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
1994 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1997 n_cfgpreds = get_Block_n_cfgpreds(block);
1998 if (n_cfgpreds == 0) {
2000 } else if (n_cfgpreds == 1) {
2001 ir_node *pred = get_Block_cfgpred(block, 0);
2002 ir_node *pred_block = get_nodes_block(pred);
2004 /* we don't need labels for fallthrough blocks, however switch-jmps
2005 * are no fallthoughs */
2006 if(pred_block == prev &&
2007 !(is_Proj(pred) && is_ia32_SwitchJmp(get_Proj_pred(pred)))) {
2016 if (should_align_block(env, block, prev)) {
2018 ia32_emit_align_label(env, env->isa->opt_arch);
2022 ia32_emit_block_name(env, block);
2023 be_emit_char(env, ':');
2025 be_emit_pad_comment(env);
2026 be_emit_cstring(env, " /* preds:");
2028 /* emit list of pred blocks in comment */
2029 arity = get_irn_arity(block);
2030 for (i = 0; i < arity; ++i) {
2031 ir_node *predblock = get_Block_cfgpred_block(block, i);
2032 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2035 if (exec_freq != NULL) {
2036 be_emit_irprintf(env->emit, " freq: %f",
2037 get_block_execfreq(exec_freq, block));
2039 be_emit_cstring(env, " */\n");
2041 be_emit_cstring(env, "\t/* ");
2042 ia32_emit_block_name(env, block);
2043 be_emit_cstring(env, ": */\n");
2045 be_emit_write_line(env);
2049 * Walks over the nodes in a block connected by scheduling edges
2050 * and emits code for each node.
2053 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2055 const ir_node *node;
2057 ia32_emit_block_header(env, block, last_block);
2059 /* emit the contents of the block */
2060 ia32_emit_dbg(env, block);
2061 sched_foreach(block, node) {
2062 ia32_emit_node(env, node);
2067 * Emits code for function start.
2070 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2071 ir_entity *irg_ent = get_irg_entity(irg);
2072 const char *irg_name = get_entity_ld_name(irg_ent);
2073 cpu_support cpu = env->isa->opt_arch;
2074 const be_irg_t *birg = env->cg->birg;
2076 be_emit_write_line(env);
2077 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2078 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2079 ia32_emit_align_func(env, cpu);
2080 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2081 be_emit_cstring(env, ".global ");
2082 be_emit_string(env, irg_name);
2083 be_emit_char(env, '\n');
2084 be_emit_write_line(env);
2086 ia32_emit_function_object(env, irg_name);
2087 be_emit_string(env, irg_name);
2088 be_emit_cstring(env, ":\n");
2089 be_emit_write_line(env);
2093 * Emits code for function end
2096 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2097 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2098 const be_irg_t *birg = env->cg->birg;
2100 ia32_emit_function_size(env, irg_name);
2101 be_dbg_method_end(birg->main_env->db_handle);
2102 be_emit_char(env, '\n');
2103 be_emit_write_line(env);
2108 * Sets labels for control flow nodes (jump target)
2111 void ia32_gen_labels(ir_node *block, void *data) {
2113 int n = get_Block_n_cfgpreds(block);
2115 for (n--; n >= 0; n--) {
2116 pred = get_Block_cfgpred(block, n);
2117 set_irn_link(pred, block);
2122 * Main driver. Emits the code for one routine.
2124 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2125 ia32_emit_env_t env;
2127 ir_node *last_block = NULL;
2130 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2131 env.emit = &env.isa->emit;
2132 env.arch_env = cg->arch_env;
2135 ia32_register_emitters();
2137 ia32_emit_func_prolog(&env, irg);
2138 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2140 n = ARR_LEN(cg->blk_sched);
2141 for (i = 0; i < n;) {
2144 block = cg->blk_sched[i];
2146 next_bl = i < n ? cg->blk_sched[i] : NULL;
2148 /* set here the link. the emitter expects to find the next block here */
2149 set_irn_link(block, next_bl);
2150 ia32_gen_block(&env, block, last_block);
2154 ia32_emit_func_epilog(&env, irg);
2157 void ia32_init_emitter(void)
2159 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");