2 * This file implements the node emitter.
22 #include "iredges_t.h"
24 #include "../besched_t.h"
25 #include "../benode_t.h"
27 #include "ia32_emitter.h"
28 #include "gen_ia32_emitter.h"
29 #include "gen_ia32_regalloc_if.h"
30 #include "ia32_nodes_attr.h"
31 #include "ia32_new_nodes.h"
32 #include "ia32_map_regs.h"
33 #include "bearch_ia32_t.h"
35 #define BLOCK_PREFIX(x) ".L" x
37 #define SNPRINTF_BUF_LEN 128
39 /* global arch_env for lc_printf functions */
40 static const arch_env_t *arch_env = NULL;
42 /** by default, we generate assembler code for the Linux gas */
43 asm_flavour_t asm_flavour = ASM_LINUX_GAS;
46 * Switch to a new section
48 void ia32_switch_section(FILE *F, section_t sec) {
49 static section_t curr_sec = NO_SECTION;
50 static const char *text[ASM_MAX][SECTION_MAX] = {
52 ".section\t.text", ".section\t.data", ".section\t.rodata", ".section\t.text"
55 ".section\t.text", ".section\t.data", ".section .rdata,\"dr\"", ".section\t.text"
72 fprintf(F, "\t%s\n", text[asm_flavour][sec]);
76 static void ia32_dump_function_object(FILE *F, const char *name)
78 switch (asm_flavour) {
80 fprintf(F, "\t.type\t%s, @function\n", name);
83 fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name);
88 static void ia32_dump_function_size(FILE *F, const char *name)
90 switch (asm_flavour) {
92 fprintf(F, "\t.size\t%s, .-%s\n", name, name);
97 /*************************************************************
99 * (_) | | / _| | | | |
100 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
101 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
102 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
103 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
106 *************************************************************/
109 * returns true if a node has x87 registers
111 static int has_x87_register(const ir_node *n) {
112 return is_irn_machine_user(n, 0);
115 /* We always pass the ir_node which is a pointer. */
116 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
117 return lc_arg_type_ptr;
122 * Returns the register at in position pos.
124 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
126 const arch_register_t *reg = NULL;
128 assert(get_irn_arity(irn) > pos && "Invalid IN position");
130 /* The out register of the operator at position pos is the
131 in register we need. */
132 op = get_irn_n(irn, pos);
134 reg = arch_get_irn_register(arch_env, op);
136 assert(reg && "no in register found");
138 /* in case of unknown: just return a register */
139 if (REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN]))
140 reg = &ia32_gp_regs[REG_EAX];
141 else if (REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]))
142 reg = &ia32_xmm_regs[REG_XMM0];
143 else if (REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]))
144 reg = &ia32_vfp_regs[REG_VF0];
150 * Returns the register at out position pos.
152 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
154 const arch_register_t *reg = NULL;
156 /* 1st case: irn is not of mode_T, so it has only */
157 /* one OUT register -> good */
158 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
159 /* Proj with the corresponding projnum for the register */
161 if (get_irn_mode(irn) != mode_T) {
162 reg = arch_get_irn_register(arch_env, irn);
164 else if (is_ia32_irn(irn)) {
165 reg = get_ia32_out_reg(irn, pos);
168 const ir_edge_t *edge;
170 foreach_out_edge(irn, edge) {
171 proj = get_edge_src_irn(edge);
172 assert(is_Proj(proj) && "non-Proj from mode_T node");
173 if (get_Proj_proj(proj) == pos) {
174 reg = arch_get_irn_register(arch_env, proj);
180 assert(reg && "no out register found");
190 * Returns the name of the in register at position pos.
192 static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
193 const arch_register_t *reg;
195 if (in_out == IN_REG) {
196 reg = get_in_reg(irn, pos);
198 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
199 /* FIXME: works for binop only */
200 assert(2 <= pos && pos <= 3);
201 reg = get_ia32_attr(irn)->x87[pos - 2];
205 /* destination address mode nodes don't have outputs */
206 if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
210 reg = get_out_reg(irn, pos);
211 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
212 reg = get_ia32_attr(irn)->x87[pos + 2];
214 return arch_register_get_name(reg);
218 * Get the register name for a node.
220 static int ia32_get_reg_name(lc_appendable_t *app,
221 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
224 ir_node *X = arg->v_ptr;
225 int nr = occ->width - 1;
228 return lc_appendable_snadd(app, "(null)", 6);
230 buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
232 /* append the stupid % to register names */
233 lc_appendable_chadd(app, '%');
234 return lc_appendable_snadd(app, buf, strlen(buf));
238 * Get the x87 register name for a node.
240 static int ia32_get_x87_name(lc_appendable_t *app,
241 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
244 ir_node *X = arg->v_ptr;
245 int nr = occ->width - 1;
249 return lc_appendable_snadd(app, "(null)", 6);
251 attr = get_ia32_attr(X);
252 buf = attr->x87[nr]->name;
253 lc_appendable_chadd(app, '%');
254 return lc_appendable_snadd(app, buf, strlen(buf));
258 * Returns the tarval, offset or scale of an ia32 as a string.
260 static int ia32_const_to_str(lc_appendable_t *app,
261 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
264 ir_node *X = arg->v_ptr;
267 return lc_arg_append(app, occ, "(null)", 6);
269 if (occ->conversion == 'C') {
270 buf = get_ia32_cnst(X);
273 buf = get_ia32_am_offs(X);
276 return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
280 * Determines the SSE suffix depending on the mode.
282 static int ia32_get_mode_suffix(lc_appendable_t *app,
283 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
285 ir_node *X = arg->v_ptr;
286 ir_mode *mode = get_irn_mode(X);
288 if (mode == mode_T) {
289 mode = (is_ia32_Ld(X) || is_ia32_St(X)) ? get_ia32_ls_mode(X) : get_ia32_res_mode(X);
293 return lc_arg_append(app, occ, "(null)", 6);
295 if (mode_is_float(mode)) {
296 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
299 return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
304 * Return the ia32 printf arg environment.
305 * We use the firm environment with some additional handlers.
307 const lc_arg_env_t *ia32_get_arg_env(void) {
308 static lc_arg_env_t *env = NULL;
310 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
311 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
312 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
313 static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
316 /* extend the firm printer */
317 env = firm_get_arg_env();
319 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
320 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
321 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
322 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
323 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
324 lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
330 static char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
331 switch(get_mode_size_bits(mode)) {
333 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
335 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
337 return (char *)arch_register_get_name(reg);
342 * Emits registers and/or address mode of a binary operation.
344 char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
345 static char *buf = NULL;
347 /* verify that this function is never called on non-AM supporting operations */
348 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
350 #define PRODUCES_RESULT(n) \
351 (!(is_ia32_St(n) || \
352 is_ia32_Store8Bit(n) || \
353 is_ia32_CondJmp(n) || \
354 is_ia32_xCondJmp(n) || \
355 is_ia32_SwitchJmp(n)))
358 buf = xcalloc(1, SNPRINTF_BUF_LEN);
361 memset(buf, 0, SNPRINTF_BUF_LEN);
364 switch(get_ia32_op_type(n)) {
366 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
367 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
370 const arch_register_t *in1 = get_in_reg(n, 2);
371 const arch_register_t *in2 = get_in_reg(n, 3);
372 const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
373 const arch_register_t *in;
376 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
377 out = out ? out : in1;
378 in_name = arch_register_get_name(in);
380 if (is_ia32_emit_cl(n)) {
381 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
385 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
389 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
390 assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
391 snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
394 if (PRODUCES_RESULT(n)) {
395 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n, env));
398 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, ia32_emit_am(n, env));
403 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
404 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
405 ia32_emit_am(n, env),
406 is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
407 get_ia32_cnst(n)); /* tell the assembler to store it's address. */
410 const arch_register_t *in1 = get_in_reg(n, 2);
411 ir_mode *mode = get_ia32_res_mode(n);
414 mode = mode ? mode : get_ia32_ls_mode(n);
415 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
417 if (is_ia32_emit_cl(n)) {
418 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
422 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
426 assert(0 && "unsupported op type");
429 #undef PRODUCES_RESULT
435 * Emits registers and/or address mode of a binary operation.
437 char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
438 static char *buf = NULL;
440 /* verify that this function is never called on non-AM supporting operations */
441 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
444 buf = xcalloc(1, SNPRINTF_BUF_LEN);
447 memset(buf, 0, SNPRINTF_BUF_LEN);
450 switch(get_ia32_op_type(n)) {
452 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
453 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
456 ia32_attr_t *attr = get_ia32_attr(n);
457 const arch_register_t *in1 = attr->x87[0];
458 const arch_register_t *in2 = attr->x87[1];
459 const arch_register_t *out = attr->x87[2];
460 const arch_register_t *in;
463 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
464 out = out ? out : in1;
465 in_name = arch_register_get_name(in);
467 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
472 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
475 assert(0 && "unsupported op type");
478 #undef PRODUCES_RESULT
484 * Emits registers and/or address mode of a unary operation.
486 char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
487 static char *buf = NULL;
490 buf = xcalloc(1, SNPRINTF_BUF_LEN);
493 memset(buf, 0, SNPRINTF_BUF_LEN);
496 switch(get_ia32_op_type(n)) {
498 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
499 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
502 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
506 snprintf(buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
509 assert(0 && "unsupported op type");
516 * Emits address mode.
518 char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
519 ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
523 static struct obstack *obst = NULL;
524 ir_mode *mode = get_ia32_ls_mode(n);
526 if (! is_ia32_Lea(n))
527 assert(mode && "AM node must have ls_mode attribute set.");
530 obst = xcalloc(1, sizeof(*obst));
533 obstack_free(obst, NULL);
536 /* obstack_free with NULL results in an uninitialized obstack */
540 switch (get_mode_size_bits(mode)) {
542 obstack_printf(obst, "BYTE PTR ");
545 obstack_printf(obst, "WORD PTR ");
548 obstack_printf(obst, "DWORD PTR ");
551 if (has_x87_register(n))
552 /* ARGHHH: stupid gas x87 wants QWORD PTR but SSE must be WITHOUT */
553 obstack_printf(obst, "QWORD PTR ");
557 obstack_printf(obst, "XWORD PTR ");
564 /* emit address mode symconst */
565 if (get_ia32_am_sc(n)) {
566 if (is_ia32_am_sc_sign(n))
567 obstack_printf(obst, "-");
568 obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
571 if (am_flav & ia32_B) {
572 obstack_printf(obst, "[");
573 lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
577 if (am_flav & ia32_I) {
579 obstack_printf(obst, "+");
582 obstack_printf(obst, "[");
585 lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
587 if (am_flav & ia32_S) {
588 obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
594 if (am_flav & ia32_O) {
595 s = get_ia32_am_offs(n);
598 /* omit explicit + if there was no base or index */
600 obstack_printf(obst, "[");
605 obstack_printf(obst, s);
611 obstack_printf(obst, "] ");
613 size = obstack_object_size(obst);
614 s = obstack_finish(obst);
623 * Formated print of commands and comments.
625 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
627 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
630 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
632 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
638 * Add a number to a prefix. This number will not be used a second time.
640 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
641 static unsigned long id = 0;
642 snprintf(buf, buflen, "%s%lu", prefix, ++id);
648 /*************************************************
651 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
652 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
653 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
654 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
656 *************************************************/
659 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
662 * coding of conditions
664 struct cmp2conditon_t {
670 * positive conditions for signed compares
672 static const struct cmp2conditon_t cmp2condition_s[] = {
673 { NULL, pn_Cmp_False }, /* always false */
674 { "e", pn_Cmp_Eq }, /* == */
675 { "l", pn_Cmp_Lt }, /* < */
676 { "le", pn_Cmp_Le }, /* <= */
677 { "g", pn_Cmp_Gt }, /* > */
678 { "ge", pn_Cmp_Ge }, /* >= */
679 { "ne", pn_Cmp_Lg }, /* != */
680 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
681 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
682 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
683 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
684 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
685 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
686 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
687 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
688 { NULL, pn_Cmp_True }, /* always true */
692 * positive conditions for unsigned compares
694 static const struct cmp2conditon_t cmp2condition_u[] = {
695 { NULL, pn_Cmp_False }, /* always false */
696 { "e", pn_Cmp_Eq }, /* == */
697 { "b", pn_Cmp_Lt }, /* < */
698 { "be", pn_Cmp_Le }, /* <= */
699 { "a", pn_Cmp_Gt }, /* > */
700 { "ae", pn_Cmp_Ge }, /* >= */
701 { "ne", pn_Cmp_Lg }, /* != */
702 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
703 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
704 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
705 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
706 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
707 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
708 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
709 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
710 { NULL, pn_Cmp_True }, /* always true */
714 * returns the condition code
716 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
718 assert(cmp2condition_s[cmp_code].num == cmp_code);
719 assert(cmp2condition_u[cmp_code].num == cmp_code);
721 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
725 * Returns the target block for a control flow node.
727 static ir_node *get_cfop_target_block(const ir_node *irn) {
728 return get_irn_link(irn);
732 * Returns the target label for a control flow node.
734 static char *get_cfop_target(const ir_node *irn, char *buf) {
735 ir_node *bl = get_cfop_target_block(irn);
737 snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
741 /** Return the next block in Block schedule */
742 static ir_node *next_blk_sched(const ir_node *block) {
743 return get_irn_link(block);
747 * Returns the Proj with projection number proj and NOT mode_M
749 static ir_node *get_proj(const ir_node *irn, long proj) {
750 const ir_edge_t *edge;
753 assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
755 foreach_out_edge(irn, edge) {
756 src = get_edge_src_irn(edge);
758 assert(is_Proj(src) && "Proj expected");
759 if (get_irn_mode(src) == mode_M)
762 if (get_Proj_proj(src) == proj)
769 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
771 static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
772 const ir_node *proj1, *proj2 = NULL;
773 const ir_node *block, *next_bl = NULL;
774 char buf[SNPRINTF_BUF_LEN];
775 char cmd_buf[SNPRINTF_BUF_LEN];
776 char cmnt_buf[SNPRINTF_BUF_LEN];
778 /* get both Proj's */
779 proj1 = get_proj(irn, pn_Cond_true);
780 assert(proj1 && "CondJmp without true Proj");
782 proj2 = get_proj(irn, pn_Cond_false);
783 assert(proj2 && "CondJmp without false Proj");
785 /* for now, the code works for scheduled and non-schedules blocks */
786 block = get_nodes_block(irn);
788 /* we have a block schedule */
789 next_bl = next_blk_sched(block);
791 if (get_cfop_target_block(proj1) == next_bl) {
792 /* exchange both proj's so the second one can be omitted */
793 const ir_node *t = proj1;
798 /* the first Proj must always be created */
799 if (get_Proj_proj(proj1) == pn_Cond_true) {
800 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
801 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
802 get_cfop_target(proj1, buf));
803 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
806 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
807 get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
808 !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
809 get_cfop_target(proj1, buf));
810 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
814 /* the second Proj might be a fallthrough */
815 if (get_cfop_target_block(proj2) != next_bl) {
816 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
817 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
821 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(proj2, buf));
827 * Emits code for conditional jump.
829 static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
831 char cmd_buf[SNPRINTF_BUF_LEN];
832 char cmnt_buf[SNPRINTF_BUF_LEN];
834 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
835 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
837 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
841 * Emits code for conditional jump with two variables.
843 static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
844 CondJmp_emitter(irn, env);
848 * Emits code for conditional test and jump.
850 static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
852 #define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
855 const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
856 const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
857 char cmd_buf[SNPRINTF_BUF_LEN];
858 char cmnt_buf[SNPRINTF_BUF_LEN];
861 op2 = arch_register_get_name(get_in_reg(irn, 1));
863 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
864 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
867 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
873 * Emits code for conditional test and jump with two variables.
875 static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
876 TestJmp_emitter(irn, env);
879 static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
881 char cmd_buf[SNPRINTF_BUF_LEN];
882 char cmnt_buf[SNPRINTF_BUF_LEN];
884 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
885 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
887 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
890 static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
892 char cmd_buf[SNPRINTF_BUF_LEN];
893 char cmnt_buf[SNPRINTF_BUF_LEN];
895 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
896 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
898 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
902 * Emits code for conditional x87 floating point jump with two variables.
904 static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) {
906 char cmd_buf[SNPRINTF_BUF_LEN];
907 char cmnt_buf[SNPRINTF_BUF_LEN];
908 ia32_attr_t *attr = get_ia32_attr(irn);
909 const char *reg = attr->x87[1]->name;
910 const char *instr = "fcom";
913 switch (get_ia32_pncode(irn)) {
914 case iro_ia32_fcomrJmp:
916 case iro_ia32_fcomJmp:
920 case iro_ia32_fcomrpJmp:
922 case iro_ia32_fcompJmp:
925 case iro_ia32_fcomrppJmp:
927 case iro_ia32_fcomppJmp:
934 set_ia32_pncode(irn, (long)get_negated_pnc(get_ia32_pncode(irn), mode_Is));
936 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s", instr, reg);
937 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
939 // lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %3D", irn);
940 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn);
941 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */");
943 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sahf");
944 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store ah into flags */");
947 finish_CondJmp(F, irn, mode_Is);
950 /*********************************************************
953 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
954 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
955 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
956 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
959 *********************************************************/
961 /* jump table entry (target and corresponding number) */
962 typedef struct _branch_t {
967 /* jump table for switch generation */
968 typedef struct _jmp_tbl_t {
969 ir_node *defProj; /**< default target */
970 int min_value; /**< smallest switch case */
971 int max_value; /**< largest switch case */
972 int num_branches; /**< number of jumps */
973 char *label; /**< label of the jump table */
974 branch_t *branches; /**< jump array */
978 * Compare two variables of type branch_t. Used to sort all switch cases
980 static int ia32_cmp_branch_t(const void *a, const void *b) {
981 branch_t *b1 = (branch_t *)a;
982 branch_t *b2 = (branch_t *)b;
984 if (b1->value <= b2->value)
991 * Emits code for a SwitchJmp (creates a jump table if
992 * possible otherwise a cmp-jmp cascade). Port from
995 static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
996 unsigned long interval;
997 char buf[SNPRINTF_BUF_LEN];
998 int last_value, i, pn;
1001 const ir_edge_t *edge;
1002 const lc_arg_env_t *env = ia32_get_arg_env();
1003 FILE *F = emit_env->out;
1004 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1006 /* fill the table structure */
1007 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1008 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
1010 tbl.num_branches = get_irn_n_edges(irn);
1011 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1012 tbl.min_value = INT_MAX;
1013 tbl.max_value = INT_MIN;
1016 /* go over all proj's and collect them */
1017 foreach_out_edge(irn, edge) {
1018 proj = get_edge_src_irn(edge);
1019 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1021 pn = get_Proj_proj(proj);
1023 /* create branch entry */
1024 tbl.branches[i].target = proj;
1025 tbl.branches[i].value = pn;
1027 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
1028 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
1030 /* check for default proj */
1031 if (pn == get_ia32_pncode(irn)) {
1032 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1039 /* sort the branches by their number */
1040 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1042 /* two-complement's magic make this work without overflow */
1043 interval = tbl.max_value - tbl.min_value;
1045 /* emit the table */
1046 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
1047 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
1050 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
1051 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
1054 if (tbl.num_branches > 1) {
1057 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
1058 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
1061 ia32_switch_section(F, SECTION_RODATA);
1062 fprintf(F, "\t.align 4\n");
1064 fprintf(F, "%s:\n", tbl.label);
1066 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
1067 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
1070 last_value = tbl.branches[0].value;
1071 for (i = 1; i < tbl.num_branches; ++i) {
1072 while (++last_value < tbl.branches[i].value) {
1073 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
1074 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
1077 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
1078 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
1081 ia32_switch_section(F, SECTION_TEXT);
1084 /* one jump is enough */
1085 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
1086 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
1097 * Emits code for a unconditional jump.
1099 static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
1100 ir_node *block, *next_bl;
1102 char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1104 /* for now, the code works for scheduled and non-schedules blocks */
1105 block = get_nodes_block(irn);
1107 /* we have a block schedule */
1108 next_bl = next_blk_sched(block);
1109 if (get_cfop_target_block(irn) != next_bl) {
1110 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
1111 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
1115 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
1120 /****************************
1123 * _ __ _ __ ___ _ ___
1124 * | '_ \| '__/ _ \| |/ __|
1125 * | |_) | | | (_) | |\__ \
1126 * | .__/|_| \___/| ||___/
1129 ****************************/
1132 * Emits code for a proj -> node
1134 static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
1135 ir_node *pred = get_Proj_pred(irn);
1137 if (get_irn_op(pred) == op_Start) {
1138 switch(get_Proj_proj(irn)) {
1139 case pn_Start_X_initial_exec:
1148 /**********************************
1151 * | | ___ _ __ _ _| |_) |
1152 * | | / _ \| '_ \| | | | _ <
1153 * | |___| (_) | |_) | |_| | |_) |
1154 * \_____\___/| .__/ \__, |____/
1157 **********************************/
1160 * Emit movsb/w instructions to make mov count divideable by 4
1162 static void emit_CopyB_prolog(FILE *F, int rem, int size) {
1163 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1165 fprintf(F, "\t/* memcopy %d bytes*/\n", size);
1167 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
1168 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
1173 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1174 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
1177 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1178 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
1181 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1182 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1184 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1185 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1193 * Emit rep movsd instruction for memcopy.
1195 static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
1196 FILE *F = emit_env->out;
1197 tarval *tv = get_ia32_Immop_tarval(irn);
1198 int rem = get_tarval_long(tv);
1199 ir_node *size_node = get_irn_n(irn, 2);
1201 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1203 /* beware: size_node could be a be_Copy to fulfill constraints for ecx */
1204 size_node = be_is_Copy(size_node) ? be_get_Copy_op(size_node) : size_node;
1205 size = get_tarval_long(get_ia32_Immop_tarval(size_node));
1207 emit_CopyB_prolog(F, rem, size);
1209 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
1210 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
1215 * Emits unrolled memcopy.
1217 static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
1218 tarval *tv = get_ia32_Immop_tarval(irn);
1219 int size = get_tarval_long(tv);
1220 FILE *F = emit_env->out;
1221 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1223 emit_CopyB_prolog(F, size & 0x3, size);
1227 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
1228 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
1235 /***************************
1239 * | | / _ \| '_ \ \ / /
1240 * | |___| (_) | | | \ V /
1241 * \_____\___/|_| |_|\_/
1243 ***************************/
1246 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1248 static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1249 FILE *F = emit_env->out;
1250 const lc_arg_env_t *env = ia32_get_arg_env();
1251 ir_mode *src_mode = get_ia32_src_mode(irn);
1252 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1253 char *from, *to, buf[64];
1254 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1256 from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
1257 to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
1259 switch(get_ia32_op_type(irn)) {
1261 lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
1263 case ia32_AddrModeS:
1264 lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
1267 assert(0 && "unsupported op type for Conv");
1270 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
1271 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
1275 static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1276 emit_ia32_Conv_with_FP(irn, emit_env);
1279 static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1280 emit_ia32_Conv_with_FP(irn, emit_env);
1283 static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1284 emit_ia32_Conv_with_FP(irn, emit_env);
1288 * Emits code for an Int conversion.
1290 static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1291 FILE *F = emit_env->out;
1292 const lc_arg_env_t *env = ia32_get_arg_env();
1293 char *move_cmd = "movzx";
1294 char *conv_cmd = NULL;
1295 ir_mode *src_mode = get_ia32_src_mode(irn);
1296 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1298 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1299 const arch_register_t *in_reg, *out_reg;
1301 n = get_mode_size_bits(src_mode);
1302 m = get_mode_size_bits(tgt_mode);
1304 if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
1306 if (n == 8 || m == 8)
1308 else if (n == 16 || m == 16)
1311 assert(0 && "unsupported Conv_I2I");
1314 switch(get_ia32_op_type(irn)) {
1316 in_reg = get_in_reg(irn, 2);
1317 out_reg = get_out_reg(irn, 0);
1319 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1320 REGS_ARE_EQUAL(out_reg, in_reg) &&
1321 mode_is_signed(n < m ? src_mode : tgt_mode))
1323 /* argument and result are both in EAX and */
1324 /* signedness is ok: -> use converts */
1325 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
1327 else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
1328 ! mode_is_signed(n < m ? src_mode : tgt_mode))
1330 /* argument and result are in the same register */
1331 /* and signedness is ok: -> use and with mask */
1332 int mask = (1 << (n < m ? n : m)) - 1;
1333 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
1336 /* use move w/o sign extension */
1337 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
1338 move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
1342 case ia32_AddrModeS:
1343 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
1344 move_cmd, irn, ia32_emit_am(irn, emit_env));
1347 assert(0 && "unsupported op type for Conv");
1350 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
1351 irn, n, src_mode, m, tgt_mode);
1357 * Emits code for an 8Bit Int conversion.
1359 void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
1360 emit_ia32_Conv_I2I(irn, emit_env);
1364 /*******************************************
1367 * | |__ ___ _ __ ___ __| | ___ ___
1368 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1369 * | |_) | __/ | | | (_) | (_| | __/\__ \
1370 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1372 *******************************************/
1375 * Emits a backend call
1377 static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
1378 FILE *F = emit_env->out;
1379 entity *ent = be_Call_get_entity(irn);
1380 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1383 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
1386 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
1389 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
1395 * Emits code to increase stack pointer.
1397 static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1398 FILE *F = emit_env->out;
1399 unsigned offs = be_get_IncSP_offset(irn);
1400 be_stack_dir_t dir = be_get_IncSP_direction(irn);
1401 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1404 if (dir == be_stack_dir_expand)
1405 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
1407 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
1408 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
1411 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
1412 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
1419 * Emits code to set stack pointer.
1421 static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1422 FILE *F = emit_env->out;
1423 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1425 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1426 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
1431 * Emits code for Copy.
1433 static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
1434 FILE *F = emit_env->out;
1435 const arch_env_t *aenv = emit_env->arch_env;
1436 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1438 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))))
1441 if (mode_is_float(get_irn_mode(irn)))
1442 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
1444 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
1445 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1450 * Emits code for exchange.
1452 static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
1453 FILE *F = emit_env->out;
1454 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1456 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
1457 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
1462 * Emits code for Constant loading.
1464 static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) {
1466 char cmd_buf[256], cmnt_buf[256];
1467 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1469 if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) {
1470 const char *instr = "xor";
1471 if (env->isa->opt_arch == arch_pentium_4) {
1472 /* P4 prefers sub r, r, others xor r, r */
1475 lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n);
1476 lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */");
1479 if (get_ia32_op_type(n) == ia32_SymConst) {
1480 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n);
1481 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */");
1484 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n);
1485 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */");
1488 lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n);
1493 /***********************************************************************************
1496 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1497 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1498 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1499 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1501 ***********************************************************************************/
1504 * Enters the emitter functions for handled nodes into the generic
1505 * pointer of an opcode.
1507 static void ia32_register_emitters(void) {
1509 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1510 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1511 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1512 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1514 /* first clear the generic function pointer for all ops */
1515 clear_irp_opcodes_generic_func();
1517 /* register all emitter functions defined in spec */
1518 ia32_register_spec_emitters();
1520 /* other ia32 emitter functions */
1525 IA32_EMIT(SwitchJmp);
1528 IA32_EMIT(Conv_I2FP);
1529 IA32_EMIT(Conv_FP2I);
1530 IA32_EMIT(Conv_FP2FP);
1531 IA32_EMIT(Conv_I2I);
1532 IA32_EMIT(Conv_I2I8Bit);
1534 IA32_EMIT2(fcomJmp, x87CondJmp);
1535 IA32_EMIT2(fcompJmp, x87CondJmp);
1536 IA32_EMIT2(fcomppJmp, x87CondJmp);
1537 IA32_EMIT2(fcomrJmp, x87CondJmp);
1538 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1539 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1541 /* benode emitter */
1559 * Emits code for a node.
1561 static void ia32_emit_node(const ir_node *irn, void *env) {
1562 ia32_emit_env_t *emit_env = env;
1563 FILE *F = emit_env->out;
1564 ir_op *op = get_irn_op(irn);
1565 DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
1567 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
1569 if (op->ops.generic) {
1570 void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
1574 ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
1579 * Emits gas alignment directives
1581 static void ia32_emit_alignment(FILE *F, unsigned align, unsigned skip) {
1582 fprintf(F, "\t.p2align %u,,%u\n", align, skip);
1586 * Emits gas alignment directives for Functions depended on cpu architecture.
1588 static void ia32_emit_align_func(FILE *F, cpu_support cpu) {
1589 unsigned align; unsigned maximum_skip;
1591 /* gcc doesn't emit alignment for p4 ?*/
1592 if (cpu == arch_pentium_4)
1597 align = 2; maximum_skip = 3;
1600 align = 4; maximum_skip = 15;
1603 align = 5; maximum_skip = 31;
1606 align = 4; maximum_skip = 15;
1608 ia32_emit_alignment(F, align, maximum_skip);
1612 * Emits gas alignment directives for Labels depended on cpu architecture.
1614 static void ia32_emit_align_label(FILE *F, cpu_support cpu) {
1615 unsigned align; unsigned maximum_skip;
1617 /* gcc doesn't emit alignment for p4 ?*/
1618 if (cpu == arch_pentium_4)
1623 align = 2; maximum_skip = 3;
1626 align = 4; maximum_skip = 15;
1629 align = 5; maximum_skip = 7;
1632 align = 4; maximum_skip = 7;
1634 ia32_emit_alignment(F, align, maximum_skip);
1638 * Walks over the nodes in a block connected by scheduling edges
1639 * and emits code for each node.
1641 static void ia32_gen_block(ir_node *block, void *env) {
1642 ia32_emit_env_t *emit_env = env;
1644 int need_label = block != get_irg_start_block(get_irn_irg(block));
1646 if (! is_Block(block))
1649 if (need_label && (emit_env->cg->opt & IA32_OPT_EXTBB)) {
1650 /* if the extended block scheduler is used, only leader blocks need
1652 need_label = (block == get_extbb_leader(get_nodes_extbb(block)));
1656 ia32_emit_align_label(emit_env->out, emit_env->isa->opt_arch);
1657 fprintf(emit_env->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
1660 sched_foreach(block, irn) {
1661 ia32_emit_node(irn, env);
1666 * Emits code for function start.
1668 static void ia32_emit_func_prolog(FILE *F, ir_graph *irg, cpu_support cpu) {
1669 entity *irg_ent = get_irg_entity(irg);
1670 const char *irg_name = get_entity_ld_name(irg_ent);
1673 ia32_switch_section(F, SECTION_TEXT);
1674 ia32_emit_align_func(F, cpu);
1675 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1676 fprintf(F, ".globl %s\n", irg_name);
1678 ia32_dump_function_object(F, irg_name);
1679 fprintf(F, "%s:\n", irg_name);
1683 * Emits code for function end
1685 static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
1686 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
1688 fprintf(F, "\tret\n");
1689 ia32_dump_function_size(F, irg_name);
1695 * Sets labels for control flow nodes (jump target)
1696 * TODO: Jump optimization
1698 static void ia32_gen_labels(ir_node *block, void *env) {
1700 int n = get_Block_n_cfgpreds(block);
1702 for (n--; n >= 0; n--) {
1703 pred = get_Block_cfgpred(block, n);
1704 set_irn_link(pred, block);
1709 * Main driver. Emits the code for one routine.
1711 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
1712 ia32_emit_env_t emit_env;
1716 emit_env.arch_env = cg->arch_env;
1718 emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
1719 FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
1721 /* set the global arch_env (needed by print hooks) */
1722 arch_env = cg->arch_env;
1724 ia32_register_emitters();
1726 ia32_emit_func_prolog(F, irg, emit_env.isa->opt_arch);
1727 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
1729 if ((cg->opt & IA32_OPT_EXTBB) && cg->blk_sched) {
1730 int i, n = ARR_LEN(cg->blk_sched);
1732 for (i = 0; i < n;) {
1735 block = cg->blk_sched[i];
1737 next_bl = i < n ? cg->blk_sched[i] : NULL;
1739 /* set here the link. the emitter expects to find the next block here */
1740 set_irn_link(block, next_bl);
1741 ia32_gen_block(block, &emit_env);
1745 /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
1746 in the block schedule. As this number should NEVER be equal the next block,
1747 we does not need a clear block link here. */
1748 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
1751 ia32_emit_func_epilog(F, irg);