11 #include "../besched.h"
13 #include "ia32_emitter.h"
14 #include "gen_ia32_emitter.h"
15 #include "ia32_nodes_attr.h"
16 #include "ia32_new_nodes.h"
17 #include "ia32_map_regs.h"
19 #define SNPRINTF_BUF_LEN 128
21 static const arch_env_t *arch_env = NULL;
24 /*************************************************************
26 * (_) | | / _| | | | |
27 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
28 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
29 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
30 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
33 *************************************************************/
36 * Return node's tarval as string.
38 const char *node_const_to_str(ir_node *n) {
40 tarval *tv = get_ia32_Immop_tarval(n);
43 buf = malloc(SNPRINTF_BUF_LEN);
44 tarval_snprintf(buf, SNPRINTF_BUF_LEN, tv);
47 else if (get_ia32_old_ir(n)) {
48 return get_sc_name(get_ia32_old_ir(n));
55 * Returns node's offset as string.
57 char *node_offset_to_str(ir_node *n) {
59 tarval *tv = get_ia32_offs(n);
62 buf = malloc(SNPRINTF_BUF_LEN);
63 tarval_snprintf(buf, SNPRINTF_BUF_LEN, tv);
70 /* We always pass the ir_node which is a pointer. */
71 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
72 return lc_arg_type_ptr;
77 * Returns the register at in position pos.
79 static const arch_register_t *get_in_reg(ir_node *irn, int pos) {
81 const arch_register_t *reg = NULL;
83 assert(get_irn_arity(irn) > pos && "Invalid IN position");
85 /* The out register of the operator at position pos is the
86 in register we need. */
87 op = get_irn_n(irn, pos);
89 reg = arch_get_irn_register(arch_env, op);
91 assert(reg && "no in register found");
96 * Returns the register at out position pos.
98 static const arch_register_t *get_out_reg(ir_node *irn, int pos) {
100 const arch_register_t *reg = NULL;
102 assert(get_irn_n_edges(irn) > pos && "Invalid OUT position");
104 /* 1st case: irn is not of mode_T, so it has only */
105 /* one OUT register -> good */
106 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
107 /* Proj with the corresponding projnum for the register */
109 if (get_irn_mode(irn) != mode_T) {
110 reg = arch_get_irn_register(arch_env, irn);
112 else if (is_ia32_irn(irn)) {
113 reg = get_ia32_out_reg(irn, pos);
116 const ir_edge_t *edge;
118 foreach_out_edge(irn, edge) {
119 proj = get_edge_src_irn(edge);
120 assert(is_Proj(proj) && "non-Proj from mode_T node");
121 if (get_Proj_proj(proj) == pos) {
122 reg = arch_get_irn_register(arch_env, proj);
128 assert(reg && "no out register found");
133 * Returns the number of the in register at position pos.
135 int get_ia32_reg_nr(ir_node *irn, int pos, int in_out) {
136 const arch_register_t *reg;
140 /* special case Proj P_fame_base */
141 op = get_irn_n(irn, pos);
142 if (is_Proj(op) && get_Proj_proj(op) == pn_Start_P_frame_base) {
146 reg = get_in_reg(irn, pos);
149 reg = get_out_reg(irn, pos);
152 return arch_register_get_index(reg);
156 * Returns the name of the in register at position pos.
158 const char *get_ia32_reg_name(ir_node *irn, int pos, int in_out) {
159 const arch_register_t *reg;
163 /* special case Proj P_fame_base */
164 op = get_irn_n(irn, pos);
165 if (is_Proj(op) && get_Proj_proj(op) == pn_Start_P_frame_base) {
168 reg = get_in_reg(irn, pos);
171 reg = get_out_reg(irn, pos);
174 return arch_register_get_name(reg);
178 * Get the register name for a node.
180 static int ia32_get_reg_name(lc_appendable_t *app,
181 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
184 ir_node *X = arg->v_ptr;
185 int nr = occ->width - 1;
188 return lc_arg_append(app, occ, "(null)", 6);
190 if (occ->conversion == 'S') {
191 buf = get_ia32_reg_name(X, nr, 1);
194 buf = get_ia32_reg_name(X, nr, 0);
197 lc_appendable_chadd(app, '%');
198 return lc_arg_append(app, occ, buf, strlen(buf));
202 * Returns the tarval or offset of an ia32 as a string.
204 static int ia32_const_to_str(lc_appendable_t *app,
205 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
208 ir_node *X = arg->v_ptr;
211 return lc_arg_append(app, occ, "(null)", 6);
213 if (occ->conversion == 'C') {
214 buf = node_const_to_str(X);
217 buf = node_offset_to_str(X);
220 return lc_arg_append(app, occ, buf, strlen(buf));
224 * Determines the SSE suffix depending on the mode.
226 static int ia32_get_mode_suffix(lc_appendable_t *app,
227 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
229 ir_node *X = arg->v_ptr;
232 return lc_arg_append(app, occ, "(null)", 6);
234 if (get_mode_size_bits(get_irn_mode(X)) == 32)
235 return lc_appendable_chadd(app, 's');
237 return lc_appendable_chadd(app, 'd');
241 * Return the ia32 printf arg environment.
242 * We use the firm environment with some additional handlers.
244 const lc_arg_env_t *ia32_get_arg_env(void) {
245 static lc_arg_env_t *env = NULL;
247 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
248 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
249 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
252 /* extend the firm printer */
253 env = firm_get_arg_env();
256 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
257 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
258 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
259 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
260 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
267 * For 2-address code we need to make sure the first src reg is equal to dest reg.
269 void equalize_dest_src(FILE *F, ir_node *n) {
270 if (get_ia32_reg_nr(n, 0, 1) != get_ia32_reg_nr(n, 0, 0)) {
271 if (get_irn_arity(n) > 1 && get_ia32_reg_nr(n, 1, 1) == get_ia32_reg_nr(n, 0, 0)) {
272 if (! is_op_commutative(get_irn_op(n))) {
273 /* we only need to exchange for non-commutative ops */
274 lc_efprintf(ia32_get_arg_env(), F, "\txchg %1S, %2S\t\t\t/* xchg src1 <-> src2 for 2 address code */\n", n, n);
278 lc_efprintf(ia32_get_arg_env(), F, "\tmovl %1S, %1D\t\t\t/* src -> dest for 2 address code */\n", n, n);
284 * Add a number to a prefix. This number will not be used a second time.
286 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
287 static unsigned long id = 0;
288 snprintf(buf, buflen, "%s%lu", prefix, ++id);
293 /*************************************************
296 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
297 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
298 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
299 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
301 *************************************************/
304 * coding of conditions
306 struct cmp2conditon_t {
312 * positive conditions for signed compares
314 static const struct cmp2conditon_t cmp2condition_s[] = {
315 { NULL, pn_Cmp_False }, /* always false */
316 { "e", pn_Cmp_Eq }, /* == */
317 { "l", pn_Cmp_Lt }, /* < */
318 { "le", pn_Cmp_Le }, /* <= */
319 { "g", pn_Cmp_Gt }, /* > */
320 { "ge", pn_Cmp_Ge }, /* >= */
321 { "ne", pn_Cmp_Lg }, /* != */
322 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
323 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
324 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
325 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
326 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
327 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
328 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
329 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
330 { NULL, pn_Cmp_True }, /* always true */
334 * positive conditions for unsigned compares
336 static const struct cmp2conditon_t cmp2condition_u[] = {
337 { NULL, pn_Cmp_False }, /* always false */
338 { "e", pn_Cmp_Eq }, /* == */
339 { "b", pn_Cmp_Lt }, /* < */
340 { "be", pn_Cmp_Le }, /* <= */
341 { "a", pn_Cmp_Gt }, /* > */
342 { "ae", pn_Cmp_Ge }, /* >= */
343 { "ne", pn_Cmp_Lg }, /* != */
344 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
345 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
346 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
347 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
348 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
349 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
350 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
351 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
352 { NULL, pn_Cmp_True }, /* always true */
356 * returns the condition code
358 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
360 assert(cmp2condition_s[cmp_code].num == cmp_code);
361 assert(cmp2condition_u[cmp_code].num == cmp_code);
363 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
367 * Returns the target label for a control flow node.
369 static char *get_cfop_target(const ir_node *irn, char *buf) {
370 ir_node *bl = get_irn_link(irn);
372 snprintf(buf, SNPRINTF_BUF_LEN, "BLOCK_%ld", get_irn_node_nr(bl));
377 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
379 static void finish_CondJmp(FILE *F, ir_node *irn) {
381 const ir_edge_t *edge;
382 char buf[SNPRINTF_BUF_LEN];
384 edge = get_irn_out_edge_first(irn);
385 proj = get_edge_src_irn(edge);
386 assert(is_Proj(proj) && "CondJmp with a non-Proj");
388 if (get_Proj_proj(proj) == 1) {
389 fprintf(F, "\tj%s %s\t\t\t/* cmp(a, b) == TRUE */\n",
390 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
391 get_cfop_target(proj, buf));
394 fprintf(F, "\tjn%s %s\t\t\t/* cmp(a, b) == FALSE */\n",
395 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
396 get_cfop_target(proj, buf));
399 edge = get_irn_out_edge_next(irn, edge);
401 proj = get_edge_src_irn(edge);
402 assert(is_Proj(proj) && "CondJmp with a non-Proj");
403 fprintf(F, "\tjmp %s\t\t\t/* otherwise */\n", get_cfop_target(proj, buf));
408 * Emits code for conditional jump with two variables.
410 static void emit_ia32_CondJmp(ir_node *irn, emit_env_t *env) {
413 lc_efprintf(ia32_get_arg_env(), F, "\tcmp %2S, %1S\t\t\t/* CondJmp(%+F, %+F) */\n", irn, irn,
414 get_irn_n(irn, 0), get_irn_n(irn, 1));
415 finish_CondJmp(F, irn);
419 * Emits code for conditional jump with immediate.
421 void emit_ia32_CondJmp_i(ir_node *irn, emit_env_t *env) {
424 lc_efprintf(ia32_get_arg_env(), F, "\tcmp %C, %1S\t\t\t/* CondJmp_i(%+F) */\n", irn, irn, get_irn_n(irn, 0));
425 finish_CondJmp(F, irn);
430 /*********************************************************
433 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
434 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
435 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
436 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
439 *********************************************************/
441 /* jump table entry (target and corresponding number) */
442 typedef struct _branch_t {
447 /* jump table for switch generation */
448 typedef struct _jmp_tbl_t {
449 ir_node *defProj; /**< default target */
450 int min_value; /**< smallest switch case */
451 int max_value; /**< largest switch case */
452 int num_branches; /**< number of jumps */
453 char *label; /**< label of the jump table */
454 branch_t *branches; /**< jump array */
458 * Compare two variables of type branch_t. Used to sort all switch cases
460 static int ia32_cmp_branch_t(const void *a, const void *b) {
461 branch_t *b1 = (branch_t *)a;
462 branch_t *b2 = (branch_t *)b;
464 if (b1->value <= b2->value)
471 * Emits code for a SwitchJmp (creates a jump table if
472 * possible otherwise a cmp-jmp cascade). Port from
475 void emit_ia32_SwitchJmp(const ir_node *irn, emit_env_t *emit_env) {
476 unsigned long interval;
477 char buf[SNPRINTF_BUF_LEN];
478 int last_value, i, pn, do_jmp_tbl = 1;
481 const ir_edge_t *edge;
482 const lc_arg_env_t *env = ia32_get_arg_env();
483 FILE *F = emit_env->out;
485 /* fill the table structure */
486 tbl.label = malloc(SNPRINTF_BUF_LEN);
487 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
489 tbl.num_branches = get_irn_n_edges(irn);
490 tbl.branches = calloc(tbl.num_branches, sizeof(tbl.branches[0]));
491 tbl.min_value = INT_MAX;
492 tbl.max_value = INT_MIN;
495 /* go over all proj's and collect them */
496 foreach_out_edge(irn, edge) {
497 proj = get_edge_src_irn(edge);
498 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
500 pn = get_Proj_proj(proj);
502 /* create branch entry */
503 tbl.branches[i].target = proj;
504 tbl.branches[i].value = pn;
506 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
507 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
509 /* check for default proj */
510 if (pn == get_ia32_pncode(irn)) {
511 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
518 /* sort the branches by their number */
519 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
521 /* two-complement's magic make this work without overflow */
522 interval = tbl.max_value - tbl.min_value;
524 /* check value interval */
525 if (interval > 16 * 1024) {
529 /* check ratio of value interval to number of branches */
530 if ((float)(interval + 1) / (float)tbl.num_branches > 8.0) {
536 if (tbl.min_value != 0) {
537 fprintf(F, "\tcmpl %lu, -%d", interval, tbl.min_value);
538 lc_efprintf(env, F, "(%1S)\t\t/* first switch value is not 0 */\n", irn);
541 fprintf(F, "\tcmpl %lu, ", interval);
542 lc_efprintf(env, F, "%1S\t\t\t/* compare for switch */\n", irn);
545 fprintf(F, "\tja %s\t\t\t/* default jump if out of range */\n", get_cfop_target(tbl.defProj, buf));
547 if (tbl.num_branches > 1) {
550 //fprintf(F, "\tjmp *%s", tbl.label);
551 lc_efprintf(env, F, "\tjmp *%s(,%1S,4)\t\t/* get jump table entry as target */\n", tbl.label, irn);
553 fprintf(F, "\t.section\t.rodata\t\t/* start jump table */\n");
554 fprintf(F, "\t.align 4\n");
556 fprintf(F, "%s:\n", tbl.label);
557 fprintf(F, "\t.long %s\t\t\t/* case %d */\n", get_cfop_target(tbl.branches[0].target, buf), tbl.branches[0].value);
559 last_value = tbl.branches[0].value;
560 for (i = 1; i < tbl.num_branches; ++i) {
561 while (++last_value < tbl.branches[i].value) {
562 fprintf(F, "\t.long %s\t\t/* default case */\n", get_cfop_target(tbl.defProj, buf));
564 fprintf(F, "\t.long %s\t\t\t/* case %d */\n", get_cfop_target(tbl.branches[i].target, buf), last_value);
567 fprintf(F, "\t.text\t\t\t\t/* end of jump table */\n");
570 /* one jump is enough */
571 fprintf(F, "\tjmp %s\t\t/* only one case given */\n", get_cfop_target(tbl.branches[0].target, buf));
574 else { // no jump table
575 for (i = 0; i < tbl.num_branches; ++i) {
576 fprintf(F, "\tcmpl %d, ", tbl.branches[i].value);
577 lc_efprintf(env, F, "%1S", irn);
578 fprintf(F, "\t\t\t/* case %d */\n", tbl.branches[i].value);
579 fprintf(F, "\tje %s\n", get_cfop_target(tbl.branches[i].target, buf));
582 fprintf(F, "\tjmp %s\t\t\t/* default case */\n", get_cfop_target(tbl.defProj, buf));
592 * Emits code for a unconditional jump.
594 void emit_Jmp(ir_node *irn, emit_env_t *env) {
597 char buf[SNPRINTF_BUF_LEN];
598 ir_fprintf(F, "\tjmp %s\t\t\t/* Jmp(%+F) */\n", get_cfop_target(irn, buf), get_irn_link(irn));
603 /****************************
606 * _ __ _ __ ___ _ ___
607 * | '_ \| '__/ _ \| |/ __|
608 * | |_) | | | (_) | |\__ \
609 * | .__/|_| \___/| ||___/
612 ****************************/
615 * Emits code for a proj -> node
617 void emit_Proj(ir_node *irn, emit_env_t *env) {
618 ir_node *pred = get_Proj_pred(irn);
620 if (get_irn_opcode(pred) == iro_Start) {
621 switch(get_Proj_proj(irn)) {
622 case pn_Start_X_initial_exec:
633 /***********************************************************************************
636 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
637 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
638 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
639 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
641 ***********************************************************************************/
644 * Emits code for a node.
646 void ia32_emit_node(ir_node *irn, void *env) {
647 emit_env_t *emit_env = env;
648 firm_dbg_module_t *mod = emit_env->mod;
649 FILE *F = emit_env->out;
651 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
653 #define IA32_EMIT(a) if (is_ia32_##a(irn)) { emit_ia32_##a(irn, emit_env); return; }
654 #define EMIT(a) if (get_irn_opcode(irn) == iro_##a) { emit_##a(irn, emit_env); return; }
656 /* generated int emitter functions */
705 /* generated floating point emitter */
721 /* other emitter functions */
723 IA32_EMIT(CondJmp_i);
724 IA32_EMIT(SwitchJmp);
729 ir_fprintf(F, "\t\t\t\t\t/* %+F */\n", irn);
733 * Walks over the nodes in a block connected by scheduling edges
734 * and emits code for each node.
736 void ia32_gen_block(ir_node *block, void *env) {
739 if (! is_Block(block))
742 fprintf(((emit_env_t *)env)->out, "BLOCK_%ld:\n", get_irn_node_nr(block));
743 sched_foreach(block, irn) {
744 ia32_emit_node(irn, env);
750 * Emits code for function start.
752 void ia32_emit_start(FILE *F, ir_graph *irg) {
753 const char *irg_name = get_entity_name(get_irg_entity(irg));
755 fprintf(F, "\t.text\n");
756 fprintf(F, ".globl %s\n", irg_name);
757 fprintf(F, "\t.type\t%s, @function\n", irg_name);
758 fprintf(F, "%s:\n", irg_name);
762 * Emits code for function end
764 void ia32_emit_end(FILE *F, ir_graph *irg) {
765 const char *irg_name = get_entity_name(get_irg_entity(irg));
767 fprintf(F, "\tret\n");
768 fprintf(F, "\t.size\t%s, .-%s\n\n", irg_name, irg_name);
772 * Sets labels for control flow nodes (jump target)
773 * TODO: Jump optimization
775 void ia32_gen_labels(ir_node *block, void *env) {
777 int n = get_Block_n_cfgpreds(block);
779 for (n--; n >= 0; n--) {
780 pred = get_Block_cfgpred(block, n);
781 set_irn_link(pred, block);
788 void ia32_gen_routine(FILE *F, ir_graph *irg, const arch_env_t *env) {
791 emit_env.mod = firm_dbg_register("ir.be.codegen.ia32");
793 emit_env.arch_env = env;
797 ia32_emit_start(F, irg);
798 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
799 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
800 ia32_emit_end(F, irg);