2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 if(reg == &ia32_gp_regs[REG_GP_NOREG])
90 panic("trying to emit noreg");
92 /* in case of unknown register: just return a valid register */
93 if (reg == &ia32_gp_regs[REG_GP_UKNWN]) {
94 const arch_register_req_t *req;
96 /* ask for the requirements */
97 req = arch_get_register_req(arch_env, irn, pos);
99 if (arch_register_req_is(req, limited)) {
100 /* in case of limited requirements: get the first allowed register */
101 unsigned idx = rbitset_next(req->limited, 0, 1);
102 reg = arch_register_for_index(req->cls, idx);
104 /* otherwise get first register in class */
105 reg = arch_register_for_index(req->cls, 0);
113 * Returns the register at out position pos.
116 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
119 const arch_env_t *arch_env = env->arch_env;
121 const arch_register_t *reg = NULL;
123 /* 1st case: irn is not of mode_T, so it has only */
124 /* one OUT register -> good */
125 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
126 /* Proj with the corresponding projnum for the register */
128 if (get_irn_mode(irn) != mode_T) {
129 reg = arch_get_irn_register(arch_env, irn);
130 } else if (is_ia32_irn(irn)) {
131 reg = get_ia32_out_reg(irn, pos);
133 const ir_edge_t *edge;
135 foreach_out_edge(irn, edge) {
136 proj = get_edge_src_irn(edge);
137 assert(is_Proj(proj) && "non-Proj from mode_T node");
138 if (get_Proj_proj(proj) == pos) {
139 reg = arch_get_irn_register(arch_env, proj);
145 assert(reg && "no out register found");
150 * Determine the gnu assembler suffix that indicates a mode
153 char get_mode_suffix(const ir_mode *mode) {
154 if(mode_is_float(mode)) {
155 switch(get_mode_size_bits(mode)) {
165 assert(mode_is_int(mode) || mode_is_reference(mode));
166 switch(get_mode_size_bits(mode)) {
177 panic("Can't output mode_suffix for %+F\n", mode);
181 int produces_result(const ir_node *node) {
183 !is_ia32_CmpSet(node) &&
184 !is_ia32_CmpSet8Bit(node) &&
185 !is_ia32_CmpJmp(node) &&
186 !is_ia32_CmpJmp8Bit(node) &&
188 !is_ia32_SwitchJmp(node) &&
189 !is_ia32_TestJmp(node) &&
190 !is_ia32_TestJmp8Bit(node) &&
191 !is_ia32_xCmpSet(node) &&
192 !is_ia32_xCmpJmp(node) &&
193 !is_ia32_CmpCMov(node) &&
194 !is_ia32_CmpCMov8Bit(node) &&
195 !is_ia32_TestCMov(node) &&
196 !is_ia32_TestCMov8Bit(node) &&
197 !is_ia32_CmpSet(node) && /* this is correct, the Cmp has no result */
198 !is_ia32_TestSet(node);
202 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
203 const arch_register_t *reg) {
204 switch(get_mode_size_bits(mode)) {
206 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
208 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
210 return (char *)arch_register_get_name(reg);
215 * Add a number to a prefix. This number will not be used a second time.
218 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
219 static unsigned long id = 0;
220 snprintf(buf, buflen, "%s%lu", prefix, ++id);
224 /*************************************************************
226 * (_) | | / _| | | | |
227 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
228 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
229 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
230 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
233 *************************************************************/
235 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
236 // be_emit_env_t* so we cheat a bit...
237 #define be_emit_char(env,c) be_emit_char(env->emit,c)
238 #define be_emit_string(env,s) be_emit_string(env->emit,s)
239 #undef be_emit_cstring
240 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
241 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
242 #define be_emit_tarval(env,tv) be_emit_tarval(env->emit,tv)
243 #define be_emit_write_line(env) be_emit_write_line(env->emit)
244 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
245 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
247 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
249 const arch_register_t *reg = get_in_reg(env, node, pos);
250 const char *reg_name = arch_register_get_name(reg);
252 assert(pos < get_irn_arity(node));
254 be_emit_char(env, '%');
255 be_emit_string(env, reg_name);
258 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
259 const arch_register_t *reg = get_out_reg(env, node, pos);
260 const char *reg_name = arch_register_get_name(reg);
262 be_emit_char(env, '%');
263 be_emit_string(env, reg_name);
266 static void ia32_emit_register(ia32_emit_env_t *env, const arch_register_t *reg)
268 const char *reg_name = arch_register_get_name(reg);
270 be_emit_char(env, '%');
271 be_emit_string(env, reg_name);
274 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
276 const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
279 be_emit_char(env, '%');
280 be_emit_string(env, attr->x87[pos]->name);
284 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
286 be_emit_char(env, get_mode_suffix(mode));
289 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
291 ir_mode *mode = get_ia32_ls_mode(node);
295 ia32_emit_mode_suffix_mode(env, mode);
298 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
300 ir_mode *mode = get_ia32_ls_mode(node);
302 ia32_emit_mode_suffix_mode(env, mode);
306 char get_xmm_mode_suffix(ir_mode *mode)
308 assert(mode_is_float(mode));
309 switch(get_mode_size_bits(mode)) {
320 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
322 ir_mode *mode = get_ia32_ls_mode(node);
323 assert(mode != NULL);
324 be_emit_char(env, 's');
325 be_emit_char(env, get_xmm_mode_suffix(mode));
328 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
330 ir_mode *mode = get_ia32_ls_mode(node);
331 assert(mode != NULL);
332 be_emit_char(env, get_xmm_mode_suffix(mode));
335 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
337 if(get_mode_size_bits(mode) == 32)
339 if(mode_is_signed(mode)) {
340 be_emit_char(env, 's');
342 be_emit_char(env, 'z');
347 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
349 switch (be_gas_flavour) {
350 case GAS_FLAVOUR_NORMAL:
351 be_emit_cstring(env, "\t.type\t");
352 be_emit_string(env, name);
353 be_emit_cstring(env, ", @function\n");
354 be_emit_write_line(env);
356 case GAS_FLAVOUR_MINGW:
357 be_emit_cstring(env, "\t.def\t");
358 be_emit_string(env, name);
359 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
360 be_emit_write_line(env);
368 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
370 switch (be_gas_flavour) {
371 case GAS_FLAVOUR_NORMAL:
372 be_emit_cstring(env, "\t.size\t");
373 be_emit_string(env, name);
374 be_emit_cstring(env, ", .-");
375 be_emit_string(env, name);
376 be_emit_char(env, '\n');
377 be_emit_write_line(env);
386 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node);
388 void ia32_emit_8bit_source_register(ia32_emit_env_t *env, const ir_node *node,
391 const arch_register_t *reg;
392 const char *reg_name;
395 in = get_irn_n(node, pos);
396 if(is_ia32_Immediate(in)) {
397 emit_ia32_Immediate(env, in);
401 reg = get_in_reg(env, node, pos);
402 reg_name = arch_register_get_name(reg);
404 be_emit_char(env, '%');
405 be_emit_char(env, reg_name[1]);
406 be_emit_char(env, 'l');
409 void ia32_emit_16bit_source_register(ia32_emit_env_t *env, const ir_node *node,
412 const arch_register_t *reg;
413 const char *reg_name;
416 in = get_irn_n(node, pos);
417 if(is_ia32_Immediate(in)) {
418 emit_ia32_Immediate(env, in);
422 reg = get_in_reg(env, node, pos);
423 reg_name = arch_register_get_name(reg);
425 be_emit_char(env, '%');
426 be_emit_string(env, ®_name[1]);
427 be_emit_char(env, 'x');
430 void ia32_emit_source_register_or_immediate(ia32_emit_env_t *env,
431 const ir_node *node, int pos)
433 ir_node *in = get_irn_n(node, pos);
434 if(is_ia32_Immediate(in)) {
435 emit_ia32_Immediate(env, in);
437 ia32_emit_source_register(env, node, pos);
442 * Emits registers and/or address mode of a binary operation.
444 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
445 const ir_node *right_op = get_irn_n(node, 3);
447 switch(get_ia32_op_type(node)) {
449 if(is_ia32_Immediate(right_op)) {
450 emit_ia32_Immediate(env, right_op);
451 be_emit_cstring(env, ", ");
452 ia32_emit_source_register(env, node, 2);
455 const arch_register_t *in1 = get_in_reg(env, node, 2);
456 const arch_register_t *in2 = get_in_reg(env, node, 3);
457 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
458 const arch_register_t *in;
461 in = out ? ((out == in2) ? in1 : in2) : in2;
462 out = out ? out : in1;
463 in_name = arch_register_get_name(in);
465 be_emit_char(env, '%');
466 be_emit_string(env, in_name);
467 be_emit_cstring(env, ", %");
468 be_emit_string(env, arch_register_get_name(out));
472 if(is_ia32_Immediate(right_op)) {
473 assert(!produces_result(node) &&
474 "Source AM with Const must not produce result");
476 emit_ia32_Immediate(env, right_op);
477 be_emit_cstring(env, ", ");
478 ia32_emit_am(env, node);
479 } else if (produces_result(node)) {
480 ia32_emit_am(env, node);
481 be_emit_cstring(env, ", ");
482 ia32_emit_dest_register(env, node, 0);
484 ia32_emit_am(env, node);
485 be_emit_cstring(env, ", ");
486 ia32_emit_source_register(env, node, 2);
490 panic("DestMode can't be output by %%binop anymore");
493 assert(0 && "unsupported op type");
498 * Emits registers and/or address mode of a binary operation.
500 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
501 switch(get_ia32_op_type(node)) {
504 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
505 const arch_register_t *in1 = x87_attr->x87[0];
506 const arch_register_t *in2 = x87_attr->x87[1];
507 const arch_register_t *out = x87_attr->x87[2];
508 const arch_register_t *in;
510 in = out ? ((out == in2) ? in1 : in2) : in2;
511 out = out ? out : in1;
513 be_emit_char(env, '%');
514 be_emit_string(env, arch_register_get_name(in));
515 be_emit_cstring(env, ", %");
516 be_emit_string(env, arch_register_get_name(out));
521 ia32_emit_am(env, node);
524 assert(0 && "unsupported op type");
528 void ia32_emit_am_or_dest_register(ia32_emit_env_t *env, const ir_node *node,
530 if(get_ia32_op_type(node) == ia32_Normal) {
531 ia32_emit_dest_register(env, node, pos);
533 assert(get_ia32_op_type(node) == ia32_AddrModeD);
534 ia32_emit_am(env, node);
539 * Emits registers and/or address mode of a unary operation.
541 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node, int pos) {
544 switch(get_ia32_op_type(node)) {
546 op = get_irn_n(node, pos);
547 if (is_ia32_Immediate(op)) {
548 emit_ia32_Immediate(env, op);
550 ia32_emit_source_register(env, node, pos);
555 ia32_emit_am(env, node);
558 assert(0 && "unsupported op type");
563 * Emits address mode.
565 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
566 ir_entity *ent = get_ia32_am_sc(node);
567 int offs = get_ia32_am_offs_int(node);
568 ir_node *base = get_irn_n(node, 0);
569 int has_base = !is_ia32_NoReg_GP(base);
570 ir_node *index = get_irn_n(node, 1);
571 int has_index = !is_ia32_NoReg_GP(index);
573 /* just to be sure... */
574 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
580 set_entity_backend_marked(ent, 1);
581 id = get_entity_ld_ident(ent);
582 if (is_ia32_am_sc_sign(node))
583 be_emit_char(env, '-');
584 be_emit_ident(env, id);
586 if(get_entity_owner(ent) == get_tls_type()) {
587 if (get_entity_visibility(ent) == visibility_external_allocated) {
588 be_emit_cstring(env, "@INDNTPOFF");
590 be_emit_cstring(env, "@NTPOFF");
597 be_emit_irprintf(env->emit, "%+d", offs);
599 be_emit_irprintf(env->emit, "%d", offs);
603 if (has_base || has_index) {
604 be_emit_char(env, '(');
608 ia32_emit_source_register(env, node, 0);
611 /* emit index + scale */
614 be_emit_char(env, ',');
615 ia32_emit_source_register(env, node, 1);
617 scale = get_ia32_am_scale(node);
619 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
622 be_emit_char(env, ')');
625 /* special case if nothing is set */
626 if(ent == NULL && offs == 0 && !has_base && !has_index) {
627 be_emit_char(env, '0');
631 /*************************************************
634 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
635 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
636 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
637 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
639 *************************************************/
642 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
645 * coding of conditions
647 struct cmp2conditon_t {
653 * positive conditions for signed compares
656 const struct cmp2conditon_t cmp2condition_s[] = {
657 { NULL, pn_Cmp_False }, /* always false */
658 { "e", pn_Cmp_Eq }, /* == */
659 { "l", pn_Cmp_Lt }, /* < */
660 { "le", pn_Cmp_Le }, /* <= */
661 { "g", pn_Cmp_Gt }, /* > */
662 { "ge", pn_Cmp_Ge }, /* >= */
663 { "ne", pn_Cmp_Lg }, /* != */
664 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
668 * positive conditions for unsigned compares
671 const struct cmp2conditon_t cmp2condition_u[] = {
672 { NULL, pn_Cmp_False }, /* always false */
673 { "e", pn_Cmp_Eq }, /* == */
674 { "b", pn_Cmp_Lt }, /* < */
675 { "be", pn_Cmp_Le }, /* <= */
676 { "a", pn_Cmp_Gt }, /* > */
677 { "ae", pn_Cmp_Ge }, /* >= */
678 { "ne", pn_Cmp_Lg }, /* != */
679 { NULL, pn_Cmp_True }, /* always true */
683 * returns the condition code
686 const char *get_cmp_suffix(pn_Cmp cmp_code)
688 assert( (cmp2condition_s[cmp_code & 7].num) == (cmp_code & 7));
689 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
691 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
692 return cmp2condition_u[cmp_code & 7].name;
694 return cmp2condition_s[cmp_code & 7].name;
698 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
700 be_emit_string(env, get_cmp_suffix(pnc));
705 * Returns the target block for a control flow node.
708 ir_node *get_cfop_target_block(const ir_node *irn) {
709 return get_irn_link(irn);
713 * Emits a block label for the given block.
716 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
718 if (has_Block_label(block)) {
719 be_emit_string(env, be_gas_label_prefix());
720 be_emit_irprintf(env->emit, "%u", (unsigned)get_Block_label(block));
722 be_emit_cstring(env, BLOCK_PREFIX);
723 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
728 * Emits the target label for a control flow node.
731 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
732 ir_node *block = get_cfop_target_block(node);
734 ia32_emit_block_name(env, block);
737 /** Return the next block in Block schedule */
738 static ir_node *next_blk_sched(const ir_node *block) {
739 return get_irn_link(block);
743 * Returns the Proj with projection number proj and NOT mode_M
746 ir_node *get_proj(const ir_node *node, long proj) {
747 const ir_edge_t *edge;
750 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
752 foreach_out_edge(node, edge) {
753 src = get_edge_src_irn(edge);
755 assert(is_Proj(src) && "Proj expected");
756 if (get_irn_mode(src) == mode_M)
759 if (get_Proj_proj(src) == proj)
766 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
769 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
771 const ir_node *proj_true;
772 const ir_node *proj_false;
773 const ir_node *block;
774 const ir_node *next_block;
777 /* get both Proj's */
778 proj_true = get_proj(node, pn_Cond_true);
779 assert(proj_true && "CondJmp without true Proj");
781 proj_false = get_proj(node, pn_Cond_false);
782 assert(proj_false && "CondJmp without false Proj");
784 /* for now, the code works for scheduled and non-schedules blocks */
785 block = get_nodes_block(node);
787 /* we have a block schedule */
788 next_block = next_blk_sched(block);
790 if (get_cfop_target_block(proj_true) == next_block) {
791 /* exchange both proj's so the second one can be omitted */
792 const ir_node *t = proj_true;
794 proj_true = proj_false;
797 pnc = get_negated_pnc(pnc, mode);
800 if (mode_is_float(mode)) {
801 /* Some floating point comparisons require a test of the parity flag, which
802 * indicates that the result is unordered */
803 switch (pnc & ~ia32_pn_Cmp_Unsigned) {
805 be_emit_cstring(env, "\tjp ");
806 ia32_emit_cfop_target(env, proj_true);
807 be_emit_finish_line_gas(env, proj_true);
811 be_emit_cstring(env, "\tjnp ");
812 ia32_emit_cfop_target(env, proj_true);
813 be_emit_finish_line_gas(env, proj_true);
819 be_emit_cstring(env, "\tjp ");
820 ia32_emit_cfop_target(env, proj_false);
821 be_emit_finish_line_gas(env, proj_false);
827 be_emit_cstring(env, "\tjp ");
828 ia32_emit_cfop_target(env, proj_true);
829 be_emit_finish_line_gas(env, proj_true);
834 /* The bits set by floating point compares correspond to unsigned
836 pnc |= ia32_pn_Cmp_Unsigned;
841 be_emit_cstring(env, "\tj");
842 ia32_emit_cmp_suffix(env, pnc);
843 be_emit_char(env, ' ');
844 ia32_emit_cfop_target(env, proj_true);
845 be_emit_finish_line_gas(env, proj_true);
848 /* the second Proj might be a fallthrough */
849 if (get_cfop_target_block(proj_false) != next_block) {
850 be_emit_cstring(env, "\tjmp ");
851 ia32_emit_cfop_target(env, proj_false);
852 be_emit_finish_line_gas(env, proj_false);
854 be_emit_cstring(env, "\t/* fallthrough to ");
855 ia32_emit_cfop_target(env, proj_false);
856 be_emit_cstring(env, " */");
857 be_emit_finish_line_gas(env, proj_false);
862 * Emits code for conditional jump.
865 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
866 be_emit_cstring(env, "\tcmp");
867 ia32_emit_mode_suffix(env, node);
868 be_emit_char(env, ' ');
869 ia32_emit_binop(env, node);
870 be_emit_finish_line_gas(env, node);
872 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
876 * Emits code for conditional jump with two variables.
879 void emit_ia32_CmpJmp(ia32_emit_env_t *env, const ir_node *node) {
880 CondJmp_emitter(env, node);
884 * Emits code for conditional test and jump.
887 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
888 be_emit_cstring(env, "\ttest");
889 ia32_emit_mode_suffix(env, node);
890 be_emit_char(env, ' ');
892 ia32_emit_binop(env, node);
893 be_emit_finish_line_gas(env, node);
895 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
899 * Emits code for conditional test and jump with two variables.
902 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
903 TestJmp_emitter(env, node);
907 * Emits code for conditional SSE floating point jump with two variables.
910 void emit_ia32_xCmpJmp(ia32_emit_env_t *env, const ir_node *node) {
911 be_emit_cstring(env, "\tucomi");
912 ia32_emit_xmm_mode_suffix(env, node);
913 be_emit_char(env, ' ');
914 ia32_emit_binop(env, node);
915 be_emit_finish_line_gas(env, node);
917 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
921 * Emits code for conditional x87 floating point jump with two variables.
924 void emit_ia32_x87CmpJmp(ia32_emit_env_t *env, const ir_node *node) {
925 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
926 const char *reg = x87_attr->x87[1]->name;
927 long pnc = get_ia32_pncode(node);
929 switch (get_ia32_irn_opcode(node)) {
930 case iro_ia32_fcomrJmp:
931 pnc = get_inversed_pnc(pnc);
932 reg = x87_attr->x87[0]->name;
933 case iro_ia32_fcomJmp:
935 be_emit_cstring(env, "\tfucom ");
937 case iro_ia32_fcomrpJmp:
938 pnc = get_inversed_pnc(pnc);
939 reg = x87_attr->x87[0]->name;
940 case iro_ia32_fcompJmp:
941 be_emit_cstring(env, "\tfucomp ");
943 case iro_ia32_fcomrppJmp:
944 pnc = get_inversed_pnc(pnc);
945 case iro_ia32_fcomppJmp:
946 be_emit_cstring(env, "\tfucompp ");
952 be_emit_char(env, '%');
953 be_emit_string(env, reg);
955 be_emit_finish_line_gas(env, node);
957 be_emit_cstring(env, "\tfnstsw %ax");
958 be_emit_finish_line_gas(env, node);
959 be_emit_cstring(env, "\tsahf");
960 be_emit_finish_line_gas(env, node);
962 finish_CondJmp(env, node, mode_E, pnc);
966 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node)
968 const arch_register_t *in1, *in2, *out;
969 long pnc = get_ia32_pncode(node);
971 out = arch_get_irn_register(env->arch_env, node);
973 /* we have to emit the cmp first, because the destination register */
974 /* could be one of the compare registers */
975 if (is_ia32_xCmpCMov(node)) {
976 be_emit_cstring(env, "\tucomis");
977 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
978 be_emit_char(env, ' ');
979 ia32_emit_source_register(env, node, 1);
980 be_emit_cstring(env, ", ");
981 ia32_emit_source_register(env, node, 0);
983 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 2));
984 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 3));
986 if (is_ia32_CmpCMov(node) || is_ia32_CmpCMov8Bit(node)) {
987 be_emit_cstring(env, "\tcmp ");
989 assert(is_ia32_TestCMov(node) || is_ia32_TestCMov8Bit(node));
990 be_emit_cstring(env, "\ttest ");
992 ia32_emit_binop(env, node);
994 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 5));
995 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 6));
997 be_emit_finish_line_gas(env, node);
1000 /* best case: default in == out -> do nothing */
1001 } else if(in2 == &ia32_gp_regs[REG_GP_UKNWN]) {
1002 /* also nothign to do for unknown regs */
1003 } else if (out == in1) {
1004 const arch_register_t *t;
1005 /* true in == out -> need complement compare and exchange true and
1010 pnc = get_negated_pnc(pnc, get_irn_mode(node));
1012 /* out is different from both ins: need copy default -> out */
1013 be_emit_cstring(env, "\tmovl ");
1014 ia32_emit_register(env, in2);
1015 be_emit_cstring(env, ", ");
1016 ia32_emit_register(env, out);
1017 be_emit_finish_line_gas(env, node);
1020 be_emit_cstring(env, "\tcmov");
1021 ia32_emit_cmp_suffix(env, pnc );
1022 be_emit_cstring(env, "l ");
1023 ia32_emit_register(env, in1);
1024 be_emit_cstring(env, ", ");
1025 ia32_emit_register(env, out);
1027 be_emit_finish_line_gas(env, node);
1031 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node)
1033 CMov_emitter(env, node);
1037 void emit_ia32_TestCMov(ia32_emit_env_t *env, const ir_node *node)
1039 CMov_emitter(env, node);
1043 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node)
1045 CMov_emitter(env, node);
1049 void Set_emitter(ia32_emit_env_t *env, const ir_node *node)
1051 long pnc = get_ia32_pncode(node);
1052 const char *reg8bit;
1053 const arch_register_t *out;
1055 out = arch_get_irn_register(env->arch_env, node);
1056 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1058 if(is_ia32_xCmpSet(node)) {
1059 be_emit_cstring(env, "\tucomis");
1060 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1061 be_emit_char(env, ' ');
1062 ia32_emit_binop(env, node);
1064 if (is_ia32_CmpSet(node) || is_ia32_CmpSet8Bit(node)) {
1065 be_emit_cstring(env, "\tcmp");
1067 assert(is_ia32_TestSet(node) || is_ia32_TestSet8Bit(node));
1068 be_emit_cstring(env, "\ttest");
1070 ia32_emit_mode_suffix(env, node);
1071 be_emit_char(env, ' ');
1072 ia32_emit_binop(env, node);
1074 be_emit_finish_line_gas(env, node);
1076 be_emit_cstring(env, "\tset");
1077 ia32_emit_cmp_suffix(env, pnc);
1078 be_emit_cstring(env, " %");
1079 be_emit_string(env, reg8bit);
1080 be_emit_finish_line_gas(env, node);
1084 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1085 Set_emitter(env, node);
1089 void emit_ia32_TestSet(ia32_emit_env_t *env, const ir_node *node) {
1090 Set_emitter(env, node);
1094 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1095 Set_emitter(env, node);
1099 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1101 long pnc = get_ia32_pncode(node);
1102 long unord = pnc & pn_Cmp_Uo;
1104 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1107 case pn_Cmp_Leg: /* odered */
1110 case pn_Cmp_Uo: /* unordered */
1114 case pn_Cmp_Eq: /* == */
1118 case pn_Cmp_Lt: /* < */
1122 case pn_Cmp_Le: /* <= */
1126 case pn_Cmp_Gt: /* > */
1130 case pn_Cmp_Ge: /* >= */
1134 case pn_Cmp_Lg: /* != */
1139 assert(sse_pnc >= 0 && "unsupported compare");
1141 if (unord && sse_pnc != 3) {
1143 We need a separate compare against unordered.
1144 Quick and Dirty solution:
1145 - get some memory on stack
1149 - and result and stored result
1152 be_emit_cstring(env, "\tsubl $8, %esp");
1153 be_emit_finish_line_gas(env, node);
1155 be_emit_cstring(env, "\tcmpsd $3, ");
1156 ia32_emit_binop(env, node);
1157 be_emit_finish_line_gas(env, node);
1159 be_emit_cstring(env, "\tmovsd ");
1160 ia32_emit_dest_register(env, node, 0);
1161 be_emit_cstring(env, ", (%esp)");
1162 be_emit_finish_line_gas(env, node);
1165 be_emit_cstring(env, "\tcmpsd ");
1166 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1167 ia32_emit_binop(env, node);
1168 be_emit_finish_line_gas(env, node);
1170 if (unord && sse_pnc != 3) {
1171 be_emit_cstring(env, "\tandpd (%esp), ");
1172 ia32_emit_dest_register(env, node, 0);
1173 be_emit_finish_line_gas(env, node);
1175 be_emit_cstring(env, "\taddl $8, %esp");
1176 be_emit_finish_line_gas(env, node);
1180 /*********************************************************
1183 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1184 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1185 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1186 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1189 *********************************************************/
1191 /* jump table entry (target and corresponding number) */
1192 typedef struct _branch_t {
1197 /* jump table for switch generation */
1198 typedef struct _jmp_tbl_t {
1199 ir_node *defProj; /**< default target */
1200 long min_value; /**< smallest switch case */
1201 long max_value; /**< largest switch case */
1202 long num_branches; /**< number of jumps */
1203 char *label; /**< label of the jump table */
1204 branch_t *branches; /**< jump array */
1208 * Compare two variables of type branch_t. Used to sort all switch cases
1211 int ia32_cmp_branch_t(const void *a, const void *b) {
1212 branch_t *b1 = (branch_t *)a;
1213 branch_t *b2 = (branch_t *)b;
1215 if (b1->value <= b2->value)
1222 * Emits code for a SwitchJmp (creates a jump table if
1223 * possible otherwise a cmp-jmp cascade). Port from
1227 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1228 unsigned long interval;
1233 const ir_edge_t *edge;
1235 /* fill the table structure */
1236 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1237 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1239 tbl.num_branches = get_irn_n_edges(node);
1240 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1241 tbl.min_value = INT_MAX;
1242 tbl.max_value = INT_MIN;
1245 /* go over all proj's and collect them */
1246 foreach_out_edge(node, edge) {
1247 proj = get_edge_src_irn(edge);
1248 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1250 pnc = get_Proj_proj(proj);
1252 /* create branch entry */
1253 tbl.branches[i].target = proj;
1254 tbl.branches[i].value = pnc;
1256 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1257 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1259 /* check for default proj */
1260 if (pnc == get_ia32_pncode(node)) {
1261 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1268 /* sort the branches by their number */
1269 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1271 /* two-complement's magic make this work without overflow */
1272 interval = tbl.max_value - tbl.min_value;
1274 /* emit the table */
1275 be_emit_cstring(env, "\tcmpl $");
1276 be_emit_irprintf(env->emit, "%u, ", interval);
1277 ia32_emit_source_register(env, node, 0);
1278 be_emit_finish_line_gas(env, node);
1280 be_emit_cstring(env, "\tja ");
1281 ia32_emit_cfop_target(env, tbl.defProj);
1282 be_emit_finish_line_gas(env, node);
1284 if (tbl.num_branches > 1) {
1286 be_emit_cstring(env, "\tjmp *");
1287 be_emit_string(env, tbl.label);
1288 be_emit_cstring(env, "(,");
1289 ia32_emit_source_register(env, node, 0);
1290 be_emit_cstring(env, ",4)");
1291 be_emit_finish_line_gas(env, node);
1293 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1294 be_emit_cstring(env, "\t.align 4\n");
1295 be_emit_write_line(env);
1297 be_emit_string(env, tbl.label);
1298 be_emit_cstring(env, ":\n");
1299 be_emit_write_line(env);
1301 be_emit_cstring(env, ".long ");
1302 ia32_emit_cfop_target(env, tbl.branches[0].target);
1303 be_emit_finish_line_gas(env, NULL);
1305 last_value = tbl.branches[0].value;
1306 for (i = 1; i < tbl.num_branches; ++i) {
1307 while (++last_value < tbl.branches[i].value) {
1308 be_emit_cstring(env, ".long ");
1309 ia32_emit_cfop_target(env, tbl.defProj);
1310 be_emit_finish_line_gas(env, NULL);
1312 be_emit_cstring(env, ".long ");
1313 ia32_emit_cfop_target(env, tbl.branches[i].target);
1314 be_emit_finish_line_gas(env, NULL);
1316 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1318 /* one jump is enough */
1319 be_emit_cstring(env, "\tjmp ");
1320 ia32_emit_cfop_target(env, tbl.branches[0].target);
1321 be_emit_finish_line_gas(env, node);
1331 * Emits code for a unconditional jump.
1334 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1335 ir_node *block, *next_block;
1337 /* for now, the code works for scheduled and non-schedules blocks */
1338 block = get_nodes_block(node);
1340 /* we have a block schedule */
1341 next_block = next_blk_sched(block);
1342 if (get_cfop_target_block(node) != next_block) {
1343 be_emit_cstring(env, "\tjmp ");
1344 ia32_emit_cfop_target(env, node);
1346 be_emit_cstring(env, "\t/* fallthrough to ");
1347 ia32_emit_cfop_target(env, node);
1348 be_emit_cstring(env, " */");
1350 be_emit_finish_line_gas(env, node);
1354 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node)
1356 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
1358 be_emit_char(env, '$');
1359 if(attr->symconst != NULL) {
1360 ident *id = get_entity_ld_ident(attr->symconst);
1362 if(attr->attr.data.am_sc_sign)
1363 be_emit_char(env, '-');
1364 be_emit_ident(env, id);
1366 if(attr->symconst == NULL || attr->offset != 0) {
1367 if(attr->symconst != NULL)
1368 be_emit_char(env, '+');
1369 be_emit_irprintf(env->emit, "0x%X", attr->offset);
1374 const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
1377 const arch_register_t *reg;
1378 const char *reg_name;
1382 const ia32_attr_t *attr;
1389 /* parse modifiers */
1392 ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node);
1393 be_emit_char(env, '%');
1396 be_emit_char(env, '%');
1416 ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier "
1417 "'%c' for asm op\n", node, c);
1423 sscanf(s, "%d%n", &num, &p);
1425 ir_fprintf(stderr, "Warning: Couldn't parse assembler operand (%+F)\n",
1433 attr = get_ia32_attr_const(node);
1434 n_outs = ARR_LEN(attr->slots);
1436 reg = get_out_reg(env, node, num);
1439 int in = num - n_outs;
1440 if(in >= get_irn_arity(node)) {
1441 ir_fprintf(stderr, "Warning: Invalid input %d specified in asm "
1442 "op (%+F)\n", num, node);
1445 pred = get_irn_n(node, in);
1446 /* might be an immediate value */
1447 if(is_ia32_Immediate(pred)) {
1448 emit_ia32_Immediate(env, pred);
1451 reg = get_in_reg(env, node, in);
1454 ir_fprintf(stderr, "Warning: no register assigned for %d asm op "
1455 "(%+F)\n", num, node);
1460 be_emit_char(env, '%');
1463 reg_name = arch_register_get_name(reg);
1466 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
1469 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit_high, reg);
1472 reg_name = ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
1475 panic("Invalid asm op modifier");
1477 be_emit_string(env, reg_name);
1483 * Emits code for an ASM pseudo op.
1486 void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node)
1488 const void *gen_attr = get_irn_generic_attr_const(node);
1489 const ia32_asm_attr_t *attr
1490 = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, gen_attr);
1491 ident *asm_text = attr->asm_text;
1492 const char *s = get_id_str(asm_text);
1494 be_emit_cstring(env, "# Begin ASM \t");
1495 be_emit_finish_line_gas(env, node);
1498 be_emit_char(env, '\t');
1502 s = emit_asm_operand(env, node, s);
1505 be_emit_char(env, *s);
1510 be_emit_char(env, '\n');
1511 be_emit_write_line(env);
1513 be_emit_cstring(env, "# End ASM\n");
1514 be_emit_write_line(env);
1517 /**********************************
1520 * | | ___ _ __ _ _| |_) |
1521 * | | / _ \| '_ \| | | | _ <
1522 * | |___| (_) | |_) | |_| | |_) |
1523 * \_____\___/| .__/ \__, |____/
1526 **********************************/
1529 * Emit movsb/w instructions to make mov count divideable by 4
1532 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1533 be_emit_cstring(env, "\tcld");
1534 be_emit_finish_line_gas(env, NULL);
1538 be_emit_cstring(env, "\tmovsb");
1539 be_emit_finish_line_gas(env, NULL);
1542 be_emit_cstring(env, "\tmovsw");
1543 be_emit_finish_line_gas(env, NULL);
1546 be_emit_cstring(env, "\tmovsb");
1547 be_emit_finish_line_gas(env, NULL);
1548 be_emit_cstring(env, "\tmovsw");
1549 be_emit_finish_line_gas(env, NULL);
1555 * Emit rep movsd instruction for memcopy.
1558 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1559 int rem = get_ia32_pncode(node);
1561 emit_CopyB_prolog(env, rem);
1563 be_emit_cstring(env, "\trep movsd");
1564 be_emit_finish_line_gas(env, node);
1568 * Emits unrolled memcopy.
1571 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1572 int size = get_ia32_pncode(node);
1574 emit_CopyB_prolog(env, size & 0x3);
1578 be_emit_cstring(env, "\tmovsd");
1579 be_emit_finish_line_gas(env, NULL);
1585 /***************************
1589 * | | / _ \| '_ \ \ / /
1590 * | |___| (_) | | | \ V /
1591 * \_____\___/|_| |_|\_/
1593 ***************************/
1596 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1599 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1600 ir_mode *ls_mode = get_ia32_ls_mode(node);
1601 int ls_bits = get_mode_size_bits(ls_mode);
1603 be_emit_cstring(env, "\tcvt");
1605 if(is_ia32_Conv_I2FP(node)) {
1607 be_emit_cstring(env, "si2ss");
1609 be_emit_cstring(env, "si2sd");
1611 } else if(is_ia32_Conv_FP2I(node)) {
1613 be_emit_cstring(env, "ss2si");
1615 be_emit_cstring(env, "sd2si");
1618 assert(is_ia32_Conv_FP2FP(node));
1620 be_emit_cstring(env, "sd2ss");
1622 be_emit_cstring(env, "ss2sd");
1625 be_emit_char(env, ' ');
1627 switch(get_ia32_op_type(node)) {
1629 ia32_emit_source_register(env, node, 2);
1630 be_emit_cstring(env, ", ");
1631 ia32_emit_dest_register(env, node, 0);
1633 case ia32_AddrModeS:
1634 ia32_emit_dest_register(env, node, 0);
1635 be_emit_cstring(env, ", ");
1636 ia32_emit_am(env, node);
1639 assert(0 && "unsupported op type for Conv");
1641 be_emit_finish_line_gas(env, node);
1645 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1646 emit_ia32_Conv_with_FP(env, node);
1650 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1651 emit_ia32_Conv_with_FP(env, node);
1655 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1656 emit_ia32_Conv_with_FP(env, node);
1660 * Emits code for an Int conversion.
1663 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1664 const char *sign_suffix;
1665 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1666 int smaller_bits = get_mode_size_bits(smaller_mode);
1668 const arch_register_t *in_reg, *out_reg;
1670 assert(!mode_is_float(smaller_mode));
1671 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1673 signed_mode = mode_is_signed(smaller_mode);
1674 if(smaller_bits == 32) {
1675 // this should not happen as it's no convert
1679 sign_suffix = signed_mode ? "s" : "z";
1682 switch(get_ia32_op_type(node)) {
1684 in_reg = get_in_reg(env, node, 2);
1685 out_reg = get_out_reg(env, node, 0);
1687 if (in_reg == &ia32_gp_regs[REG_EAX] &&
1688 out_reg == &ia32_gp_regs[REG_EAX] &&
1692 /* argument and result are both in EAX and */
1693 /* signedness is ok: -> use the smaller cwtl opcode */
1694 be_emit_cstring(env, "\tcwtl");
1696 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1698 be_emit_cstring(env, "\tmov");
1699 be_emit_string(env, sign_suffix);
1700 ia32_emit_mode_suffix_mode(env, smaller_mode);
1701 be_emit_cstring(env, "l %");
1702 be_emit_string(env, sreg);
1703 be_emit_cstring(env, ", ");
1704 ia32_emit_dest_register(env, node, 0);
1707 case ia32_AddrModeS: {
1708 be_emit_cstring(env, "\tmov");
1709 be_emit_string(env, sign_suffix);
1710 ia32_emit_mode_suffix_mode(env, smaller_mode);
1711 be_emit_cstring(env, "l ");
1712 ia32_emit_am(env, node);
1713 be_emit_cstring(env, ", ");
1714 ia32_emit_dest_register(env, node, 0);
1718 assert(0 && "unsupported op type for Conv");
1720 be_emit_finish_line_gas(env, node);
1724 * Emits code for an 8Bit Int conversion.
1726 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1727 emit_ia32_Conv_I2I(env, node);
1731 /*******************************************
1734 * | |__ ___ _ __ ___ __| | ___ ___
1735 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1736 * | |_) | __/ | | | (_) | (_| | __/\__ \
1737 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1739 *******************************************/
1742 * Emits a backend call
1745 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1746 ir_entity *ent = be_Call_get_entity(node);
1748 be_emit_cstring(env, "\tcall ");
1750 set_entity_backend_marked(ent, 1);
1751 be_emit_string(env, get_entity_ld_name(ent));
1753 be_emit_char(env, '*');
1754 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1756 be_emit_finish_line_gas(env, node);
1760 * Emits code to increase stack pointer.
1763 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1764 int offs = be_get_IncSP_offset(node);
1770 be_emit_cstring(env, "\tsubl $");
1771 be_emit_irprintf(env->emit, "%u, ", offs);
1772 ia32_emit_source_register(env, node, 0);
1774 be_emit_cstring(env, "\taddl $");
1775 be_emit_irprintf(env->emit, "%u, ", -offs);
1776 ia32_emit_source_register(env, node, 0);
1778 be_emit_finish_line_gas(env, node);
1782 * Emits code to set stack pointer.
1785 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1786 be_emit_cstring(env, "\tmovl ");
1787 ia32_emit_source_register(env, node, 2);
1788 be_emit_cstring(env, ", ");
1789 ia32_emit_dest_register(env, node, 0);
1790 be_emit_finish_line_gas(env, node);
1794 * Emits code for Copy/CopyKeep.
1797 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1799 const arch_env_t *arch_env = env->arch_env;
1800 const arch_register_t *in = arch_get_irn_register(arch_env, op);
1801 const arch_register_t *out = arch_get_irn_register(arch_env, node);
1807 if(is_unknown_reg(in))
1809 /* copies of vf nodes aren't real... */
1810 if(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
1813 mode = get_irn_mode(node);
1814 if (mode == mode_E) {
1815 be_emit_cstring(env, "\tmovsd ");
1816 ia32_emit_register(env, in);
1817 be_emit_cstring(env, ", ");
1818 ia32_emit_register(env, out);
1820 be_emit_cstring(env, "\tmovl ");
1821 ia32_emit_register(env, in);
1822 be_emit_cstring(env, ", ");
1823 ia32_emit_register(env, out);
1825 be_emit_finish_line_gas(env, node);
1829 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1830 Copy_emitter(env, node, be_get_Copy_op(node));
1834 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1835 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1839 * Emits code for exchange.
1842 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1843 const arch_register_t *in1, *in2;
1844 const arch_register_class_t *cls1, *cls2;
1846 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1847 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1849 cls1 = arch_register_get_class(in1);
1850 cls2 = arch_register_get_class(in2);
1852 assert(cls1 == cls2 && "Register class mismatch at Perm");
1854 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1855 be_emit_cstring(env, "\txchg ");
1856 ia32_emit_source_register(env, node, 1);
1857 be_emit_cstring(env, ", ");
1858 ia32_emit_source_register(env, node, 0);
1859 be_emit_finish_line_gas(env, node);
1860 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1861 be_emit_cstring(env, "\txorpd ");
1862 ia32_emit_source_register(env, node, 1);
1863 be_emit_cstring(env, ", ");
1864 ia32_emit_source_register(env, node, 0);
1865 be_emit_finish_line_gas(env, NULL);
1867 be_emit_cstring(env, "\txorpd ");
1868 ia32_emit_source_register(env, node, 0);
1869 be_emit_cstring(env, ", ");
1870 ia32_emit_source_register(env, node, 1);
1871 be_emit_finish_line_gas(env, NULL);
1873 be_emit_cstring(env, "\txorpd ");
1874 ia32_emit_source_register(env, node, 1);
1875 be_emit_cstring(env, ", ");
1876 ia32_emit_source_register(env, node, 0);
1877 be_emit_finish_line_gas(env, node);
1878 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1880 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1886 * Emits code for Constant loading.
1889 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1890 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
1893 if(attr->symconst == NULL && attr->offset == 0) {
1894 if (env->isa->opt_arch == arch_pentium_4) {
1895 /* P4 prefers sub r, r, others xor r, r */
1896 be_emit_cstring(env, "\tsubl ");
1898 be_emit_cstring(env, "\txorl ");
1900 ia32_emit_dest_register(env, node, 0);
1901 be_emit_cstring(env, ", ");
1902 ia32_emit_dest_register(env, node, 0);
1904 be_emit_cstring(env, "\tmovl ");
1905 emit_ia32_Immediate(env, node);
1906 be_emit_cstring(env, ", ");
1907 ia32_emit_dest_register(env, node, 0);
1910 be_emit_finish_line_gas(env, node);
1914 * Emits code to load the TLS base
1917 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1918 be_emit_cstring(env, "\tmovl %gs:0, ");
1919 ia32_emit_dest_register(env, node, 0);
1920 be_emit_finish_line_gas(env, node);
1924 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node)
1926 be_emit_cstring(env, "\tret");
1927 be_emit_finish_line_gas(env, node);
1931 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node)
1938 /***********************************************************************************
1941 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1942 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1943 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1944 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1946 ***********************************************************************************/
1949 * Enters the emitter functions for handled nodes into the generic
1950 * pointer of an opcode.
1953 void ia32_register_emitters(void) {
1955 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1956 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1957 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1958 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1959 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1960 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1962 /* first clear the generic function pointer for all ops */
1963 clear_irp_opcodes_generic_func();
1965 /* register all emitter functions defined in spec */
1966 ia32_register_spec_emitters();
1968 /* other ia32 emitter functions */
1971 IA32_EMIT2(CmpJmp8Bit, CmpJmp);
1973 IA32_EMIT2(TestJmp8Bit, TestJmp);
1975 IA32_EMIT2(CmpCMov8Bit, CmpCMov);
1976 IA32_EMIT(TestCMov);
1977 IA32_EMIT2(TestCMov8Bit, TestCMov);
1979 IA32_EMIT2(CmpSet8Bit, CmpSet);
1981 IA32_EMIT2(TestSet8Bit, TestSet);
1982 IA32_EMIT(SwitchJmp);
1985 IA32_EMIT(Conv_I2FP);
1986 IA32_EMIT(Conv_FP2I);
1987 IA32_EMIT(Conv_FP2FP);
1988 IA32_EMIT(Conv_I2I);
1989 IA32_EMIT(Conv_I2I8Bit);
1994 IA32_EMIT(xCmpCMov);
1996 IA32_EMIT2(fcomJmp, x87CmpJmp);
1997 IA32_EMIT2(fcompJmp, x87CmpJmp);
1998 IA32_EMIT2(fcomppJmp, x87CmpJmp);
1999 IA32_EMIT2(fcomrJmp, x87CmpJmp);
2000 IA32_EMIT2(fcomrpJmp, x87CmpJmp);
2001 IA32_EMIT2(fcomrppJmp, x87CmpJmp);
2003 /* benode emitter */
2029 static const char *last_name = NULL;
2030 static unsigned last_line = -1;
2031 static unsigned num = -1;
2034 * Emit the debug support for node node.
2037 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
2038 dbg_info *db = get_irn_dbg_info(node);
2040 const char *fname = be_retrieve_dbg_info(db, &lineno);
2042 if (! env->cg->birg->main_env->options->stabs_debug_support)
2046 if (last_name != fname) {
2048 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
2051 if (last_line != lineno) {
2054 snprintf(name, sizeof(name), ".LM%u", ++num);
2056 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
2057 be_emit_string(env, name);
2058 be_emit_cstring(env, ":\n");
2059 be_emit_write_line(env);
2064 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
2067 * Emits code for a node.
2070 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
2071 ir_op *op = get_irn_op(node);
2073 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
2075 if (op->ops.generic) {
2076 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
2077 ia32_emit_dbg(env, node);
2078 (*func) (env, node);
2080 emit_Nothing(env, node);
2081 ir_fprintf(stderr, "Error: No emit handler for node %+F (%+G, graph %+F)\n", node, node, current_ir_graph);
2087 * Emits gas alignment directives
2090 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
2091 be_emit_cstring(env, "\t.p2align ");
2092 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
2093 be_emit_write_line(env);
2097 * Emits gas alignment directives for Functions depended on cpu architecture.
2100 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
2102 unsigned maximum_skip;
2117 maximum_skip = (1 << align) - 1;
2118 ia32_emit_alignment(env, align, maximum_skip);
2122 * Emits gas alignment directives for Labels depended on cpu architecture.
2125 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
2126 unsigned align; unsigned maximum_skip;
2141 maximum_skip = (1 << align) - 1;
2142 ia32_emit_alignment(env, align, maximum_skip);
2146 * Test wether a block should be aligned.
2147 * For cpus in the P4/Athlon class it is usefull to align jump labels to
2148 * 16 bytes. However we should only do that if the alignment nops before the
2149 * label aren't executed more often than we have jumps to the label.
2152 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
2153 static const double DELTA = .0001;
2154 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2156 double prev_freq = 0; /**< execfreq of the fallthrough block */
2157 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
2158 cpu_support cpu = env->isa->opt_arch;
2161 if(exec_freq == NULL)
2163 if(cpu == arch_i386 || cpu == arch_i486)
2166 block_freq = get_block_execfreq(exec_freq, block);
2167 if(block_freq < DELTA)
2170 n_cfgpreds = get_Block_n_cfgpreds(block);
2171 for(i = 0; i < n_cfgpreds; ++i) {
2172 ir_node *pred = get_Block_cfgpred_block(block, i);
2173 double pred_freq = get_block_execfreq(exec_freq, pred);
2176 prev_freq += pred_freq;
2178 jmp_freq += pred_freq;
2182 if(prev_freq < DELTA && !(jmp_freq < DELTA))
2185 jmp_freq /= prev_freq;
2189 case arch_athlon_64:
2191 return jmp_freq > 3;
2193 return jmp_freq > 2;
2198 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
2203 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2205 n_cfgpreds = get_Block_n_cfgpreds(block);
2206 need_label = (n_cfgpreds != 0);
2208 if (should_align_block(env, block, prev)) {
2210 ia32_emit_align_label(env, env->isa->opt_arch);
2214 ia32_emit_block_name(env, block);
2215 be_emit_char(env, ':');
2217 be_emit_pad_comment(env);
2218 be_emit_cstring(env, " /* preds:");
2220 /* emit list of pred blocks in comment */
2221 arity = get_irn_arity(block);
2222 for (i = 0; i < arity; ++i) {
2223 ir_node *predblock = get_Block_cfgpred_block(block, i);
2224 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2227 be_emit_cstring(env, "\t/* ");
2228 ia32_emit_block_name(env, block);
2229 be_emit_cstring(env, ": ");
2231 if (exec_freq != NULL) {
2232 be_emit_irprintf(env->emit, " freq: %f",
2233 get_block_execfreq(exec_freq, block));
2235 be_emit_cstring(env, " */\n");
2236 be_emit_write_line(env);
2240 * Walks over the nodes in a block connected by scheduling edges
2241 * and emits code for each node.
2244 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2246 const ir_node *node;
2248 ia32_emit_block_header(env, block, last_block);
2250 /* emit the contents of the block */
2251 ia32_emit_dbg(env, block);
2252 sched_foreach(block, node) {
2253 ia32_emit_node(env, node);
2258 * Emits code for function start.
2261 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2262 ir_entity *irg_ent = get_irg_entity(irg);
2263 const char *irg_name = get_entity_ld_name(irg_ent);
2264 cpu_support cpu = env->isa->opt_arch;
2265 const be_irg_t *birg = env->cg->birg;
2267 be_emit_write_line(env);
2268 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2269 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2270 ia32_emit_align_func(env, cpu);
2271 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2272 be_emit_cstring(env, ".global ");
2273 be_emit_string(env, irg_name);
2274 be_emit_char(env, '\n');
2275 be_emit_write_line(env);
2277 ia32_emit_function_object(env, irg_name);
2278 be_emit_string(env, irg_name);
2279 be_emit_cstring(env, ":\n");
2280 be_emit_write_line(env);
2284 * Emits code for function end
2287 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2288 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2289 const be_irg_t *birg = env->cg->birg;
2291 ia32_emit_function_size(env, irg_name);
2292 be_dbg_method_end(birg->main_env->db_handle);
2293 be_emit_char(env, '\n');
2294 be_emit_write_line(env);
2299 * Sets labels for control flow nodes (jump target)
2302 void ia32_gen_labels(ir_node *block, void *data)
2305 int n = get_Block_n_cfgpreds(block);
2308 for (n--; n >= 0; n--) {
2309 pred = get_Block_cfgpred(block, n);
2310 set_irn_link(pred, block);
2315 * Emit an exception label if the current instruction can fail.
2317 void ia32_emit_exc_label(ia32_emit_env_t *env, const ir_node *node) {
2318 if (get_ia32_exc_label(node)) {
2319 be_emit_irprintf(env->emit, ".EXL%u\n", 0);
2320 be_emit_write_line(env);
2325 * Main driver. Emits the code for one routine.
2327 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2328 ia32_emit_env_t env;
2330 ir_node *last_block = NULL;
2333 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2334 env.emit = &env.isa->emit;
2335 env.arch_env = cg->arch_env;
2338 ia32_register_emitters();
2340 ia32_emit_func_prolog(&env, irg);
2341 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2343 n = ARR_LEN(cg->blk_sched);
2344 for (i = 0; i < n;) {
2347 block = cg->blk_sched[i];
2349 next_bl = i < n ? cg->blk_sched[i] : NULL;
2351 /* set here the link. the emitter expects to find the next block here */
2352 set_irn_link(block, next_bl);
2353 ia32_gen_block(&env, block, last_block);
2357 ia32_emit_func_epilog(&env, irg);
2360 void ia32_init_emitter(void)
2362 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");