2 * This file implements the node emitter.
3 * @author Christian Wuerdig, Matthias Braun
21 #include "iredges_t.h"
24 #include "raw_bitset.h"
26 #include "../besched_t.h"
27 #include "../benode_t.h"
29 #include "../be_dbgout.h"
30 #include "../beemitter.h"
31 #include "../begnuas.h"
33 #include "ia32_emitter.h"
34 #include "gen_ia32_emitter.h"
35 #include "gen_ia32_regalloc_if.h"
36 #include "ia32_nodes_attr.h"
37 #include "ia32_new_nodes.h"
38 #include "ia32_map_regs.h"
39 #include "bearch_ia32_t.h"
41 #define BLOCK_PREFIX ".L"
43 #define SNPRINTF_BUF_LEN 128
45 /* global arch_env for lc_printf functions */
46 static const arch_env_t *arch_env = NULL;
49 * Returns the register at in position pos.
51 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
53 const arch_register_t *reg = NULL;
55 assert(get_irn_arity(irn) > pos && "Invalid IN position");
57 /* The out register of the operator at position pos is the
58 in register we need. */
59 op = get_irn_n(irn, pos);
61 reg = arch_get_irn_register(arch_env, op);
63 assert(reg && "no in register found");
65 /* in case of a joker register: just return a valid register */
66 if (arch_register_type_is(reg, joker)) {
67 const arch_register_req_t *req;
69 /* ask for the requirements */
70 req = arch_get_register_req(arch_env, irn, pos);
72 if (arch_register_req_is(req, limited)) {
73 /* in case of limited requirements: get the first allowed register */
74 unsigned idx = rbitset_next(req->limited, 0, 1);
75 reg = arch_register_for_index(req->cls, idx);
77 /* otherwise get first register in class */
78 reg = arch_register_for_index(req->cls, 0);
86 * Returns the register at out position pos.
88 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
90 const arch_register_t *reg = NULL;
92 /* 1st case: irn is not of mode_T, so it has only */
93 /* one OUT register -> good */
94 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
95 /* Proj with the corresponding projnum for the register */
97 if (get_irn_mode(irn) != mode_T) {
98 reg = arch_get_irn_register(arch_env, irn);
99 } else if (is_ia32_irn(irn)) {
100 reg = get_ia32_out_reg(irn, pos);
102 const ir_edge_t *edge;
104 foreach_out_edge(irn, edge) {
105 proj = get_edge_src_irn(edge);
106 assert(is_Proj(proj) && "non-Proj from mode_T node");
107 if (get_Proj_proj(proj) == pos) {
108 reg = arch_get_irn_register(arch_env, proj);
114 assert(reg && "no out register found");
119 * Returns an ident for the given tarval tv.
121 static ident *get_ident_for_tv(tarval *tv) {
123 int len = tarval_snprintf(buf, sizeof(buf), tv);
125 return new_id_from_str(buf);
129 * Determine the gnu assembler suffix that indicates a mode
131 static char get_mode_suffix(const ir_mode *mode) {
132 if(mode_is_float(mode)) {
133 switch(get_mode_size_bits(mode)) {
142 assert(mode_is_int(mode) || mode_is_reference(mode));
143 switch(get_mode_size_bits(mode)) {
154 panic("Can't output mode_suffix for %+F\n", mode);
157 static int produces_result(const ir_node *node) {
158 return !(is_ia32_St(node) ||
159 is_ia32_Store8Bit(node) ||
160 is_ia32_CondJmp(node) ||
161 is_ia32_xCondJmp(node) ||
162 is_ia32_CmpSet(node) ||
163 is_ia32_xCmpSet(node) ||
164 is_ia32_SwitchJmp(node));
167 static const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
168 switch(get_mode_size_bits(mode)) {
170 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
172 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
174 return (char *)arch_register_get_name(reg);
179 * Add a number to a prefix. This number will not be used a second time.
181 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
182 static unsigned long id = 0;
183 snprintf(buf, buflen, "%s%lu", prefix, ++id);
187 /*************************************************************
189 * (_) | | / _| | | | |
190 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
191 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
192 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
193 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
196 *************************************************************/
198 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
199 // be_emit_env_t* so we cheat a bit...
200 #define be_emit_char(env,c) be_emit_char(env->emit,c)
201 #define be_emit_string(env,s) be_emit_string(env->emit,s)
202 #undef be_emit_cstring
203 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
204 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
205 #define be_emit_write_line(env) be_emit_write_line(env->emit)
206 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
207 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
209 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
211 const arch_register_t *reg = get_in_reg(node, pos);
212 const char *reg_name = arch_register_get_name(reg);
214 assert(pos < get_irn_arity(node));
216 be_emit_char(env, '%');
217 be_emit_string(env, reg_name);
220 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
221 const arch_register_t *reg = get_out_reg(node, pos);
222 const char *reg_name = arch_register_get_name(reg);
224 be_emit_char(env, '%');
225 be_emit_string(env, reg_name);
228 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
230 ia32_attr_t *attr = get_ia32_attr(node);
233 be_emit_char(env, '%');
234 be_emit_string(env, attr->x87[pos]->name);
237 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
242 switch(get_ia32_immop_type(node)) {
244 tv = get_ia32_Immop_tarval(node);
245 id = get_ident_for_tv(tv);
247 case ia32_ImmSymConst:
248 id = get_ia32_Immop_symconst(node);
252 be_emit_string(env, "BAD");
256 be_emit_ident(env, id);
259 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode)
261 be_emit_char(env, get_mode_suffix(mode));
264 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
266 ir_mode *mode = get_ia32_ls_mode(node);
268 ia32_emit_mode_suffix(env, mode);
271 static char get_xmm_mode_suffix(ir_mode *mode)
273 assert(mode_is_float(mode));
274 switch(get_mode_size_bits(mode)) {
285 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
287 ir_mode *mode = get_ia32_ls_mode(node);
288 assert(mode != NULL);
289 be_emit_char(env, 's');
290 be_emit_char(env, get_xmm_mode_suffix(mode));
293 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
295 ir_mode *mode = get_ia32_ls_mode(node);
296 assert(mode != NULL);
297 be_emit_char(env, get_xmm_mode_suffix(mode));
300 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
302 if(get_mode_size_bits(mode) == 32)
304 if(mode_is_signed(mode)) {
305 be_emit_char(env, 's');
307 be_emit_char(env, 'z');
311 static void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
313 switch (be_gas_flavour) {
314 case GAS_FLAVOUR_NORMAL:
315 be_emit_cstring(env, "\t.type\t");
316 be_emit_string(env, name);
317 be_emit_cstring(env, ", @function\n");
318 be_emit_write_line(env);
320 case GAS_FLAVOUR_MINGW:
321 be_emit_cstring(env, "\t.def\t");
322 be_emit_string(env, name);
323 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
324 be_emit_write_line(env);
331 static void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
333 switch (be_gas_flavour) {
334 case GAS_FLAVOUR_NORMAL:
335 be_emit_cstring(env, "\t.size\t");
336 be_emit_string(env, name);
337 be_emit_cstring(env, ", .-");
338 be_emit_string(env, name);
339 be_emit_char(env, '\n');
340 be_emit_write_line(env);
350 * Emits registers and/or address mode of a binary operation.
352 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
353 switch(get_ia32_op_type(node)) {
355 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
356 be_emit_char(env, '$');
357 ia32_emit_immediate(env, node);
358 be_emit_cstring(env, ", ");
359 ia32_emit_source_register(env, node, 2);
361 const arch_register_t *in1 = get_in_reg(node, 2);
362 const arch_register_t *in2 = get_in_reg(node, 3);
363 const arch_register_t *out = produces_result(node) ? get_out_reg(node, 0) : NULL;
364 const arch_register_t *in;
367 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
368 out = out ? out : in1;
369 in_name = arch_register_get_name(in);
371 if (is_ia32_emit_cl(node)) {
372 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
376 be_emit_char(env, '%');
377 be_emit_string(env, in_name);
378 be_emit_cstring(env, ", %");
379 be_emit_string(env, arch_register_get_name(out));
383 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
384 assert(!produces_result(node) && "Source AM with Const must not produce result");
385 ia32_emit_am(env, node);
386 be_emit_cstring(env, ", $");
387 ia32_emit_immediate(env, node);
388 } else if (produces_result(node)) {
389 ia32_emit_am(env, node);
390 be_emit_cstring(env, ", ");
391 ia32_emit_dest_register(env, node, 0);
393 ia32_emit_am(env, node);
394 be_emit_cstring(env, ", ");
395 ia32_emit_source_register(env, node, 2);
399 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
400 be_emit_char(env, '$');
401 ia32_emit_immediate(env, node);
402 be_emit_cstring(env, ", ");
403 ia32_emit_am(env, node);
405 const arch_register_t *in1 = get_in_reg(node, get_irn_arity(node) == 5 ? 3 : 2);
406 ir_mode *mode = get_ia32_ls_mode(node);
409 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
411 if (is_ia32_emit_cl(node)) {
412 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
416 be_emit_char(env, '%');
417 be_emit_string(env, in_name);
418 be_emit_cstring(env, ", ");
419 ia32_emit_am(env, node);
423 assert(0 && "unsupported op type");
428 * Emits registers and/or address mode of a binary operation.
430 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
431 switch(get_ia32_op_type(node)) {
433 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
434 // should not happen...
437 ia32_attr_t *attr = get_ia32_attr(node);
438 const arch_register_t *in1 = attr->x87[0];
439 const arch_register_t *in2 = attr->x87[1];
440 const arch_register_t *out = attr->x87[2];
441 const arch_register_t *in;
443 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
444 out = out ? out : in1;
446 be_emit_char(env, '%');
447 be_emit_string(env, arch_register_get_name(in));
448 be_emit_cstring(env, ", %");
449 be_emit_string(env, arch_register_get_name(out));
454 ia32_emit_am(env, node);
457 assert(0 && "unsupported op type");
462 * Emits registers and/or address mode of a unary operation.
464 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
465 switch(get_ia32_op_type(node)) {
467 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
468 be_emit_char(env, '$');
469 ia32_emit_immediate(env, node);
471 if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
472 ia32_emit_source_register(env, node, 3);
473 } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
474 ia32_emit_source_register(env, node, 4);
475 } else if(is_ia32_Push(node)) {
476 ia32_emit_source_register(env, node, 2);
477 } else if(is_ia32_Pop(node)) {
478 ia32_emit_dest_register(env, node, 1);
480 ia32_emit_dest_register(env, node, 0);
486 ia32_emit_am(env, node);
489 assert(0 && "unsupported op type");
494 * Emits address mode.
496 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
497 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
498 ident *id = get_ia32_am_sc(node);
499 int offs = get_ia32_am_offs_int(node);
501 /* just to be sure... */
502 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
506 if (is_ia32_am_sc_sign(node))
507 be_emit_char(env, '-');
508 be_emit_ident(env, id);
513 be_emit_irprintf(env->emit, "%+d", offs);
515 be_emit_irprintf(env->emit, "%d", offs);
519 if (am_flav & (ia32_B | ia32_I)) {
520 be_emit_char(env, '(');
523 if (am_flav & ia32_B) {
524 ia32_emit_source_register(env, node, 0);
527 /* emit index + scale */
528 if (am_flav & ia32_I) {
529 be_emit_char(env, ',');
530 ia32_emit_source_register(env, node, 1);
532 if (am_flav & ia32_S) {
533 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
536 be_emit_char(env, ')');
540 /*************************************************
543 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
544 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
545 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
546 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
548 *************************************************/
551 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
554 * coding of conditions
556 struct cmp2conditon_t {
562 * positive conditions for signed compares
564 static const struct cmp2conditon_t cmp2condition_s[] = {
565 { NULL, pn_Cmp_False }, /* always false */
566 { "e", pn_Cmp_Eq }, /* == */
567 { "l", pn_Cmp_Lt }, /* < */
568 { "le", pn_Cmp_Le }, /* <= */
569 { "g", pn_Cmp_Gt }, /* > */
570 { "ge", pn_Cmp_Ge }, /* >= */
571 { "ne", pn_Cmp_Lg }, /* != */
572 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
573 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
574 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
575 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
576 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
577 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
578 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
579 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
580 { NULL, pn_Cmp_True }, /* always true */
584 * positive conditions for unsigned compares
586 static const struct cmp2conditon_t cmp2condition_u[] = {
587 { NULL, pn_Cmp_False }, /* always false */
588 { "e", pn_Cmp_Eq }, /* == */
589 { "b", pn_Cmp_Lt }, /* < */
590 { "be", pn_Cmp_Le }, /* <= */
591 { "a", pn_Cmp_Gt }, /* > */
592 { "ae", pn_Cmp_Ge }, /* >= */
593 { "ne", pn_Cmp_Lg }, /* != */
594 { NULL, pn_Cmp_True }, /* always true */
598 * returns the condition code
600 static const char *get_cmp_suffix(int cmp_code)
602 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
603 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
605 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
606 return cmp2condition_u[cmp_code & 7].name;
608 return cmp2condition_s[cmp_code & 15].name;
612 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
614 be_emit_string(env, get_cmp_suffix(pnc));
619 * Returns the target block for a control flow node.
621 static ir_node *get_cfop_target_block(const ir_node *irn) {
622 return get_irn_link(irn);
626 * Returns the target label for a control flow node.
628 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
629 ir_node *block = get_cfop_target_block(node);
631 be_emit_cstring(env, BLOCK_PREFIX);
632 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
635 /** Return the next block in Block schedule */
636 static ir_node *next_blk_sched(const ir_node *block) {
637 return get_irn_link(block);
641 * Returns the Proj with projection number proj and NOT mode_M
643 static ir_node *get_proj(const ir_node *node, long proj) {
644 const ir_edge_t *edge;
647 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
649 foreach_out_edge(node, edge) {
650 src = get_edge_src_irn(edge);
652 assert(is_Proj(src) && "Proj expected");
653 if (get_irn_mode(src) == mode_M)
656 if (get_Proj_proj(src) == proj)
663 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
665 static void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node,
666 ir_mode *mode, long pnc) {
667 const ir_node *proj_true;
668 const ir_node *proj_false;
669 const ir_node *block;
670 const ir_node *next_block;
673 /* get both Proj's */
674 proj_true = get_proj(node, pn_Cond_true);
675 assert(proj_true && "CondJmp without true Proj");
677 proj_false = get_proj(node, pn_Cond_false);
678 assert(proj_false && "CondJmp without false Proj");
680 /* for now, the code works for scheduled and non-schedules blocks */
681 block = get_nodes_block(node);
683 /* we have a block schedule */
684 next_block = next_blk_sched(block);
686 if (get_cfop_target_block(proj_true) == next_block) {
687 /* exchange both proj's so the second one can be omitted */
688 const ir_node *t = proj_true;
690 proj_true = proj_false;
693 pnc = get_negated_pnc(pnc, mode);
696 /* in case of unordered compare, check for parity */
697 if (pnc & pn_Cmp_Uo) {
698 be_emit_cstring(env, "\tjp ");
699 ia32_emit_cfop_target(env, proj_true);
700 be_emit_finish_line_gas(env, proj_true);
703 be_emit_cstring(env, "\tj");
704 ia32_emit_cmp_suffix(env, pnc);
705 be_emit_char(env, ' ');
706 ia32_emit_cfop_target(env, proj_true);
707 be_emit_finish_line_gas(env, proj_true);
709 /* the second Proj might be a fallthrough */
710 if (get_cfop_target_block(proj_false) != next_block) {
711 be_emit_cstring(env, "\tjmp ");
712 ia32_emit_cfop_target(env, proj_false);
713 be_emit_finish_line_gas(env, proj_false);
715 be_emit_cstring(env, "\t/* fallthrough to");
716 ia32_emit_cfop_target(env, proj_false);
717 be_emit_cstring(env, " */");
718 be_emit_finish_line_gas(env, proj_false);
723 * Emits code for conditional jump.
725 static void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
726 be_emit_cstring(env, "\tcmp ");
727 ia32_emit_binop(env, node);
728 be_emit_finish_line_gas(env, node);
730 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
734 * Emits code for conditional jump with two variables.
736 static void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
737 CondJmp_emitter(env, node);
741 * Emits code for conditional test and jump.
743 static void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
744 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
745 be_emit_cstring(env, "\ttest $");
746 ia32_emit_immediate(env, node);
747 be_emit_cstring(env, ", ");
748 ia32_emit_source_register(env, node, 0);
749 be_emit_finish_line_gas(env, node);
751 be_emit_cstring(env, "\ttest ");
752 ia32_emit_source_register(env, node, 1);
753 be_emit_cstring(env, ", ");
754 ia32_emit_source_register(env, node, 0);
755 be_emit_finish_line_gas(env, node);
757 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
761 * Emits code for conditional test and jump with two variables.
763 static void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
764 TestJmp_emitter(env, node);
767 static void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
768 be_emit_cstring(env, "/* omitted redundant test */");
769 be_emit_finish_line_gas(env, node);
771 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
774 static void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
775 be_emit_cstring(env, "/* omitted redundant test/cmp */");
776 be_emit_finish_line_gas(env, node);
778 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
782 * Emits code for conditional SSE floating point jump with two variables.
784 static void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
785 be_emit_cstring(env, "\tucomi");
786 ia32_emit_xmm_mode_suffix(env, node);
787 be_emit_char(env, ' ');
788 ia32_emit_binop(env, node);
789 be_emit_finish_line_gas(env, node);
791 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
795 * Emits code for conditional x87 floating point jump with two variables.
797 static void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
798 ia32_attr_t *attr = get_ia32_attr(node);
799 const char *reg = attr->x87[1]->name;
800 long pnc = get_ia32_pncode(node);
802 switch (get_ia32_irn_opcode(node)) {
803 case iro_ia32_fcomrJmp:
804 pnc = get_inversed_pnc(pnc);
805 reg = attr->x87[0]->name;
806 case iro_ia32_fcomJmp:
808 be_emit_cstring(env, "\tfucom ");
810 case iro_ia32_fcomrpJmp:
811 pnc = get_inversed_pnc(pnc);
812 reg = attr->x87[0]->name;
813 case iro_ia32_fcompJmp:
814 be_emit_cstring(env, "\tfucomp ");
816 case iro_ia32_fcomrppJmp:
817 pnc = get_inversed_pnc(pnc);
818 case iro_ia32_fcomppJmp:
819 be_emit_cstring(env, "\tfucompp ");
825 be_emit_char(env, '%');
826 be_emit_string(env, reg);
828 be_emit_finish_line_gas(env, node);
830 be_emit_cstring(env, "\tfnstsw %ax");
831 be_emit_finish_line_gas(env, node);
832 be_emit_cstring(env, "\tsahf");
833 be_emit_finish_line_gas(env, node);
835 finish_CondJmp(env, node, mode_E, pnc);
838 static void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
839 long pnc = get_ia32_pncode(node);
840 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
841 int idx_left = 2 - is_PsiCondCMov;
842 int idx_right = 3 - is_PsiCondCMov;
843 const arch_register_t *in1, *in2, *out;
845 out = arch_get_irn_register(env->arch_env, node);
846 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
847 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
849 /* we have to emit the cmp first, because the destination register */
850 /* could be one of the compare registers */
851 if (is_ia32_CmpCMov(node)) {
852 be_emit_cstring(env, "\tcmp ");
853 ia32_emit_source_register(env, node, 1);
854 be_emit_cstring(env, ", ");
855 ia32_emit_source_register(env, node, 0);
856 } else if (is_ia32_xCmpCMov(node)) {
857 be_emit_cstring(env, "\tucomis");
858 ia32_emit_mode_suffix(env, get_irn_mode(node));
859 be_emit_char(env, ' ');
860 ia32_emit_source_register(env, node, 1);
861 be_emit_cstring(env, ", ");
862 ia32_emit_source_register(env, node, 0);
863 } else if (is_PsiCondCMov) {
864 /* omit compare because flags are already set by And/Or */
865 be_emit_cstring(env, "\ttest ");
866 ia32_emit_source_register(env, node, 0);
867 be_emit_cstring(env, ", ");
868 ia32_emit_source_register(env, node, 0);
870 assert(0 && "unsupported CMov");
872 be_emit_finish_line_gas(env, node);
874 if (REGS_ARE_EQUAL(out, in2)) {
875 /* best case: default in == out -> do nothing */
876 } else if (REGS_ARE_EQUAL(out, in1)) {
877 ir_node *n = (ir_node*) node;
878 /* true in == out -> need complement compare and exchange true and default in */
879 ir_node *t = get_irn_n(n, idx_left);
880 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
881 set_irn_n(n, idx_right, t);
883 pnc = get_negated_pnc(pnc, get_irn_mode(node));
885 /* out is different from in: need copy default -> out */
886 if (is_PsiCondCMov) {
887 be_emit_cstring(env, "\tmovl ");
888 ia32_emit_dest_register(env, node, 2);
889 be_emit_cstring(env, ", ");
890 ia32_emit_dest_register(env, node, 0);
892 be_emit_cstring(env, "\tmovl ");
893 ia32_emit_source_register(env, node, 3);
894 be_emit_cstring(env, ", ");
895 ia32_emit_dest_register(env, node, 0);
897 be_emit_finish_line_gas(env, node);
900 if (is_PsiCondCMov) {
901 be_emit_cstring(env, "\tcmov");
902 ia32_emit_cmp_suffix(env, pnc);
903 be_emit_cstring(env, "l ");
904 ia32_emit_source_register(env, node, 1);
905 be_emit_cstring(env, ", ");
906 ia32_emit_dest_register(env, node, 0);
908 be_emit_cstring(env, "\tcmov");
909 ia32_emit_cmp_suffix(env, pnc);
910 be_emit_cstring(env, "l ");
911 ia32_emit_source_register(env, node, 2);
912 be_emit_cstring(env, ", ");
913 ia32_emit_dest_register(env, node, 0);
915 be_emit_finish_line_gas(env, node);
918 static void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
919 CMov_emitter(env, node);
922 static void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
923 CMov_emitter(env, node);
926 static void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
927 CMov_emitter(env, node);
930 static void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
931 int pnc = get_ia32_pncode(node);
933 const arch_register_t *out;
935 out = arch_get_irn_register(env->arch_env, node);
936 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
938 if (is_ia32_CmpSet(node)) {
939 be_emit_cstring(env, "\tcmp ");
940 ia32_emit_binop(env, node);
941 } else if (is_ia32_xCmpSet(node)) {
942 be_emit_cstring(env, "\tucomis");
943 ia32_emit_mode_suffix(env, get_irn_mode(get_irn_n(node, 2)));
944 be_emit_char(env, ' ');
945 ia32_emit_binop(env, node);
946 } else if (is_ia32_PsiCondSet(node)) {
947 be_emit_cstring(env, "\tcmp $0, ");
948 ia32_emit_source_register(env, node, 0);
950 assert(0 && "unsupported Set");
952 be_emit_finish_line_gas(env, node);
954 /* use mov to clear target because it doesn't affect the eflags */
955 be_emit_cstring(env, "\tmovl $0, %");
956 be_emit_string(env, arch_register_get_name(out));
957 be_emit_finish_line_gas(env, node);
959 be_emit_cstring(env, "\tset");
960 ia32_emit_cmp_suffix(env, pnc);
961 be_emit_cstring(env, " %");
962 be_emit_string(env, reg8bit);
963 be_emit_finish_line_gas(env, node);
966 static void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
967 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
970 static void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
971 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
974 static void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
975 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
978 static void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
980 long pnc = get_ia32_pncode(node);
981 long unord = pnc & pn_Cmp_Uo;
983 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
986 case pn_Cmp_Leg: /* odered */
989 case pn_Cmp_Uo: /* unordered */
993 case pn_Cmp_Eq: /* == */
997 case pn_Cmp_Lt: /* < */
1001 case pn_Cmp_Le: /* <= */
1005 case pn_Cmp_Gt: /* > */
1009 case pn_Cmp_Ge: /* >= */
1013 case pn_Cmp_Lg: /* != */
1018 assert(sse_pnc >= 0 && "unsupported compare");
1020 if (unord && sse_pnc != 3) {
1022 We need a separate compare against unordered.
1023 Quick and Dirty solution:
1024 - get some memory on stack
1028 - and result and stored result
1031 be_emit_cstring(env, "\tsubl $8, %esp");
1032 be_emit_finish_line_gas(env, node);
1034 be_emit_cstring(env, "\tcmpsd $3, ");
1035 ia32_emit_binop(env, node);
1036 be_emit_finish_line_gas(env, node);
1038 be_emit_cstring(env, "\tmovsd ");
1039 ia32_emit_dest_register(env, node, 0);
1040 be_emit_cstring(env, ", (%esp)");
1041 be_emit_finish_line_gas(env, node);
1044 be_emit_cstring(env, "\tcmpsd ");
1045 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1046 ia32_emit_binop(env, node);
1047 be_emit_finish_line_gas(env, node);
1049 if (unord && sse_pnc != 3) {
1050 be_emit_cstring(env, "\tandpd (%esp), ");
1051 ia32_emit_dest_register(env, node, 0);
1052 be_emit_finish_line_gas(env, node);
1054 be_emit_cstring(env, "\taddl $8, %esp");
1055 be_emit_finish_line_gas(env, node);
1059 /*********************************************************
1062 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1063 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1064 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1065 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1068 *********************************************************/
1070 /* jump table entry (target and corresponding number) */
1071 typedef struct _branch_t {
1076 /* jump table for switch generation */
1077 typedef struct _jmp_tbl_t {
1078 ir_node *defProj; /**< default target */
1079 int min_value; /**< smallest switch case */
1080 int max_value; /**< largest switch case */
1081 int num_branches; /**< number of jumps */
1082 char *label; /**< label of the jump table */
1083 branch_t *branches; /**< jump array */
1087 * Compare two variables of type branch_t. Used to sort all switch cases
1089 static int ia32_cmp_branch_t(const void *a, const void *b) {
1090 branch_t *b1 = (branch_t *)a;
1091 branch_t *b2 = (branch_t *)b;
1093 if (b1->value <= b2->value)
1100 * Emits code for a SwitchJmp (creates a jump table if
1101 * possible otherwise a cmp-jmp cascade). Port from
1104 static void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1105 unsigned long interval;
1110 const ir_edge_t *edge;
1112 /* fill the table structure */
1113 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1114 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1116 tbl.num_branches = get_irn_n_edges(node);
1117 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1118 tbl.min_value = INT_MAX;
1119 tbl.max_value = INT_MIN;
1122 /* go over all proj's and collect them */
1123 foreach_out_edge(node, edge) {
1124 proj = get_edge_src_irn(edge);
1125 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1127 pnc = get_Proj_proj(proj);
1129 /* create branch entry */
1130 tbl.branches[i].target = proj;
1131 tbl.branches[i].value = pnc;
1133 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1134 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1136 /* check for default proj */
1137 if (pnc == get_ia32_pncode(node)) {
1138 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1145 /* sort the branches by their number */
1146 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1148 /* two-complement's magic make this work without overflow */
1149 interval = tbl.max_value - tbl.min_value;
1151 /* emit the table */
1152 be_emit_cstring(env, "\tcmpl $");
1153 be_emit_irprintf(env->emit, "%u, ", interval);
1154 ia32_emit_source_register(env, node, 0);
1155 be_emit_finish_line_gas(env, node);
1157 be_emit_cstring(env, "\tja ");
1158 ia32_emit_cfop_target(env, tbl.defProj);
1159 be_emit_finish_line_gas(env, node);
1161 if (tbl.num_branches > 1) {
1163 be_emit_cstring(env, "\tjmp *");
1164 be_emit_string(env, tbl.label);
1165 be_emit_cstring(env, "(,");
1166 ia32_emit_source_register(env, node, 0);
1167 be_emit_cstring(env, ",4)");
1168 be_emit_finish_line_gas(env, node);
1170 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1171 be_emit_cstring(env, "\t.align 4\n");
1172 be_emit_write_line(env);
1174 be_emit_string(env, tbl.label);
1175 be_emit_cstring(env, ":\n");
1176 be_emit_write_line(env);
1178 be_emit_cstring(env, ".long ");
1179 ia32_emit_cfop_target(env, tbl.branches[0].target);
1180 be_emit_finish_line_gas(env, NULL);
1182 last_value = tbl.branches[0].value;
1183 for (i = 1; i < tbl.num_branches; ++i) {
1184 while (++last_value < tbl.branches[i].value) {
1185 be_emit_cstring(env, ".long ");
1186 ia32_emit_cfop_target(env, tbl.defProj);
1187 be_emit_finish_line_gas(env, NULL);
1189 be_emit_cstring(env, ".long ");
1190 ia32_emit_cfop_target(env, tbl.branches[i].target);
1191 be_emit_finish_line_gas(env, NULL);
1193 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1195 /* one jump is enough */
1196 be_emit_cstring(env, "\tjmp ");
1197 ia32_emit_cfop_target(env, tbl.branches[0].target);
1198 be_emit_finish_line_gas(env, node);
1208 * Emits code for a unconditional jump.
1210 static void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1211 ir_node *block, *next_block;
1213 /* for now, the code works for scheduled and non-schedules blocks */
1214 block = get_nodes_block(node);
1216 /* we have a block schedule */
1217 next_block = next_blk_sched(block);
1218 if (get_cfop_target_block(node) != next_block) {
1219 be_emit_cstring(env, "\tjmp ");
1220 ia32_emit_cfop_target(env, node);
1222 be_emit_cstring(env, "\t/* fallthrough to ");
1223 ia32_emit_cfop_target(env, node);
1224 be_emit_cstring(env, " */");
1226 be_emit_finish_line_gas(env, node);
1229 /**********************************
1232 * | | ___ _ __ _ _| |_) |
1233 * | | / _ \| '_ \| | | | _ <
1234 * | |___| (_) | |_) | |_| | |_) |
1235 * \_____\___/| .__/ \__, |____/
1238 **********************************/
1241 * Emit movsb/w instructions to make mov count divideable by 4
1243 static void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1244 be_emit_cstring(env, "\tcld");
1245 be_emit_finish_line_gas(env, NULL);
1249 be_emit_cstring(env, "\tmovsb");
1250 be_emit_finish_line_gas(env, NULL);
1253 be_emit_cstring(env, "\tmovsw");
1254 be_emit_finish_line_gas(env, NULL);
1257 be_emit_cstring(env, "\tmovsb");
1258 be_emit_finish_line_gas(env, NULL);
1259 be_emit_cstring(env, "\tmovsw");
1260 be_emit_finish_line_gas(env, NULL);
1266 * Emit rep movsd instruction for memcopy.
1268 static void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1269 tarval *tv = get_ia32_Immop_tarval(node);
1270 int rem = get_tarval_long(tv);
1272 emit_CopyB_prolog(env, rem);
1274 be_emit_cstring(env, "\trep movsd");
1275 be_emit_finish_line_gas(env, node);
1279 * Emits unrolled memcopy.
1281 static void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1282 tarval *tv = get_ia32_Immop_tarval(node);
1283 int size = get_tarval_long(tv);
1285 emit_CopyB_prolog(env, size & 0x3);
1289 be_emit_cstring(env, "\tmovsd");
1290 be_emit_finish_line_gas(env, NULL);
1296 /***************************
1300 * | | / _ \| '_ \ \ / /
1301 * | |___| (_) | | | \ V /
1302 * \_____\___/|_| |_|\_/
1304 ***************************/
1307 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1309 static void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1310 ir_mode *ls_mode = get_ia32_ls_mode(node);
1311 int ls_bits = get_mode_size_bits(ls_mode);
1313 be_emit_cstring(env, "\tcvt");
1315 if(is_ia32_Conv_I2FP(node)) {
1317 be_emit_cstring(env, "si2ss");
1319 be_emit_cstring(env, "si2sd");
1321 } else if(is_ia32_Conv_FP2I(node)) {
1323 be_emit_cstring(env, "ss2si");
1325 be_emit_cstring(env, "sd2si");
1328 assert(is_ia32_Conv_FP2FP(node));
1330 be_emit_cstring(env, "sd2ss");
1332 be_emit_cstring(env, "ss2sd");
1335 be_emit_char(env, ' ');
1337 switch(get_ia32_op_type(node)) {
1339 ia32_emit_source_register(env, node, 2);
1340 be_emit_cstring(env, ", ");
1341 ia32_emit_dest_register(env, node, 0);
1343 case ia32_AddrModeS:
1344 ia32_emit_dest_register(env, node, 0);
1345 be_emit_cstring(env, ", ");
1346 ia32_emit_am(env, node);
1349 assert(0 && "unsupported op type for Conv");
1351 be_emit_finish_line_gas(env, node);
1354 static void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1355 emit_ia32_Conv_with_FP(env, node);
1358 static void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1359 emit_ia32_Conv_with_FP(env, node);
1362 static void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1363 emit_ia32_Conv_with_FP(env, node);
1367 * Emits code for an Int conversion.
1369 static void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1370 const char *sign_suffix;
1371 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1372 int smaller_bits = get_mode_size_bits(smaller_mode);
1374 const arch_register_t *in_reg, *out_reg;
1376 assert(!mode_is_float(smaller_mode));
1377 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1379 signed_mode = mode_is_signed(smaller_mode);
1380 if(smaller_bits == 32) {
1381 // this should not happen as it's no convert
1385 sign_suffix = signed_mode ? "s" : "z";
1388 switch(get_ia32_op_type(node)) {
1390 in_reg = get_in_reg(node, 2);
1391 out_reg = get_out_reg(node, 0);
1393 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1394 REGS_ARE_EQUAL(out_reg, in_reg) &&
1397 /* argument and result are both in EAX and */
1398 /* signedness is ok: -> use converts */
1399 if (smaller_bits == 8) {
1400 be_emit_cstring(env, "\tcbtw");
1401 } else if (smaller_bits == 16) {
1402 be_emit_cstring(env, "\tcwtl");
1406 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1407 /* argument and result are in the same register */
1408 /* and signedness is ok: -> use and with mask */
1409 int mask = (1 << smaller_bits) - 1;
1410 be_emit_cstring(env, "\tandl $0x");
1411 be_emit_irprintf(env->emit, "%x, ", mask);
1412 ia32_emit_dest_register(env, node, 0);
1414 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1416 be_emit_cstring(env, "\tmov");
1417 be_emit_string(env, sign_suffix);
1418 ia32_emit_mode_suffix(env, smaller_mode);
1419 be_emit_cstring(env, "l %");
1420 be_emit_string(env, sreg);
1421 be_emit_cstring(env, ", ");
1422 ia32_emit_dest_register(env, node, 0);
1425 case ia32_AddrModeS: {
1426 be_emit_cstring(env, "\tmov");
1427 be_emit_string(env, sign_suffix);
1428 ia32_emit_mode_suffix(env, smaller_mode);
1429 be_emit_cstring(env, "l %");
1430 ia32_emit_am(env, node);
1431 be_emit_cstring(env, ", ");
1432 ia32_emit_dest_register(env, node, 0);
1436 assert(0 && "unsupported op type for Conv");
1438 be_emit_finish_line_gas(env, node);
1442 * Emits code for an 8Bit Int conversion.
1444 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1445 emit_ia32_Conv_I2I(env, node);
1449 /*******************************************
1452 * | |__ ___ _ __ ___ __| | ___ ___
1453 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1454 * | |_) | __/ | | | (_) | (_| | __/\__ \
1455 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1457 *******************************************/
1460 * Emits a backend call
1462 static void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1463 ir_entity *ent = be_Call_get_entity(node);
1465 be_emit_cstring(env, "\tcall ");
1467 be_emit_string(env, get_entity_ld_name(ent));
1469 be_emit_char(env, '*');
1470 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1472 be_emit_finish_line_gas(env, node);
1476 * Emits code to increase stack pointer.
1478 static void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1479 int offs = be_get_IncSP_offset(node);
1485 be_emit_cstring(env, "\tsubl $");
1486 be_emit_irprintf(env->emit, "%u, ", offs);
1487 ia32_emit_source_register(env, node, 0);
1489 be_emit_cstring(env, "\taddl $");
1490 be_emit_irprintf(env->emit, "%u, ", -offs);
1491 ia32_emit_source_register(env, node, 0);
1493 be_emit_finish_line_gas(env, node);
1497 * Emits code to set stack pointer.
1499 static void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1500 be_emit_cstring(env, "\tmovl ");
1501 ia32_emit_source_register(env, node, 2);
1502 be_emit_cstring(env, ", ");
1503 ia32_emit_dest_register(env, node, 0);
1504 be_emit_finish_line_gas(env, node);
1508 * Emits code for Copy/CopyKeep.
1510 static void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op) {
1511 const arch_env_t *aenv = env->arch_env;
1513 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1514 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1517 if (mode_is_float(get_irn_mode(node))) {
1518 be_emit_cstring(env, "\tmovsd ");
1519 ia32_emit_source_register(env, node, 0);
1520 be_emit_cstring(env, ", ");
1521 ia32_emit_dest_register(env, node, 0);
1523 be_emit_cstring(env, "\tmovl ");
1524 ia32_emit_source_register(env, node, 0);
1525 be_emit_cstring(env, ", ");
1526 ia32_emit_dest_register(env, node, 0);
1528 be_emit_finish_line_gas(env, node);
1531 static void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1532 Copy_emitter(env, node, be_get_Copy_op(node));
1535 static void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1536 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1540 * Emits code for exchange.
1542 static void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1543 const arch_register_t *in1, *in2;
1544 const arch_register_class_t *cls1, *cls2;
1546 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1547 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1549 cls1 = arch_register_get_class(in1);
1550 cls2 = arch_register_get_class(in2);
1552 assert(cls1 == cls2 && "Register class mismatch at Perm");
1554 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1556 if(emit_env->isa->opt_arch == arch_athlon) {
1557 // xchg commands are Vector path on athlons and therefore stall the DirectPath pipeline
1558 // it is often beneficial to use the 3 xor trick instead of an xchg
1560 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %1S, %2S", irn, irn);
1562 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %2S, %1S", irn, irn);
1564 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %1S, %2S", irn, irn);
1567 be_emit_cstring(env, "\txchg ");
1568 ia32_emit_source_register(env, node, 1);
1569 be_emit_cstring(env, ", ");
1570 ia32_emit_source_register(env, node, 0);
1571 be_emit_finish_line_gas(env, node);
1575 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1576 be_emit_cstring(env, "\txorpd ");
1577 ia32_emit_source_register(env, node, 1);
1578 be_emit_cstring(env, ", ");
1579 ia32_emit_source_register(env, node, 0);
1580 be_emit_finish_line_gas(env, NULL);
1582 be_emit_cstring(env, "\txorpd ");
1583 ia32_emit_source_register(env, node, 0);
1584 be_emit_cstring(env, ", ");
1585 ia32_emit_source_register(env, node, 1);
1586 be_emit_finish_line_gas(env, NULL);
1588 be_emit_cstring(env, "\txorpd ");
1589 ia32_emit_source_register(env, node, 1);
1590 be_emit_cstring(env, ", ");
1591 ia32_emit_source_register(env, node, 0);
1592 be_emit_finish_line_gas(env, node);
1593 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1595 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1601 * Emits code for Constant loading.
1603 static void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1604 ir_mode *mode = get_irn_mode(node);
1605 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1607 if (imm_tp == ia32_ImmSymConst) {
1608 be_emit_cstring(env, "\tmovl $");
1609 ia32_emit_immediate(env, node);
1610 be_emit_cstring(env, ", ");
1611 ia32_emit_dest_register(env, node, 0);
1613 tarval *tv = get_ia32_Immop_tarval(node);
1614 assert(mode == mode_Iu);
1615 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1616 if (tarval_is_null(tv)) {
1617 if (env->isa->opt_arch == arch_pentium_4) {
1618 /* P4 prefers sub r, r, others xor r, r */
1619 be_emit_cstring(env, "\tsubl ");
1621 be_emit_cstring(env, "\txorl ");
1623 ia32_emit_dest_register(env, node, 0);
1624 be_emit_cstring(env, ", ");
1625 ia32_emit_dest_register(env, node, 0);
1627 be_emit_cstring(env, "\tmovl $");
1628 ia32_emit_immediate(env, node);
1629 be_emit_cstring(env, ", ");
1630 ia32_emit_dest_register(env, node, 0);
1633 be_emit_finish_line_gas(env, node);
1637 * Emits code to load the TLS base
1639 static void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1640 be_emit_cstring(env, "\tmovl %gs:0, ");
1641 ia32_emit_dest_register(env, node, 0);
1642 be_emit_finish_line_gas(env, node);
1645 static void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1646 be_emit_cstring(env, "\tret");
1647 be_emit_finish_line_gas(env, node);
1650 static void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1654 /***********************************************************************************
1657 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1658 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1659 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1660 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1662 ***********************************************************************************/
1665 * Enters the emitter functions for handled nodes into the generic
1666 * pointer of an opcode.
1668 static void ia32_register_emitters(void) {
1670 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1671 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1672 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1673 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1674 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1675 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1677 /* first clear the generic function pointer for all ops */
1678 clear_irp_opcodes_generic_func();
1680 /* register all emitter functions defined in spec */
1681 ia32_register_spec_emitters();
1683 /* other ia32 emitter functions */
1689 IA32_EMIT(PsiCondCMov);
1691 IA32_EMIT(PsiCondSet);
1692 IA32_EMIT(SwitchJmp);
1695 IA32_EMIT(Conv_I2FP);
1696 IA32_EMIT(Conv_FP2I);
1697 IA32_EMIT(Conv_FP2FP);
1698 IA32_EMIT(Conv_I2I);
1699 IA32_EMIT(Conv_I2I8Bit);
1704 IA32_EMIT(xCmpCMov);
1705 IA32_EMIT(xCondJmp);
1706 IA32_EMIT2(fcomJmp, x87CondJmp);
1707 IA32_EMIT2(fcompJmp, x87CondJmp);
1708 IA32_EMIT2(fcomppJmp, x87CondJmp);
1709 IA32_EMIT2(fcomrJmp, x87CondJmp);
1710 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1711 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1713 /* benode emitter */
1739 static const char *last_name = NULL;
1740 static unsigned last_line = -1;
1741 static unsigned num = -1;
1744 * Emit the debug support for node node.
1746 static void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1747 dbg_info *db = get_irn_dbg_info(node);
1749 const char *fname = be_retrieve_dbg_info(db, &lineno);
1751 if (! env->cg->birg->main_env->options->stabs_debug_support)
1755 if (last_name != fname) {
1757 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1760 if (last_line != lineno) {
1763 snprintf(name, sizeof(name), ".LM%u", ++num);
1765 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1766 be_emit_string(env, name);
1767 be_emit_cstring(env, ":\n");
1768 be_emit_write_line(env);
1773 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1776 * Emits code for a node.
1778 static void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1779 ir_op *op = get_irn_op(node);
1780 DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
1782 DBG((mod, LEVEL_1, "emitting code for %+F\n", node));
1784 if (op->ops.generic) {
1785 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1786 ia32_emit_dbg(env, node);
1787 (*func) (env, node);
1789 emit_Nothing(env, node);
1790 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1795 * Emits gas alignment directives
1797 static void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1798 be_emit_cstring(env, "\t.p2align ");
1799 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
1800 be_emit_write_line(env);
1804 * Emits gas alignment directives for Functions depended on cpu architecture.
1806 static void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1808 unsigned maximum_skip;
1823 maximum_skip = (1 << align) - 1;
1824 ia32_emit_alignment(env, align, maximum_skip);
1828 * Emits gas alignment directives for Labels depended on cpu architecture.
1830 static void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1831 unsigned align; unsigned maximum_skip;
1846 maximum_skip = (1 << align) - 1;
1847 ia32_emit_alignment(env, align, maximum_skip);
1850 static int is_first_loop_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev_block) {
1851 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1852 double block_freq, prev_freq;
1853 static const double DELTA = .0001;
1854 cpu_support cpu = env->isa->opt_arch;
1856 if(exec_freq == NULL)
1858 if(cpu == arch_i386 || cpu == arch_i486)
1861 block_freq = get_block_execfreq(exec_freq, block);
1862 prev_freq = get_block_execfreq(exec_freq, prev_block);
1864 if(block_freq < DELTA || prev_freq < DELTA)
1867 block_freq /= prev_freq;
1871 case arch_athlon_64:
1873 return block_freq > 3;
1878 return block_freq > 2;
1882 * Walks over the nodes in a block connected by scheduling edges
1883 * and emits code for each node.
1885 static void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block) {
1886 ir_graph *irg = get_irn_irg(block);
1887 ir_node *start_block = get_irg_start_block(irg);
1889 const ir_node *node;
1892 assert(is_Block(block));
1894 if (block == start_block)
1897 if (need_label && get_irn_arity(block) == 1) {
1898 ir_node *pred_block = get_Block_cfgpred_block(block, 0);
1900 if (pred_block == last_block && get_irn_n_edges_kind(pred_block, EDGE_KIND_BLOCK) <= 2)
1904 /* special case: if one of our cfg preds is a switch-jmp we need a label, */
1905 /* otherwise there might be jump table entries jumping to */
1906 /* non-existent (omitted) labels */
1907 for (i = get_Block_n_cfgpreds(block) - 1; i >= 0; --i) {
1908 ir_node *pred = get_Block_cfgpred(block, i);
1910 if (is_Proj(pred)) {
1911 assert(get_irn_mode(pred) == mode_X);
1912 if (is_ia32_SwitchJmp(get_Proj_pred(pred))) {
1922 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1924 /* align the loop headers */
1925 if (! is_first_loop_block(env, block, last_block)) {
1926 /* align blocks where the previous block has no fallthrough */
1927 arity = get_irn_arity(block);
1929 for (i = 0; i < arity; ++i) {
1930 ir_node *predblock = get_Block_cfgpred_block(block, i);
1932 if (predblock == last_block) {
1940 ia32_emit_align_label(env, env->isa->opt_arch);
1942 be_emit_cstring(env, BLOCK_PREFIX);
1943 be_emit_irprintf(env->emit, "%d:", get_irn_node_nr(block));
1944 be_emit_pad_comment(env);
1945 be_emit_cstring(env, " /* preds:");
1947 /* emit list of pred blocks in comment */
1948 arity = get_irn_arity(block);
1949 for (i = 0; i < arity; ++i) {
1950 ir_node *predblock = get_Block_cfgpred_block(block, i);
1951 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
1954 if (exec_freq != NULL) {
1955 be_emit_irprintf(env->emit, " freq: %f", get_block_execfreq(exec_freq, block));
1957 be_emit_cstring(env, " */\n");
1958 be_emit_write_line(env);
1961 /* emit the contents of the block */
1962 ia32_emit_dbg(env, block);
1963 sched_foreach(block, node) {
1964 ia32_emit_node(env, node);
1969 * Emits code for function start.
1971 static void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
1972 ir_entity *irg_ent = get_irg_entity(irg);
1973 const char *irg_name = get_entity_ld_name(irg_ent);
1974 cpu_support cpu = env->isa->opt_arch;
1975 const be_irg_t *birg = env->cg->birg;
1977 be_emit_write_line(env);
1978 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1979 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
1980 ia32_emit_align_func(env, cpu);
1981 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1982 be_emit_cstring(env, ".global ");
1983 be_emit_string(env, irg_name);
1984 be_emit_char(env, '\n');
1985 be_emit_write_line(env);
1987 ia32_emit_function_object(env, irg_name);
1988 be_emit_string(env, irg_name);
1989 be_emit_cstring(env, ":\n");
1990 be_emit_write_line(env);
1994 * Emits code for function end
1996 static void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
1997 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
1998 const be_irg_t *birg = env->cg->birg;
2000 ia32_emit_function_size(env, irg_name);
2001 be_dbg_method_end(birg->main_env->db_handle);
2002 be_emit_char(env, '\n');
2003 be_emit_write_line(env);
2008 * Sets labels for control flow nodes (jump target)
2010 static void ia32_gen_labels(ir_node *block, void *data) {
2012 int n = get_Block_n_cfgpreds(block);
2014 for (n--; n >= 0; n--) {
2015 pred = get_Block_cfgpred(block, n);
2016 set_irn_link(pred, block);
2021 * Main driver. Emits the code for one routine.
2023 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2024 ia32_emit_env_t env;
2026 ir_node *last_block = NULL;
2029 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2030 env.emit = &env.isa->emit;
2031 env.arch_env = cg->arch_env;
2033 FIRM_DBG_REGISTER(env.mod, "firm.be.ia32.emitter");
2035 /* set the global arch_env (needed by print hooks) */
2036 arch_env = cg->arch_env;
2038 ia32_register_emitters();
2040 ia32_emit_func_prolog(&env, irg);
2041 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2043 n = ARR_LEN(cg->blk_sched);
2044 for (i = 0; i < n;) {
2047 block = cg->blk_sched[i];
2049 next_bl = i < n ? cg->blk_sched[i] : NULL;
2051 /* set here the link. the emitter expects to find the next block here */
2052 set_irn_link(block, next_bl);
2053 ia32_gen_block(&env, block, last_block);
2057 ia32_emit_func_epilog(&env, irg);