2 * This file implements the node emitter.
22 #include "iredges_t.h"
24 #include "../besched_t.h"
25 #include "../benode_t.h"
27 #include "ia32_emitter.h"
28 #include "gen_ia32_emitter.h"
29 #include "gen_ia32_regalloc_if.h"
30 #include "ia32_nodes_attr.h"
31 #include "ia32_new_nodes.h"
32 #include "ia32_map_regs.h"
34 #define BLOCK_PREFIX(x) ".L" x
36 #define SNPRINTF_BUF_LEN 128
38 /* global arch_env for lc_printf functions */
39 static const arch_env_t *arch_env = NULL;
41 /** by default, we generate assembler code for the Linux gas */
42 asm_flavour_t asm_flavour = ASM_LINUX_GAS;
45 * Switch to a new section
47 void ia32_switch_section(FILE *F, section_t sec) {
48 static section_t curr_sec = NO_SECTION;
49 static const char *text[ASM_MAX][SECTION_MAX] = {
51 ".section\t.text", ".section\t.data", ".section\t.rodata", ".section\t.text"
54 ".section\t.text", ".section\t.data", ".section .rdata,\"dr\"", ".section\t.text"
71 fprintf(F, "\t%s\n", text[asm_flavour][sec]);
75 static void ia32_dump_function_object(FILE *F, const char *name)
77 switch (asm_flavour) {
79 fprintf(F, "\t.type\t%s, @function\n", name);
82 fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name);
87 static void ia32_dump_function_size(FILE *F, const char *name)
89 switch (asm_flavour) {
91 fprintf(F, "\t.size\t%s, .-%s\n", name, name);
96 /*************************************************************
98 * (_) | | / _| | | | |
99 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
100 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
101 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
102 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
105 *************************************************************/
108 * returns true if a node has x87 registers
110 static int has_x87_register(const ir_node *n) {
111 return is_irn_machine_user(n, 0);
114 /* We always pass the ir_node which is a pointer. */
115 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
116 return lc_arg_type_ptr;
121 * Returns the register at in position pos.
123 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
125 const arch_register_t *reg = NULL;
127 assert(get_irn_arity(irn) > pos && "Invalid IN position");
129 /* The out register of the operator at position pos is the
130 in register we need. */
131 op = get_irn_n(irn, pos);
133 reg = arch_get_irn_register(arch_env, op);
135 assert(reg && "no in register found");
137 /* in case of unknown: just return a register */
138 if (REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN]))
139 reg = &ia32_gp_regs[REG_EAX];
140 else if (REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]))
141 reg = &ia32_xmm_regs[REG_XMM0];
142 else if (REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]))
143 reg = &ia32_vfp_regs[REG_VF0];
144 else if (REGS_ARE_EQUAL(reg, &ia32_st_regs[REG_ST_UKNWN]))
145 reg = &ia32_st_regs[REG_ST0];
151 * Returns the register at out position pos.
153 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
155 const arch_register_t *reg = NULL;
157 /* 1st case: irn is not of mode_T, so it has only */
158 /* one OUT register -> good */
159 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
160 /* Proj with the corresponding projnum for the register */
162 if (get_irn_mode(irn) != mode_T) {
163 reg = arch_get_irn_register(arch_env, irn);
165 else if (is_ia32_irn(irn)) {
166 reg = get_ia32_out_reg(irn, pos);
169 const ir_edge_t *edge;
171 foreach_out_edge(irn, edge) {
172 proj = get_edge_src_irn(edge);
173 assert(is_Proj(proj) && "non-Proj from mode_T node");
174 if (get_Proj_proj(proj) == pos) {
175 reg = arch_get_irn_register(arch_env, proj);
181 assert(reg && "no out register found");
191 * Returns the name of the in register at position pos.
193 static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
194 const arch_register_t *reg;
196 if (in_out == IN_REG) {
197 reg = get_in_reg(irn, pos);
199 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
200 /* FIXME: works for binop only */
201 assert(2 <= pos && pos <= 3);
202 reg = get_ia32_attr(irn)->x87[pos - 2];
206 /* destination address mode nodes don't have outputs */
207 if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
211 reg = get_out_reg(irn, pos);
212 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
213 reg = get_ia32_attr(irn)->x87[pos + 2];
215 return arch_register_get_name(reg);
219 * Get the register name for a node.
221 static int ia32_get_reg_name(lc_appendable_t *app,
222 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
225 ir_node *X = arg->v_ptr;
226 int nr = occ->width - 1;
229 return lc_appendable_snadd(app, "(null)", 6);
231 buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
233 /* append the stupid % to register names */
234 lc_appendable_chadd(app, '%');
235 return lc_appendable_snadd(app, buf, strlen(buf));
239 * Get the x87 register name for a node.
241 static int ia32_get_x87_name(lc_appendable_t *app,
242 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
245 ir_node *X = arg->v_ptr;
246 int nr = occ->width - 1;
250 return lc_appendable_snadd(app, "(null)", 6);
252 attr = get_ia32_attr(X);
253 buf = attr->x87[nr]->name;
254 lc_appendable_chadd(app, '%');
255 return lc_appendable_snadd(app, buf, strlen(buf));
259 * Returns the tarval, offset or scale of an ia32 as a string.
261 static int ia32_const_to_str(lc_appendable_t *app,
262 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
265 ir_node *X = arg->v_ptr;
268 return lc_arg_append(app, occ, "(null)", 6);
270 if (occ->conversion == 'C') {
271 buf = get_ia32_cnst(X);
274 buf = get_ia32_am_offs(X);
277 return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
281 * Determines the SSE suffix depending on the mode.
283 static int ia32_get_mode_suffix(lc_appendable_t *app,
284 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
286 ir_node *X = arg->v_ptr;
287 ir_mode *mode = get_irn_mode(X);
289 if (mode == mode_T) {
290 mode = is_ia32_AddrModeS(X) || is_ia32_AddrModeD(X) ? get_ia32_ls_mode(X) : get_ia32_res_mode(X);
294 return lc_arg_append(app, occ, "(null)", 6);
296 if (mode_is_float(mode)) {
297 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
300 return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
305 * Return the ia32 printf arg environment.
306 * We use the firm environment with some additional handlers.
308 const lc_arg_env_t *ia32_get_arg_env(void) {
309 static lc_arg_env_t *env = NULL;
311 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
312 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
313 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
314 static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
317 /* extend the firm printer */
318 env = firm_get_arg_env();
320 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
321 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
322 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
323 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
324 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
325 lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
331 static char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
332 switch(get_mode_size_bits(mode)) {
334 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
336 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
338 return (char *)arch_register_get_name(reg);
343 * Emits registers and/or address mode of a binary operation.
345 char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
346 static char *buf = NULL;
348 /* verify that this function is never called on non-AM supporting operations */
349 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
351 #define PRODUCES_RESULT(n) \
352 (!(is_ia32_St(n) || \
353 is_ia32_Store8Bit(n) || \
354 is_ia32_CondJmp(n) || \
355 is_ia32_xCondJmp(n) || \
356 is_ia32_SwitchJmp(n)))
359 buf = xcalloc(1, SNPRINTF_BUF_LEN);
362 memset(buf, 0, SNPRINTF_BUF_LEN);
365 switch(get_ia32_op_type(n)) {
367 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
368 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
371 const arch_register_t *in1 = get_in_reg(n, 2);
372 const arch_register_t *in2 = get_in_reg(n, 3);
373 const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
374 const arch_register_t *in;
377 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
378 out = out ? out : in1;
379 in_name = arch_register_get_name(in);
381 if (is_ia32_emit_cl(n)) {
382 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
386 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
390 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
391 assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
392 snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
395 if (PRODUCES_RESULT(n)) {
396 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n, env));
399 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S, %s", n, ia32_emit_am(n, env));
404 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
405 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
406 ia32_emit_am(n, env),
407 is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
408 get_ia32_cnst(n)); /* tell the assembler to store it's address. */
411 const arch_register_t *in1 = get_in_reg(n, 2);
412 ir_mode *mode = get_ia32_res_mode(n);
415 mode = mode ? mode : get_ia32_ls_mode(n);
416 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
418 if (is_ia32_emit_cl(n)) {
419 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
423 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
427 assert(0 && "unsupported op type");
430 #undef PRODUCES_RESULT
436 * Emits registers and/or address mode of a binary operation.
438 char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
439 static char *buf = NULL;
441 /* verify that this function is never called on non-AM supporting operations */
442 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
445 buf = xcalloc(1, SNPRINTF_BUF_LEN);
448 memset(buf, 0, SNPRINTF_BUF_LEN);
451 switch(get_ia32_op_type(n)) {
453 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
454 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
457 ia32_attr_t *attr = get_ia32_attr(n);
458 const arch_register_t *in1 = attr->x87[0];
459 const arch_register_t *in2 = attr->x87[1];
460 const arch_register_t *out = attr->x87[2];
461 const arch_register_t *in;
464 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
465 out = out ? out : in1;
466 in_name = arch_register_get_name(in);
468 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
473 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
476 assert(0 && "unsupported op type");
479 #undef PRODUCES_RESULT
485 * Emits registers and/or address mode of a unary operation.
487 char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
488 static char *buf = NULL;
491 buf = xcalloc(1, SNPRINTF_BUF_LEN);
494 memset(buf, 0, SNPRINTF_BUF_LEN);
497 switch(get_ia32_op_type(n)) {
499 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
500 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
503 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
507 snprintf(buf, SNPRINTF_BUF_LEN, ia32_emit_am(n, env));
510 assert(0 && "unsupported op type");
517 * Emits address mode.
519 char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
520 ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
524 static struct obstack *obst = NULL;
525 ir_mode *mode = get_ia32_ls_mode(n);
527 if (! is_ia32_Lea(n))
528 assert(mode && "AM node must have ls_mode attribute set.");
531 obst = xcalloc(1, sizeof(*obst));
534 obstack_free(obst, NULL);
537 /* obstack_free with NULL results in an uninitialized obstack */
541 switch (get_mode_size_bits(mode)) {
543 obstack_printf(obst, "BYTE PTR ");
546 obstack_printf(obst, "WORD PTR ");
549 obstack_printf(obst, "DWORD PTR ");
552 if (has_x87_register(n))
553 /* ARGHHH: stupid gas x87 wants QWORD PTR but SSE must be WITHOUT */
554 obstack_printf(obst, "QWORD PTR ");
558 obstack_printf(obst, "XWORD PTR ");
565 /* emit address mode symconst */
566 if (get_ia32_am_sc(n)) {
567 if (is_ia32_am_sc_sign(n))
568 obstack_printf(obst, "-");
569 obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
572 if (am_flav & ia32_B) {
573 obstack_printf(obst, "[");
574 lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
578 if (am_flav & ia32_I) {
580 obstack_printf(obst, "+");
583 obstack_printf(obst, "[");
586 lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
588 if (am_flav & ia32_S) {
589 obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
595 if (am_flav & ia32_O) {
596 s = get_ia32_am_offs(n);
599 /* omit explicit + if there was no base or index */
601 obstack_printf(obst, "[");
606 obstack_printf(obst, s);
612 obstack_printf(obst, "] ");
614 size = obstack_object_size(obst);
615 s = obstack_finish(obst);
624 * Formated print of commands and comments.
626 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
628 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
631 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
633 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
639 * Add a number to a prefix. This number will not be used a second time.
641 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
642 static unsigned long id = 0;
643 snprintf(buf, buflen, "%s%lu", prefix, ++id);
649 /*************************************************
652 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
653 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
654 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
655 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
657 *************************************************/
660 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
663 * coding of conditions
665 struct cmp2conditon_t {
671 * positive conditions for signed compares
673 static const struct cmp2conditon_t cmp2condition_s[] = {
674 { NULL, pn_Cmp_False }, /* always false */
675 { "e", pn_Cmp_Eq }, /* == */
676 { "l", pn_Cmp_Lt }, /* < */
677 { "le", pn_Cmp_Le }, /* <= */
678 { "g", pn_Cmp_Gt }, /* > */
679 { "ge", pn_Cmp_Ge }, /* >= */
680 { "ne", pn_Cmp_Lg }, /* != */
681 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
682 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
683 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
684 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
685 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
686 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
687 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
688 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
689 { NULL, pn_Cmp_True }, /* always true */
693 * positive conditions for unsigned compares
695 static const struct cmp2conditon_t cmp2condition_u[] = {
696 { NULL, pn_Cmp_False }, /* always false */
697 { "e", pn_Cmp_Eq }, /* == */
698 { "b", pn_Cmp_Lt }, /* < */
699 { "be", pn_Cmp_Le }, /* <= */
700 { "a", pn_Cmp_Gt }, /* > */
701 { "ae", pn_Cmp_Ge }, /* >= */
702 { "ne", pn_Cmp_Lg }, /* != */
703 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
704 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
705 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
706 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
707 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
708 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
709 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
710 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
711 { NULL, pn_Cmp_True }, /* always true */
715 * returns the condition code
717 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
719 assert(cmp2condition_s[cmp_code].num == cmp_code);
720 assert(cmp2condition_u[cmp_code].num == cmp_code);
722 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
726 * Returns the target block for a control flow node.
728 static ir_node *get_cfop_target_block(const ir_node *irn) {
729 return get_irn_link(irn);
733 * Returns the target label for a control flow node.
735 static char *get_cfop_target(const ir_node *irn, char *buf) {
736 ir_node *bl = get_cfop_target_block(irn);
738 snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
742 /** Return the next block in Block schedule */
743 static ir_node *next_blk_sched(const ir_node *block) {
744 return get_irn_link(block);
748 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
750 static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
751 const ir_node *proj1, *proj2 = NULL;
752 const ir_node *block, *next_bl = NULL;
753 const ir_edge_t *edge;
754 char buf[SNPRINTF_BUF_LEN];
755 char cmd_buf[SNPRINTF_BUF_LEN];
756 char cmnt_buf[SNPRINTF_BUF_LEN];
758 /* get both Proj's */
759 edge = get_irn_out_edge_first(irn);
760 proj1 = get_edge_src_irn(edge);
761 assert(is_Proj(proj1) && "CondJmp with a non-Proj");
763 edge = get_irn_out_edge_next(irn, edge);
765 proj2 = get_edge_src_irn(edge);
766 assert(is_Proj(proj2) && "CondJmp with a non-Proj");
769 /* for now, the code works for scheduled and non-schedules blocks */
770 block = get_nodes_block(irn);
772 /* we have a block schedule */
773 next_bl = next_blk_sched(block);
775 if (get_cfop_target_block(proj1) == next_bl) {
776 /* exchange both proj's so the second one can be omitted */
777 const ir_node *t = proj1;
783 /* the first Proj must always be created */
784 if (get_Proj_proj(proj1) == pn_Cond_true) {
785 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
786 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
787 get_cfop_target(proj1, buf));
788 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
791 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
792 get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
793 !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
794 get_cfop_target(proj1, buf));
795 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
799 /* the second Proj might be a fallthrough */
801 if (get_cfop_target_block(proj2) != next_bl) {
802 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
803 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
807 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrogh %s */", get_cfop_target(proj2, buf));
814 * Emits code for conditional jump.
816 static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
818 char cmd_buf[SNPRINTF_BUF_LEN];
819 char cmnt_buf[SNPRINTF_BUF_LEN];
821 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
822 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
824 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
828 * Emits code for conditional jump with two variables.
830 static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
831 CondJmp_emitter(irn, env);
835 * Emits code for conditional test and jump.
837 static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
839 #define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
842 const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
843 const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
844 char cmd_buf[SNPRINTF_BUF_LEN];
845 char cmnt_buf[SNPRINTF_BUF_LEN];
848 op2 = arch_register_get_name(get_in_reg(irn, 1));
850 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
851 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
854 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
860 * Emits code for conditional test and jump with two variables.
862 static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
863 TestJmp_emitter(irn, env);
866 static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
868 char cmd_buf[SNPRINTF_BUF_LEN];
869 char cmnt_buf[SNPRINTF_BUF_LEN];
871 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
872 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
874 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
877 static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
879 char cmd_buf[SNPRINTF_BUF_LEN];
880 char cmnt_buf[SNPRINTF_BUF_LEN];
882 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
883 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
885 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
888 /*********************************************************
891 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
892 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
893 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
894 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
897 *********************************************************/
899 /* jump table entry (target and corresponding number) */
900 typedef struct _branch_t {
905 /* jump table for switch generation */
906 typedef struct _jmp_tbl_t {
907 ir_node *defProj; /**< default target */
908 int min_value; /**< smallest switch case */
909 int max_value; /**< largest switch case */
910 int num_branches; /**< number of jumps */
911 char *label; /**< label of the jump table */
912 branch_t *branches; /**< jump array */
916 * Compare two variables of type branch_t. Used to sort all switch cases
918 static int ia32_cmp_branch_t(const void *a, const void *b) {
919 branch_t *b1 = (branch_t *)a;
920 branch_t *b2 = (branch_t *)b;
922 if (b1->value <= b2->value)
929 * Emits code for a SwitchJmp (creates a jump table if
930 * possible otherwise a cmp-jmp cascade). Port from
933 static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
934 unsigned long interval;
935 char buf[SNPRINTF_BUF_LEN];
936 int last_value, i, pn;
939 const ir_edge_t *edge;
940 const lc_arg_env_t *env = ia32_get_arg_env();
941 FILE *F = emit_env->out;
942 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
944 /* fill the table structure */
945 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
946 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
948 tbl.num_branches = get_irn_n_edges(irn);
949 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
950 tbl.min_value = INT_MAX;
951 tbl.max_value = INT_MIN;
954 /* go over all proj's and collect them */
955 foreach_out_edge(irn, edge) {
956 proj = get_edge_src_irn(edge);
957 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
959 pn = get_Proj_proj(proj);
961 /* create branch entry */
962 tbl.branches[i].target = proj;
963 tbl.branches[i].value = pn;
965 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
966 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
968 /* check for default proj */
969 if (pn == get_ia32_pncode(irn)) {
970 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
977 /* sort the branches by their number */
978 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
980 /* two-complement's magic make this work without overflow */
981 interval = tbl.max_value - tbl.min_value;
984 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
985 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
988 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
989 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
992 if (tbl.num_branches > 1) {
995 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
996 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
999 ia32_switch_section(F, SECTION_RODATA);
1000 fprintf(F, "\t.align 4\n");
1002 fprintf(F, "%s:\n", tbl.label);
1004 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
1005 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
1008 last_value = tbl.branches[0].value;
1009 for (i = 1; i < tbl.num_branches; ++i) {
1010 while (++last_value < tbl.branches[i].value) {
1011 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
1012 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
1015 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
1016 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
1019 ia32_switch_section(F, SECTION_TEXT);
1022 /* one jump is enough */
1023 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
1024 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
1035 * Emits code for a unconditional jump.
1037 static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
1038 ir_node *block, *next_bl;
1040 char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1042 /* for now, the code works for scheduled and non-schedules blocks */
1043 block = get_nodes_block(irn);
1045 /* we have a block schedule */
1046 next_bl = next_blk_sched(block);
1047 if (get_cfop_target_block(irn) != next_bl) {
1048 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
1049 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
1053 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
1058 /****************************
1061 * _ __ _ __ ___ _ ___
1062 * | '_ \| '__/ _ \| |/ __|
1063 * | |_) | | | (_) | |\__ \
1064 * | .__/|_| \___/| ||___/
1067 ****************************/
1070 * Emits code for a proj -> node
1072 static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
1073 ir_node *pred = get_Proj_pred(irn);
1075 if (get_irn_op(pred) == op_Start) {
1076 switch(get_Proj_proj(irn)) {
1077 case pn_Start_X_initial_exec:
1086 /**********************************
1089 * | | ___ _ __ _ _| |_) |
1090 * | | / _ \| '_ \| | | | _ <
1091 * | |___| (_) | |_) | |_| | |_) |
1092 * \_____\___/| .__/ \__, |____/
1095 **********************************/
1098 * Emit movsb/w instructions to make mov count divideable by 4
1100 static void emit_CopyB_prolog(FILE *F, int rem, int size) {
1101 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1103 fprintf(F, "\t/* memcopy %d bytes*/\n", size);
1105 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
1106 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
1111 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1112 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
1115 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1116 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
1119 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1120 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1122 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1123 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1131 * Emit rep movsd instruction for memcopy.
1133 static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
1134 FILE *F = emit_env->out;
1135 tarval *tv = get_ia32_Immop_tarval(irn);
1136 int rem = get_tarval_long(tv);
1137 ir_node *size_node = get_irn_n(irn, 2);
1139 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1141 /* beware: size_node could be a be_Copy to fulfill constraints for ecx */
1142 size_node = be_is_Copy(size_node) ? be_get_Copy_op(size_node) : size_node;
1143 size = get_tarval_long(get_ia32_Immop_tarval(size_node));
1145 emit_CopyB_prolog(F, rem, size);
1147 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
1148 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
1153 * Emits unrolled memcopy.
1155 static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
1156 tarval *tv = get_ia32_Immop_tarval(irn);
1157 int size = get_tarval_long(tv);
1158 FILE *F = emit_env->out;
1159 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1161 emit_CopyB_prolog(F, size & 0x3, size);
1165 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
1166 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
1173 /***************************
1177 * | | / _ \| '_ \ \ / /
1178 * | |___| (_) | | | \ V /
1179 * \_____\___/|_| |_|\_/
1181 ***************************/
1184 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1186 static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1187 FILE *F = emit_env->out;
1188 const lc_arg_env_t *env = ia32_get_arg_env();
1189 ir_mode *src_mode = get_ia32_src_mode(irn);
1190 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1191 char *from, *to, buf[64];
1192 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1194 from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
1195 to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
1197 switch(get_ia32_op_type(irn)) {
1199 lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
1201 case ia32_AddrModeS:
1202 lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
1205 assert(0 && "unsupported op type for Conv");
1208 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
1209 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
1213 static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1214 emit_ia32_Conv_with_FP(irn, emit_env);
1217 static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1218 emit_ia32_Conv_with_FP(irn, emit_env);
1221 static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1222 emit_ia32_Conv_with_FP(irn, emit_env);
1226 * Emits code for an Int conversion.
1228 static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1229 FILE *F = emit_env->out;
1230 const lc_arg_env_t *env = ia32_get_arg_env();
1231 char *move_cmd = "movzx";
1232 char *conv_cmd = NULL;
1233 ir_mode *src_mode = get_ia32_src_mode(irn);
1234 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1236 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1237 const arch_register_t *in_reg, *out_reg;
1239 n = get_mode_size_bits(src_mode);
1240 m = get_mode_size_bits(tgt_mode);
1242 if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
1244 if (n == 8 || m == 8)
1246 else if (n == 16 || m == 16)
1249 assert(0 && "unsupported Conv_I2I");
1252 switch(get_ia32_op_type(irn)) {
1254 in_reg = get_in_reg(irn, 2);
1255 out_reg = get_out_reg(irn, 0);
1257 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1258 REGS_ARE_EQUAL(out_reg, in_reg) &&
1259 mode_is_signed(n < m ? src_mode : tgt_mode))
1261 /* argument and result are both in EAX and */
1262 /* signedness is ok: -> use converts */
1263 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
1265 else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
1266 ! mode_is_signed(n < m ? src_mode : tgt_mode))
1268 /* argument and result are in the same register */
1269 /* and signedness is ok: -> use and with mask */
1270 int mask = (1 << (n < m ? n : m)) - 1;
1271 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
1274 /* use move w/o sign extension */
1275 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
1276 move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
1280 case ia32_AddrModeS:
1281 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
1282 move_cmd, irn, ia32_emit_am(irn, emit_env));
1285 assert(0 && "unsupported op type for Conv");
1288 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
1289 irn, n, src_mode, m, tgt_mode);
1295 * Emits code for an 8Bit Int conversion.
1297 void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
1298 emit_ia32_Conv_I2I(irn, emit_env);
1302 /*******************************************
1305 * | |__ ___ _ __ ___ __| | ___ ___
1306 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1307 * | |_) | __/ | | | (_) | (_| | __/\__ \
1308 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1310 *******************************************/
1313 * Emits a backend call
1315 static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
1316 FILE *F = emit_env->out;
1317 entity *ent = be_Call_get_entity(irn);
1318 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1321 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
1324 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
1327 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
1333 * Emits code to increase stack pointer.
1335 static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1336 FILE *F = emit_env->out;
1337 unsigned offs = be_get_IncSP_offset(irn);
1338 be_stack_dir_t dir = be_get_IncSP_direction(irn);
1339 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1342 if (dir == be_stack_dir_expand)
1343 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
1345 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
1346 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
1349 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
1350 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
1357 * Emits code to set stack pointer.
1359 static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1360 FILE *F = emit_env->out;
1361 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1363 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1364 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
1369 * Emits code for Copy.
1371 static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
1372 FILE *F = emit_env->out;
1373 const arch_env_t *aenv = emit_env->arch_env;
1374 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1376 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))))
1379 if (mode_is_float(get_irn_mode(irn)))
1380 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
1382 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
1383 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1388 * Emits code for exchange.
1390 static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
1391 FILE *F = emit_env->out;
1392 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1394 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
1395 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
1400 * Emits code for Constant loading.
1402 static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) {
1404 char cmd_buf[256], cmnt_buf[256];
1405 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1407 if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) {
1408 const char *instr = "xor";
1409 if (env->isa->opt_arch == arch_pentium_4) {
1410 /* P4 prefers sub r, r, others xor r, r */
1413 lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n);
1414 lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */");
1417 if (get_ia32_op_type(n) == ia32_SymConst) {
1418 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n);
1419 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */");
1422 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n);
1423 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */");
1426 lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n);
1431 /***********************************************************************************
1434 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1435 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1436 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1437 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1439 ***********************************************************************************/
1442 * Enters the emitter functions for handled nodes into the generic
1443 * pointer of an opcode.
1445 static void ia32_register_emitters(void) {
1447 #define IA32_EMIT(a) op_ia32_##a->ops.generic = (op_func)emit_ia32_##a
1448 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1449 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1451 /* first clear the generic function pointer for all ops */
1452 clear_irp_opcodes_generic_func();
1454 /* register all emitter functions defined in spec */
1455 ia32_register_spec_emitters();
1457 /* other ia32 emitter functions */
1462 IA32_EMIT(SwitchJmp);
1465 IA32_EMIT(Conv_I2FP);
1466 IA32_EMIT(Conv_FP2I);
1467 IA32_EMIT(Conv_FP2FP);
1468 IA32_EMIT(Conv_I2I);
1469 IA32_EMIT(Conv_I2I8Bit);
1472 /* benode emitter */
1489 * Emits code for a node.
1491 static void ia32_emit_node(const ir_node *irn, void *env) {
1492 ia32_emit_env_t *emit_env = env;
1493 FILE *F = emit_env->out;
1494 ir_op *op = get_irn_op(irn);
1495 DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
1497 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
1499 if (op->ops.generic) {
1500 void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
1504 ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
1509 * Walks over the nodes in a block connected by scheduling edges
1510 * and emits code for each node.
1512 static void ia32_gen_block(ir_node *block, void *env) {
1515 if (! is_Block(block))
1518 fprintf(((ia32_emit_env_t *)env)->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
1519 sched_foreach(block, irn) {
1520 ia32_emit_node(irn, env);
1525 * Emits code for function start.
1527 static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
1528 entity *irg_ent = get_irg_entity(irg);
1529 const char *irg_name = get_entity_ld_name(irg_ent);
1532 ia32_switch_section(F, SECTION_TEXT);
1533 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1534 fprintf(F, ".globl %s\n", irg_name);
1536 ia32_dump_function_object(F, irg_name);
1537 fprintf(F, "%s:\n", irg_name);
1541 * Emits code for function end
1543 static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
1544 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
1546 fprintf(F, "\tret\n");
1547 ia32_dump_function_size(F, irg_name);
1553 * Sets labels for control flow nodes (jump target)
1554 * TODO: Jump optimization
1556 static void ia32_gen_labels(ir_node *block, void *env) {
1558 int n = get_Block_n_cfgpreds(block);
1560 for (n--; n >= 0; n--) {
1561 pred = get_Block_cfgpred(block, n);
1562 set_irn_link(pred, block);
1567 * Main driver. Emits the code for one routine.
1569 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
1570 ia32_emit_env_t emit_env;
1574 emit_env.arch_env = cg->arch_env;
1576 emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
1577 FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
1579 /* set the global arch_env (needed by print hooks) */
1580 arch_env = cg->arch_env;
1582 ia32_register_emitters();
1584 ia32_emit_func_prolog(F, irg);
1585 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
1587 if ((cg->opt & IA32_OPT_EXTBB) && cg->blk_sched) {
1588 int i, n = ARR_LEN(cg->blk_sched);
1590 for (i = 0; i < n;) {
1593 block = cg->blk_sched[i];
1595 next_bl = i < n ? cg->blk_sched[i] : NULL;
1597 /* set here the link. the emitter expects to find the next block here */
1598 set_irn_link(block, next_bl);
1599 ia32_gen_block(block, &emit_env);
1603 /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
1604 in the block schedule. As this number should NEVER be equal the next block,
1605 we does not need a clear block link here. */
1606 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
1609 ia32_emit_func_epilog(F, irg);