2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 if(reg == &ia32_gp_regs[REG_GP_NOREG])
90 panic("trying to emit noreg");
92 /* in case of unknown register: just return a valid register */
93 if (reg == &ia32_gp_regs[REG_GP_UKNWN]) {
94 const arch_register_req_t *req;
96 /* ask for the requirements */
97 req = arch_get_register_req(arch_env, irn, pos);
99 if (arch_register_req_is(req, limited)) {
100 /* in case of limited requirements: get the first allowed register */
101 unsigned idx = rbitset_next(req->limited, 0, 1);
102 reg = arch_register_for_index(req->cls, idx);
104 /* otherwise get first register in class */
105 reg = arch_register_for_index(req->cls, 0);
113 * Returns the register at out position pos.
116 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
119 const arch_env_t *arch_env = env->arch_env;
121 const arch_register_t *reg = NULL;
123 /* 1st case: irn is not of mode_T, so it has only */
124 /* one OUT register -> good */
125 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
126 /* Proj with the corresponding projnum for the register */
128 if (get_irn_mode(irn) != mode_T) {
129 reg = arch_get_irn_register(arch_env, irn);
130 } else if (is_ia32_irn(irn)) {
131 reg = get_ia32_out_reg(irn, pos);
133 const ir_edge_t *edge;
135 foreach_out_edge(irn, edge) {
136 proj = get_edge_src_irn(edge);
137 assert(is_Proj(proj) && "non-Proj from mode_T node");
138 if (get_Proj_proj(proj) == pos) {
139 reg = arch_get_irn_register(arch_env, proj);
145 assert(reg && "no out register found");
150 * Determine the gnu assembler suffix that indicates a mode
153 char get_mode_suffix(const ir_mode *mode) {
154 if(mode_is_float(mode)) {
155 switch(get_mode_size_bits(mode)) {
165 assert(mode_is_int(mode) || mode_is_reference(mode));
166 switch(get_mode_size_bits(mode)) {
177 panic("Can't output mode_suffix for %+F\n", mode);
181 int produces_result(const ir_node *node) {
183 !is_ia32_CmpSet(node) &&
184 !is_ia32_CondJmp(node) &&
186 !is_ia32_SwitchJmp(node) &&
187 !is_ia32_TestJmp(node) &&
188 !is_ia32_xCmpSet(node) &&
189 !is_ia32_xCondJmp(node) &&
190 !is_ia32_CmpCMov(node) &&
191 !is_ia32_TestCMov(node) &&
192 !is_ia32_CmpSet(node) && /* this is correct, the Cmp has no result */
193 !is_ia32_TestSet(node);
197 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
198 const arch_register_t *reg) {
199 switch(get_mode_size_bits(mode)) {
201 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
203 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
205 return (char *)arch_register_get_name(reg);
210 * Add a number to a prefix. This number will not be used a second time.
213 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
214 static unsigned long id = 0;
215 snprintf(buf, buflen, "%s%lu", prefix, ++id);
219 /*************************************************************
221 * (_) | | / _| | | | |
222 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
223 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
224 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
225 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
228 *************************************************************/
230 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
231 // be_emit_env_t* so we cheat a bit...
232 #define be_emit_char(env,c) be_emit_char(env->emit,c)
233 #define be_emit_string(env,s) be_emit_string(env->emit,s)
234 #undef be_emit_cstring
235 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
236 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
237 #define be_emit_tarval(env,tv) be_emit_tarval(env->emit,tv)
238 #define be_emit_write_line(env) be_emit_write_line(env->emit)
239 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
240 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
242 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
244 const arch_register_t *reg = get_in_reg(env, node, pos);
245 const char *reg_name = arch_register_get_name(reg);
247 assert(pos < get_irn_arity(node));
249 be_emit_char(env, '%');
250 be_emit_string(env, reg_name);
253 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
254 const arch_register_t *reg = get_out_reg(env, node, pos);
255 const char *reg_name = arch_register_get_name(reg);
257 be_emit_char(env, '%');
258 be_emit_string(env, reg_name);
261 static void ia32_emit_register(ia32_emit_env_t *env, const arch_register_t *reg)
263 const char *reg_name = arch_register_get_name(reg);
265 be_emit_char(env, '%');
266 be_emit_string(env, reg_name);
269 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
271 const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
274 be_emit_char(env, '%');
275 be_emit_string(env, attr->x87[pos]->name);
278 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
284 be_emit_char(env, '$');
286 switch(get_ia32_immop_type(node)) {
288 tv = get_ia32_Immop_tarval(node);
289 be_emit_tarval(env, tv);
291 case ia32_ImmSymConst:
292 ent = get_ia32_Immop_symconst(node);
293 set_entity_backend_marked(ent, 1);
294 id = get_entity_ld_ident(ent);
295 be_emit_ident(env, id);
302 be_emit_string(env, "BAD");
307 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
309 be_emit_char(env, get_mode_suffix(mode));
312 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
314 ir_mode *mode = get_ia32_ls_mode(node);
318 ia32_emit_mode_suffix_mode(env, mode);
321 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
323 ir_mode *mode = get_ia32_ls_mode(node);
325 ia32_emit_mode_suffix_mode(env, mode);
329 char get_xmm_mode_suffix(ir_mode *mode)
331 assert(mode_is_float(mode));
332 switch(get_mode_size_bits(mode)) {
343 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
345 ir_mode *mode = get_ia32_ls_mode(node);
346 assert(mode != NULL);
347 be_emit_char(env, 's');
348 be_emit_char(env, get_xmm_mode_suffix(mode));
351 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
353 ir_mode *mode = get_ia32_ls_mode(node);
354 assert(mode != NULL);
355 be_emit_char(env, get_xmm_mode_suffix(mode));
358 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
360 if(get_mode_size_bits(mode) == 32)
362 if(mode_is_signed(mode)) {
363 be_emit_char(env, 's');
365 be_emit_char(env, 'z');
370 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
372 switch (be_gas_flavour) {
373 case GAS_FLAVOUR_NORMAL:
374 be_emit_cstring(env, "\t.type\t");
375 be_emit_string(env, name);
376 be_emit_cstring(env, ", @function\n");
377 be_emit_write_line(env);
379 case GAS_FLAVOUR_MINGW:
380 be_emit_cstring(env, "\t.def\t");
381 be_emit_string(env, name);
382 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
383 be_emit_write_line(env);
391 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
393 switch (be_gas_flavour) {
394 case GAS_FLAVOUR_NORMAL:
395 be_emit_cstring(env, "\t.size\t");
396 be_emit_string(env, name);
397 be_emit_cstring(env, ", .-");
398 be_emit_string(env, name);
399 be_emit_char(env, '\n');
400 be_emit_write_line(env);
409 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node);
412 * Emits registers and/or address mode of a binary operation.
414 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
416 const ir_node *right_op = get_irn_n(node, 3);
418 switch(get_ia32_op_type(node)) {
420 if(is_ia32_Immediate(right_op)) {
421 emit_ia32_Immediate(env, right_op);
422 be_emit_cstring(env, ", ");
423 ia32_emit_source_register(env, node, 2);
425 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
426 ia32_emit_immediate(env, node);
427 be_emit_cstring(env, ", ");
428 ia32_emit_source_register(env, node, 2);
430 const arch_register_t *in1 = get_in_reg(env, node, 2);
431 const arch_register_t *in2 = get_in_reg(env, node, 3);
432 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
433 const arch_register_t *in;
436 in = out ? ((out == in2) ? in1 : in2) : in2;
437 out = out ? out : in1;
438 in_name = arch_register_get_name(in);
440 if (is_ia32_emit_cl(node)) {
441 assert(in == &ia32_gp_regs[REG_ECX]);
445 be_emit_char(env, '%');
446 be_emit_string(env, in_name);
447 be_emit_cstring(env, ", %");
448 be_emit_string(env, arch_register_get_name(out));
452 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
453 assert(!produces_result(node) &&
454 "Source AM with Const must not produce result");
455 ia32_emit_immediate(env, node);
456 be_emit_cstring(env, ", ");
457 ia32_emit_am(env, node);
458 } else if(is_ia32_Immediate(right_op)) {
459 assert(!produces_result(node) &&
460 "Source AM with Const must not produce result");
462 emit_ia32_Immediate(env, right_op);
463 be_emit_cstring(env, ", ");
464 ia32_emit_am(env, node);
465 } else if (produces_result(node)) {
466 ia32_emit_am(env, node);
467 be_emit_cstring(env, ", ");
468 ia32_emit_dest_register(env, node, 0);
470 ia32_emit_am(env, node);
471 be_emit_cstring(env, ", ");
472 ia32_emit_source_register(env, node, 2);
476 right_pos = get_irn_arity(node) >= 5 ? 3 : 2;
477 right_op = get_irn_n(node, right_pos);
478 if(is_ia32_Immediate(right_op)) {
479 emit_ia32_Immediate(env, right_op);
480 be_emit_cstring(env, ", ");
481 ia32_emit_am(env, node);
483 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
484 ia32_emit_immediate(env, node);
485 be_emit_cstring(env, ", ");
486 ia32_emit_am(env, node);
488 const arch_register_t *in1 = get_in_reg(env, node, right_pos);
489 ir_mode *mode = get_ia32_ls_mode(node);
492 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
494 if (is_ia32_emit_cl(node)) {
495 assert(in1 == &ia32_gp_regs[REG_ECX]);
499 be_emit_char(env, '%');
500 be_emit_string(env, in_name);
501 be_emit_cstring(env, ", ");
502 ia32_emit_am(env, node);
506 assert(0 && "unsupported op type");
511 * Emits registers and/or address mode of a binary operation.
513 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
514 switch(get_ia32_op_type(node)) {
516 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
517 // should not happen...
520 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
521 const arch_register_t *in1 = x87_attr->x87[0];
522 const arch_register_t *in2 = x87_attr->x87[1];
523 const arch_register_t *out = x87_attr->x87[2];
524 const arch_register_t *in;
526 in = out ? ((out == in2) ? in1 : in2) : in2;
527 out = out ? out : in1;
529 be_emit_char(env, '%');
530 be_emit_string(env, arch_register_get_name(in));
531 be_emit_cstring(env, ", %");
532 be_emit_string(env, arch_register_get_name(out));
537 ia32_emit_am(env, node);
540 assert(0 && "unsupported op type");
544 void ia32_emit_am_or_dest_register(ia32_emit_env_t *env, const ir_node *node,
546 if(get_ia32_op_type(node) == ia32_Normal) {
547 ia32_emit_dest_register(env, node, pos);
549 assert(get_ia32_op_type(node) == ia32_AddrModeD);
550 ia32_emit_am(env, node);
555 * Emits registers and/or address mode of a unary operation.
557 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node, int pos) {
560 switch(get_ia32_op_type(node)) {
562 op = get_irn_n(node, pos);
563 if (is_ia32_Immediate(op)) {
564 emit_ia32_Immediate(env, op);
565 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
566 ia32_emit_immediate(env, node);
568 ia32_emit_source_register(env, node, pos);
573 ia32_emit_am(env, node);
576 assert(0 && "unsupported op type");
581 * Emits address mode.
583 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
584 ir_entity *ent = get_ia32_am_sc(node);
585 int offs = get_ia32_am_offs_int(node);
586 ir_node *base = get_irn_n(node, 0);
587 int has_base = !is_ia32_NoReg_GP(base);
588 ir_node *index = get_irn_n(node, 1);
589 int has_index = !is_ia32_NoReg_GP(index);
591 /* just to be sure... */
592 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
598 set_entity_backend_marked(ent, 1);
599 id = get_entity_ld_ident(ent);
600 if (is_ia32_am_sc_sign(node))
601 be_emit_char(env, '-');
602 be_emit_ident(env, id);
604 if(get_entity_owner(ent) == get_tls_type()) {
605 if (get_entity_visibility(ent) == visibility_external_allocated) {
606 be_emit_cstring(env, "@INDNTPOFF");
608 be_emit_cstring(env, "@NTPOFF");
615 be_emit_irprintf(env->emit, "%+d", offs);
617 be_emit_irprintf(env->emit, "%d", offs);
621 if (has_base || has_index) {
622 be_emit_char(env, '(');
626 ia32_emit_source_register(env, node, 0);
629 /* emit index + scale */
632 be_emit_char(env, ',');
633 ia32_emit_source_register(env, node, 1);
635 scale = get_ia32_am_scale(node);
637 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
640 be_emit_char(env, ')');
644 /*************************************************
647 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
648 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
649 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
650 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
652 *************************************************/
655 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
658 * coding of conditions
660 struct cmp2conditon_t {
666 * positive conditions for signed compares
669 const struct cmp2conditon_t cmp2condition_s[] = {
670 { NULL, pn_Cmp_False }, /* always false */
671 { "e", pn_Cmp_Eq }, /* == */
672 { "l", pn_Cmp_Lt }, /* < */
673 { "le", pn_Cmp_Le }, /* <= */
674 { "g", pn_Cmp_Gt }, /* > */
675 { "ge", pn_Cmp_Ge }, /* >= */
676 { "ne", pn_Cmp_Lg }, /* != */
677 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
681 * positive conditions for unsigned compares
684 const struct cmp2conditon_t cmp2condition_u[] = {
685 { NULL, pn_Cmp_False }, /* always false */
686 { "e", pn_Cmp_Eq }, /* == */
687 { "b", pn_Cmp_Lt }, /* < */
688 { "be", pn_Cmp_Le }, /* <= */
689 { "a", pn_Cmp_Gt }, /* > */
690 { "ae", pn_Cmp_Ge }, /* >= */
691 { "ne", pn_Cmp_Lg }, /* != */
692 { NULL, pn_Cmp_True }, /* always true */
696 * returns the condition code
699 const char *get_cmp_suffix(pn_Cmp cmp_code)
701 assert( (cmp2condition_s[cmp_code & 7].num) == (cmp_code & 7));
702 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
704 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
705 return cmp2condition_u[cmp_code & 7].name;
707 return cmp2condition_s[cmp_code & 7].name;
711 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
713 be_emit_string(env, get_cmp_suffix(pnc));
718 * Returns the target block for a control flow node.
721 ir_node *get_cfop_target_block(const ir_node *irn) {
722 return get_irn_link(irn);
726 * Emits a block label for the given block.
729 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
731 be_emit_cstring(env, BLOCK_PREFIX);
732 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
736 * Emits the target label for a control flow node.
739 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
740 ir_node *block = get_cfop_target_block(node);
742 ia32_emit_block_name(env, block);
745 /** Return the next block in Block schedule */
746 static ir_node *next_blk_sched(const ir_node *block) {
747 return get_irn_link(block);
751 * Returns the Proj with projection number proj and NOT mode_M
754 ir_node *get_proj(const ir_node *node, long proj) {
755 const ir_edge_t *edge;
758 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
760 foreach_out_edge(node, edge) {
761 src = get_edge_src_irn(edge);
763 assert(is_Proj(src) && "Proj expected");
764 if (get_irn_mode(src) == mode_M)
767 if (get_Proj_proj(src) == proj)
774 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
777 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
779 const ir_node *proj_true;
780 const ir_node *proj_false;
781 const ir_node *block;
782 const ir_node *next_block;
785 /* get both Proj's */
786 proj_true = get_proj(node, pn_Cond_true);
787 assert(proj_true && "CondJmp without true Proj");
789 proj_false = get_proj(node, pn_Cond_false);
790 assert(proj_false && "CondJmp without false Proj");
792 /* for now, the code works for scheduled and non-schedules blocks */
793 block = get_nodes_block(node);
795 /* we have a block schedule */
796 next_block = next_blk_sched(block);
798 if (get_cfop_target_block(proj_true) == next_block) {
799 /* exchange both proj's so the second one can be omitted */
800 const ir_node *t = proj_true;
802 proj_true = proj_false;
805 pnc = get_negated_pnc(pnc, mode);
808 if (mode_is_float(mode)) {
809 /* Some floating point comparisons require a test of the parity flag, which
810 * indicates that the result is unordered */
813 be_emit_cstring(env, "\tjp ");
814 ia32_emit_cfop_target(env, proj_true);
815 be_emit_finish_line_gas(env, proj_true);
819 be_emit_cstring(env, "\tjnp ");
820 ia32_emit_cfop_target(env, proj_true);
821 be_emit_finish_line_gas(env, proj_true);
827 be_emit_cstring(env, "\tjp ");
828 ia32_emit_cfop_target(env, proj_false);
829 be_emit_finish_line_gas(env, proj_false);
835 be_emit_cstring(env, "\tjp ");
836 ia32_emit_cfop_target(env, proj_true);
837 be_emit_finish_line_gas(env, proj_true);
842 /* The bits set by floating point compares correspond to unsigned
844 pnc |= ia32_pn_Cmp_Unsigned;
849 be_emit_cstring(env, "\tj");
850 ia32_emit_cmp_suffix(env, pnc);
851 be_emit_char(env, ' ');
852 ia32_emit_cfop_target(env, proj_true);
853 be_emit_finish_line_gas(env, proj_true);
856 /* the second Proj might be a fallthrough */
857 if (get_cfop_target_block(proj_false) != next_block) {
858 be_emit_cstring(env, "\tjmp ");
859 ia32_emit_cfop_target(env, proj_false);
860 be_emit_finish_line_gas(env, proj_false);
862 be_emit_cstring(env, "\t/* fallthrough to ");
863 ia32_emit_cfop_target(env, proj_false);
864 be_emit_cstring(env, " */");
865 be_emit_finish_line_gas(env, proj_false);
870 * Emits code for conditional jump.
873 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
874 be_emit_cstring(env, "\tcmp");
875 ia32_emit_mode_suffix(env, node);
876 be_emit_char(env, ' ');
877 ia32_emit_binop(env, node);
878 be_emit_finish_line_gas(env, node);
880 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
884 * Emits code for conditional jump with two variables.
887 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
888 CondJmp_emitter(env, node);
892 * Emits code for conditional test and jump.
895 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
896 be_emit_cstring(env, "\ttest");
897 ia32_emit_mode_suffix(env, node);
898 be_emit_char(env, ' ');
900 ia32_emit_binop(env, node);
901 be_emit_finish_line_gas(env, node);
903 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
907 * Emits code for conditional test and jump with two variables.
910 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
911 TestJmp_emitter(env, node);
915 * Emits code for conditional SSE floating point jump with two variables.
918 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
919 be_emit_cstring(env, "\tucomi");
920 ia32_emit_xmm_mode_suffix(env, node);
921 be_emit_char(env, ' ');
922 ia32_emit_binop(env, node);
923 be_emit_finish_line_gas(env, node);
925 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
929 * Emits code for conditional x87 floating point jump with two variables.
932 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
933 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
934 const char *reg = x87_attr->x87[1]->name;
935 long pnc = get_ia32_pncode(node);
937 switch (get_ia32_irn_opcode(node)) {
938 case iro_ia32_fcomrJmp:
939 pnc = get_inversed_pnc(pnc);
940 reg = x87_attr->x87[0]->name;
941 case iro_ia32_fcomJmp:
943 be_emit_cstring(env, "\tfucom ");
945 case iro_ia32_fcomrpJmp:
946 pnc = get_inversed_pnc(pnc);
947 reg = x87_attr->x87[0]->name;
948 case iro_ia32_fcompJmp:
949 be_emit_cstring(env, "\tfucomp ");
951 case iro_ia32_fcomrppJmp:
952 pnc = get_inversed_pnc(pnc);
953 case iro_ia32_fcomppJmp:
954 be_emit_cstring(env, "\tfucompp ");
960 be_emit_char(env, '%');
961 be_emit_string(env, reg);
963 be_emit_finish_line_gas(env, node);
965 be_emit_cstring(env, "\tfnstsw %ax");
966 be_emit_finish_line_gas(env, node);
967 be_emit_cstring(env, "\tsahf");
968 be_emit_finish_line_gas(env, node);
970 finish_CondJmp(env, node, mode_E, pnc);
974 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node)
976 const arch_register_t *in1, *in2, *out;
977 long pnc = get_ia32_pncode(node);
979 out = arch_get_irn_register(env->arch_env, node);
981 /* we have to emit the cmp first, because the destination register */
982 /* could be one of the compare registers */
983 if (is_ia32_xCmpCMov(node)) {
984 be_emit_cstring(env, "\tucomis");
985 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
986 be_emit_char(env, ' ');
987 ia32_emit_source_register(env, node, 1);
988 be_emit_cstring(env, ", ");
989 ia32_emit_source_register(env, node, 0);
991 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 2));
992 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 3));
994 if (is_ia32_CmpCMov(node)) {
995 be_emit_cstring(env, "\tcmp ");
997 assert(is_ia32_TestCMov(node));
998 be_emit_cstring(env, "\ttest ");
1000 ia32_emit_binop(env, node);
1002 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 5));
1003 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 6));
1005 be_emit_finish_line_gas(env, node);
1008 /* best case: default in == out -> do nothing */
1009 } else if(in2 == &ia32_gp_regs[REG_GP_UKNWN]) {
1010 /* also nothign to do for unknown regs */
1011 } else if (out == in1) {
1012 const arch_register_t *t;
1013 /* true in == out -> need complement compare and exchange true and
1018 pnc = get_negated_pnc(pnc, get_irn_mode(node));
1020 /* out is different from both ins: need copy default -> out */
1021 be_emit_cstring(env, "\tmovl ");
1022 ia32_emit_register(env, in2);
1023 be_emit_cstring(env, ", ");
1024 ia32_emit_register(env, out);
1025 be_emit_finish_line_gas(env, node);
1028 be_emit_cstring(env, "\tcmov");
1029 ia32_emit_cmp_suffix(env, pnc );
1030 be_emit_cstring(env, "l ");
1031 ia32_emit_register(env, in1);
1032 be_emit_cstring(env, ", ");
1033 ia32_emit_register(env, out);
1035 be_emit_finish_line_gas(env, node);
1039 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node)
1041 CMov_emitter(env, node);
1045 void emit_ia32_TestCMov(ia32_emit_env_t *env, const ir_node *node)
1047 CMov_emitter(env, node);
1051 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node)
1053 CMov_emitter(env, node);
1057 void Set_emitter(ia32_emit_env_t *env, const ir_node *node)
1059 long pnc = get_ia32_pncode(node);
1060 const char *reg8bit;
1061 const arch_register_t *out;
1063 out = arch_get_irn_register(env->arch_env, node);
1064 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1066 if(is_ia32_xCmpSet(node)) {
1067 be_emit_cstring(env, "\tucomis");
1068 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1069 be_emit_char(env, ' ');
1070 ia32_emit_binop(env, node);
1072 if (is_ia32_CmpSet(node)) {
1073 be_emit_cstring(env, "\tcmp ");
1075 assert(is_ia32_TestSet(node));
1076 be_emit_cstring(env, "\ttest ");
1078 ia32_emit_binop(env, node);
1080 be_emit_finish_line_gas(env, node);
1082 /* use mov to clear target because it doesn't affect the eflags */
1083 be_emit_cstring(env, "\tmovl $0, %");
1084 be_emit_string(env, arch_register_get_name(out));
1085 be_emit_finish_line_gas(env, node);
1087 be_emit_cstring(env, "\tset");
1088 ia32_emit_cmp_suffix(env, pnc);
1089 be_emit_cstring(env, " %");
1090 be_emit_string(env, reg8bit);
1091 be_emit_finish_line_gas(env, node);
1095 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1096 Set_emitter(env, node);
1100 void emit_ia32_TestSet(ia32_emit_env_t *env, const ir_node *node) {
1101 Set_emitter(env, node);
1105 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1106 Set_emitter(env, node);
1110 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1112 long pnc = get_ia32_pncode(node);
1113 long unord = pnc & pn_Cmp_Uo;
1115 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1118 case pn_Cmp_Leg: /* odered */
1121 case pn_Cmp_Uo: /* unordered */
1125 case pn_Cmp_Eq: /* == */
1129 case pn_Cmp_Lt: /* < */
1133 case pn_Cmp_Le: /* <= */
1137 case pn_Cmp_Gt: /* > */
1141 case pn_Cmp_Ge: /* >= */
1145 case pn_Cmp_Lg: /* != */
1150 assert(sse_pnc >= 0 && "unsupported compare");
1152 if (unord && sse_pnc != 3) {
1154 We need a separate compare against unordered.
1155 Quick and Dirty solution:
1156 - get some memory on stack
1160 - and result and stored result
1163 be_emit_cstring(env, "\tsubl $8, %esp");
1164 be_emit_finish_line_gas(env, node);
1166 be_emit_cstring(env, "\tcmpsd $3, ");
1167 ia32_emit_binop(env, node);
1168 be_emit_finish_line_gas(env, node);
1170 be_emit_cstring(env, "\tmovsd ");
1171 ia32_emit_dest_register(env, node, 0);
1172 be_emit_cstring(env, ", (%esp)");
1173 be_emit_finish_line_gas(env, node);
1176 be_emit_cstring(env, "\tcmpsd ");
1177 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1178 ia32_emit_binop(env, node);
1179 be_emit_finish_line_gas(env, node);
1181 if (unord && sse_pnc != 3) {
1182 be_emit_cstring(env, "\tandpd (%esp), ");
1183 ia32_emit_dest_register(env, node, 0);
1184 be_emit_finish_line_gas(env, node);
1186 be_emit_cstring(env, "\taddl $8, %esp");
1187 be_emit_finish_line_gas(env, node);
1191 /*********************************************************
1194 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1195 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1196 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1197 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1200 *********************************************************/
1202 /* jump table entry (target and corresponding number) */
1203 typedef struct _branch_t {
1208 /* jump table for switch generation */
1209 typedef struct _jmp_tbl_t {
1210 ir_node *defProj; /**< default target */
1211 long min_value; /**< smallest switch case */
1212 long max_value; /**< largest switch case */
1213 long num_branches; /**< number of jumps */
1214 char *label; /**< label of the jump table */
1215 branch_t *branches; /**< jump array */
1219 * Compare two variables of type branch_t. Used to sort all switch cases
1222 int ia32_cmp_branch_t(const void *a, const void *b) {
1223 branch_t *b1 = (branch_t *)a;
1224 branch_t *b2 = (branch_t *)b;
1226 if (b1->value <= b2->value)
1233 * Emits code for a SwitchJmp (creates a jump table if
1234 * possible otherwise a cmp-jmp cascade). Port from
1238 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1239 unsigned long interval;
1244 const ir_edge_t *edge;
1246 /* fill the table structure */
1247 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1248 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1250 tbl.num_branches = get_irn_n_edges(node);
1251 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1252 tbl.min_value = INT_MAX;
1253 tbl.max_value = INT_MIN;
1256 /* go over all proj's and collect them */
1257 foreach_out_edge(node, edge) {
1258 proj = get_edge_src_irn(edge);
1259 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1261 pnc = get_Proj_proj(proj);
1263 /* create branch entry */
1264 tbl.branches[i].target = proj;
1265 tbl.branches[i].value = pnc;
1267 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1268 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1270 /* check for default proj */
1271 if (pnc == get_ia32_pncode(node)) {
1272 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1279 /* sort the branches by their number */
1280 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1282 /* two-complement's magic make this work without overflow */
1283 interval = tbl.max_value - tbl.min_value;
1285 /* emit the table */
1286 be_emit_cstring(env, "\tcmpl $");
1287 be_emit_irprintf(env->emit, "%u, ", interval);
1288 ia32_emit_source_register(env, node, 0);
1289 be_emit_finish_line_gas(env, node);
1291 be_emit_cstring(env, "\tja ");
1292 ia32_emit_cfop_target(env, tbl.defProj);
1293 be_emit_finish_line_gas(env, node);
1295 if (tbl.num_branches > 1) {
1297 be_emit_cstring(env, "\tjmp *");
1298 be_emit_string(env, tbl.label);
1299 be_emit_cstring(env, "(,");
1300 ia32_emit_source_register(env, node, 0);
1301 be_emit_cstring(env, ",4)");
1302 be_emit_finish_line_gas(env, node);
1304 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1305 be_emit_cstring(env, "\t.align 4\n");
1306 be_emit_write_line(env);
1308 be_emit_string(env, tbl.label);
1309 be_emit_cstring(env, ":\n");
1310 be_emit_write_line(env);
1312 be_emit_cstring(env, ".long ");
1313 ia32_emit_cfop_target(env, tbl.branches[0].target);
1314 be_emit_finish_line_gas(env, NULL);
1316 last_value = tbl.branches[0].value;
1317 for (i = 1; i < tbl.num_branches; ++i) {
1318 while (++last_value < tbl.branches[i].value) {
1319 be_emit_cstring(env, ".long ");
1320 ia32_emit_cfop_target(env, tbl.defProj);
1321 be_emit_finish_line_gas(env, NULL);
1323 be_emit_cstring(env, ".long ");
1324 ia32_emit_cfop_target(env, tbl.branches[i].target);
1325 be_emit_finish_line_gas(env, NULL);
1327 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1329 /* one jump is enough */
1330 be_emit_cstring(env, "\tjmp ");
1331 ia32_emit_cfop_target(env, tbl.branches[0].target);
1332 be_emit_finish_line_gas(env, node);
1342 * Emits code for a unconditional jump.
1345 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1346 ir_node *block, *next_block;
1348 /* for now, the code works for scheduled and non-schedules blocks */
1349 block = get_nodes_block(node);
1351 /* we have a block schedule */
1352 next_block = next_blk_sched(block);
1353 if (get_cfop_target_block(node) != next_block) {
1354 be_emit_cstring(env, "\tjmp ");
1355 ia32_emit_cfop_target(env, node);
1357 be_emit_cstring(env, "\t/* fallthrough to ");
1358 ia32_emit_cfop_target(env, node);
1359 be_emit_cstring(env, " */");
1361 be_emit_finish_line_gas(env, node);
1365 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node)
1367 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
1369 be_emit_char(env, '$');
1370 if(attr->symconst != NULL) {
1371 ident *id = get_entity_ld_ident(attr->symconst);
1373 if(attr->attr.data.am_sc_sign)
1374 be_emit_char(env, '-');
1375 be_emit_ident(env, id);
1377 if(attr->symconst == NULL || attr->offset != 0) {
1378 if(attr->symconst != NULL)
1379 be_emit_char(env, '+');
1380 be_emit_irprintf(env->emit, "%d", attr->offset);
1385 const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
1388 const arch_register_t *reg;
1389 const char *reg_name;
1393 const ia32_attr_t *attr;
1400 /* parse modifiers */
1403 ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node);
1404 be_emit_char(env, '%');
1407 be_emit_char(env, '%');
1427 ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier "
1428 "'%c' for asm op\n", node, c);
1434 sscanf(s, "%d%n", &num, &p);
1436 ir_fprintf(stderr, "Warning: Couldn't parse assembler operand (%+F)\n",
1444 attr = get_ia32_attr_const(node);
1445 n_outs = ARR_LEN(attr->slots);
1447 reg = get_out_reg(env, node, num);
1450 int in = num - n_outs;
1451 if(in >= get_irn_arity(node)) {
1452 ir_fprintf(stderr, "Warning: Invalid input %d specified in asm "
1453 "op (%+F)\n", num, node);
1456 pred = get_irn_n(node, in);
1457 /* might be an immediate value */
1458 if(is_ia32_Immediate(pred)) {
1459 emit_ia32_Immediate(env, pred);
1462 reg = get_in_reg(env, node, in);
1465 ir_fprintf(stderr, "Warning: no register assigned for %d asm op "
1466 "(%+F)\n", num, node);
1471 be_emit_char(env, '%');
1474 reg_name = arch_register_get_name(reg);
1477 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
1480 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit_high, reg);
1483 reg_name = ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
1486 panic("Invalid asm op modifier");
1488 be_emit_string(env, reg_name);
1494 * Emits code for an ASM pseudo op.
1497 void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node)
1499 const void *gen_attr = get_irn_generic_attr_const(node);
1500 const ia32_asm_attr_t *attr
1501 = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, gen_attr);
1502 ident *asm_text = attr->asm_text;
1503 const char *s = get_id_str(asm_text);
1505 be_emit_cstring(env, "# Begin ASM \t");
1506 be_emit_finish_line_gas(env, node);
1509 be_emit_char(env, '\t');
1513 s = emit_asm_operand(env, node, s);
1516 be_emit_char(env, *s);
1521 be_emit_char(env, '\n');
1522 be_emit_write_line(env);
1524 be_emit_cstring(env, "# End ASM\n");
1525 be_emit_write_line(env);
1528 /**********************************
1531 * | | ___ _ __ _ _| |_) |
1532 * | | / _ \| '_ \| | | | _ <
1533 * | |___| (_) | |_) | |_| | |_) |
1534 * \_____\___/| .__/ \__, |____/
1537 **********************************/
1540 * Emit movsb/w instructions to make mov count divideable by 4
1543 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1544 be_emit_cstring(env, "\tcld");
1545 be_emit_finish_line_gas(env, NULL);
1549 be_emit_cstring(env, "\tmovsb");
1550 be_emit_finish_line_gas(env, NULL);
1553 be_emit_cstring(env, "\tmovsw");
1554 be_emit_finish_line_gas(env, NULL);
1557 be_emit_cstring(env, "\tmovsb");
1558 be_emit_finish_line_gas(env, NULL);
1559 be_emit_cstring(env, "\tmovsw");
1560 be_emit_finish_line_gas(env, NULL);
1566 * Emit rep movsd instruction for memcopy.
1569 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1570 tarval *tv = get_ia32_Immop_tarval(node);
1571 int rem = get_tarval_long(tv);
1573 emit_CopyB_prolog(env, rem);
1575 be_emit_cstring(env, "\trep movsd");
1576 be_emit_finish_line_gas(env, node);
1580 * Emits unrolled memcopy.
1583 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1584 tarval *tv = get_ia32_Immop_tarval(node);
1585 int size = get_tarval_long(tv);
1587 emit_CopyB_prolog(env, size & 0x3);
1591 be_emit_cstring(env, "\tmovsd");
1592 be_emit_finish_line_gas(env, NULL);
1598 /***************************
1602 * | | / _ \| '_ \ \ / /
1603 * | |___| (_) | | | \ V /
1604 * \_____\___/|_| |_|\_/
1606 ***************************/
1609 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1612 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1613 ir_mode *ls_mode = get_ia32_ls_mode(node);
1614 int ls_bits = get_mode_size_bits(ls_mode);
1616 be_emit_cstring(env, "\tcvt");
1618 if(is_ia32_Conv_I2FP(node)) {
1620 be_emit_cstring(env, "si2ss");
1622 be_emit_cstring(env, "si2sd");
1624 } else if(is_ia32_Conv_FP2I(node)) {
1626 be_emit_cstring(env, "ss2si");
1628 be_emit_cstring(env, "sd2si");
1631 assert(is_ia32_Conv_FP2FP(node));
1633 be_emit_cstring(env, "sd2ss");
1635 be_emit_cstring(env, "ss2sd");
1638 be_emit_char(env, ' ');
1640 switch(get_ia32_op_type(node)) {
1642 ia32_emit_source_register(env, node, 2);
1643 be_emit_cstring(env, ", ");
1644 ia32_emit_dest_register(env, node, 0);
1646 case ia32_AddrModeS:
1647 ia32_emit_dest_register(env, node, 0);
1648 be_emit_cstring(env, ", ");
1649 ia32_emit_am(env, node);
1652 assert(0 && "unsupported op type for Conv");
1654 be_emit_finish_line_gas(env, node);
1658 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1659 emit_ia32_Conv_with_FP(env, node);
1663 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1664 emit_ia32_Conv_with_FP(env, node);
1668 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1669 emit_ia32_Conv_with_FP(env, node);
1673 * Emits code for an Int conversion.
1676 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1677 const char *sign_suffix;
1678 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1679 int smaller_bits = get_mode_size_bits(smaller_mode);
1681 const arch_register_t *in_reg, *out_reg;
1683 assert(!mode_is_float(smaller_mode));
1684 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1686 signed_mode = mode_is_signed(smaller_mode);
1687 if(smaller_bits == 32) {
1688 // this should not happen as it's no convert
1692 sign_suffix = signed_mode ? "s" : "z";
1695 switch(get_ia32_op_type(node)) {
1697 in_reg = get_in_reg(env, node, 2);
1698 out_reg = get_out_reg(env, node, 0);
1700 if (in_reg == &ia32_gp_regs[REG_EAX] &&
1701 out_reg == &ia32_gp_regs[REG_EAX] &&
1705 /* argument and result are both in EAX and */
1706 /* signedness is ok: -> use the smaller cwtl opcode */
1707 be_emit_cstring(env, "\tcwtl");
1709 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1711 be_emit_cstring(env, "\tmov");
1712 be_emit_string(env, sign_suffix);
1713 ia32_emit_mode_suffix_mode(env, smaller_mode);
1714 be_emit_cstring(env, "l %");
1715 be_emit_string(env, sreg);
1716 be_emit_cstring(env, ", ");
1717 ia32_emit_dest_register(env, node, 0);
1720 case ia32_AddrModeS: {
1721 be_emit_cstring(env, "\tmov");
1722 be_emit_string(env, sign_suffix);
1723 ia32_emit_mode_suffix_mode(env, smaller_mode);
1724 be_emit_cstring(env, "l %");
1725 ia32_emit_am(env, node);
1726 be_emit_cstring(env, ", ");
1727 ia32_emit_dest_register(env, node, 0);
1731 assert(0 && "unsupported op type for Conv");
1733 be_emit_finish_line_gas(env, node);
1737 * Emits code for an 8Bit Int conversion.
1739 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1740 emit_ia32_Conv_I2I(env, node);
1744 /*******************************************
1747 * | |__ ___ _ __ ___ __| | ___ ___
1748 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1749 * | |_) | __/ | | | (_) | (_| | __/\__ \
1750 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1752 *******************************************/
1755 * Emits a backend call
1758 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1759 ir_entity *ent = be_Call_get_entity(node);
1761 be_emit_cstring(env, "\tcall ");
1763 set_entity_backend_marked(ent, 1);
1764 be_emit_string(env, get_entity_ld_name(ent));
1766 be_emit_char(env, '*');
1767 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1769 be_emit_finish_line_gas(env, node);
1773 * Emits code to increase stack pointer.
1776 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1777 int offs = be_get_IncSP_offset(node);
1783 be_emit_cstring(env, "\tsubl $");
1784 be_emit_irprintf(env->emit, "%u, ", offs);
1785 ia32_emit_source_register(env, node, 0);
1787 be_emit_cstring(env, "\taddl $");
1788 be_emit_irprintf(env->emit, "%u, ", -offs);
1789 ia32_emit_source_register(env, node, 0);
1791 be_emit_finish_line_gas(env, node);
1795 * Emits code to set stack pointer.
1798 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1799 be_emit_cstring(env, "\tmovl ");
1800 ia32_emit_source_register(env, node, 2);
1801 be_emit_cstring(env, ", ");
1802 ia32_emit_dest_register(env, node, 0);
1803 be_emit_finish_line_gas(env, node);
1807 * Emits code for Copy/CopyKeep.
1810 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1812 const arch_env_t *arch_env = env->arch_env;
1813 const arch_register_t *in = arch_get_irn_register(arch_env, op);
1814 const arch_register_t *out = arch_get_irn_register(arch_env, node);
1820 if(is_unknown_reg(in))
1822 /* copies of vf nodes aren't real... */
1823 if(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
1826 mode = get_irn_mode(node);
1827 if (mode == mode_E) {
1828 be_emit_cstring(env, "\tmovsd ");
1829 ia32_emit_register(env, in);
1830 be_emit_cstring(env, ", ");
1831 ia32_emit_register(env, out);
1833 be_emit_cstring(env, "\tmovl ");
1834 ia32_emit_register(env, in);
1835 be_emit_cstring(env, ", ");
1836 ia32_emit_register(env, out);
1838 be_emit_finish_line_gas(env, node);
1842 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1843 Copy_emitter(env, node, be_get_Copy_op(node));
1847 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1848 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1852 * Emits code for exchange.
1855 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1856 const arch_register_t *in1, *in2;
1857 const arch_register_class_t *cls1, *cls2;
1859 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1860 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1862 cls1 = arch_register_get_class(in1);
1863 cls2 = arch_register_get_class(in2);
1865 assert(cls1 == cls2 && "Register class mismatch at Perm");
1867 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1868 be_emit_cstring(env, "\txchg ");
1869 ia32_emit_source_register(env, node, 1);
1870 be_emit_cstring(env, ", ");
1871 ia32_emit_source_register(env, node, 0);
1872 be_emit_finish_line_gas(env, node);
1873 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1874 be_emit_cstring(env, "\txorpd ");
1875 ia32_emit_source_register(env, node, 1);
1876 be_emit_cstring(env, ", ");
1877 ia32_emit_source_register(env, node, 0);
1878 be_emit_finish_line_gas(env, NULL);
1880 be_emit_cstring(env, "\txorpd ");
1881 ia32_emit_source_register(env, node, 0);
1882 be_emit_cstring(env, ", ");
1883 ia32_emit_source_register(env, node, 1);
1884 be_emit_finish_line_gas(env, NULL);
1886 be_emit_cstring(env, "\txorpd ");
1887 ia32_emit_source_register(env, node, 1);
1888 be_emit_cstring(env, ", ");
1889 ia32_emit_source_register(env, node, 0);
1890 be_emit_finish_line_gas(env, node);
1891 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1893 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1899 * Emits code for Constant loading.
1902 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1903 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1905 if (imm_tp == ia32_ImmSymConst) {
1906 be_emit_cstring(env, "\tmovl ");
1907 ia32_emit_immediate(env, node);
1908 be_emit_cstring(env, ", ");
1909 ia32_emit_dest_register(env, node, 0);
1911 tarval *tv = get_ia32_Immop_tarval(node);
1912 assert(get_irn_mode(node) == mode_Iu);
1913 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1914 if (tarval_is_null(tv)) {
1915 if (env->isa->opt_arch == arch_pentium_4) {
1916 /* P4 prefers sub r, r, others xor r, r */
1917 be_emit_cstring(env, "\tsubl ");
1919 be_emit_cstring(env, "\txorl ");
1921 ia32_emit_dest_register(env, node, 0);
1922 be_emit_cstring(env, ", ");
1923 ia32_emit_dest_register(env, node, 0);
1925 be_emit_cstring(env, "\tmovl ");
1926 ia32_emit_immediate(env, node);
1927 be_emit_cstring(env, ", ");
1928 ia32_emit_dest_register(env, node, 0);
1931 be_emit_finish_line_gas(env, node);
1935 * Emits code to load the TLS base
1938 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1939 be_emit_cstring(env, "\tmovl %gs:0, ");
1940 ia32_emit_dest_register(env, node, 0);
1941 be_emit_finish_line_gas(env, node);
1945 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node)
1947 be_emit_cstring(env, "\tret");
1948 be_emit_finish_line_gas(env, node);
1952 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node)
1959 /***********************************************************************************
1962 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1963 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1964 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1965 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1967 ***********************************************************************************/
1970 * Enters the emitter functions for handled nodes into the generic
1971 * pointer of an opcode.
1974 void ia32_register_emitters(void) {
1976 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1977 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1978 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1979 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1980 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1981 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1983 /* first clear the generic function pointer for all ops */
1984 clear_irp_opcodes_generic_func();
1986 /* register all emitter functions defined in spec */
1987 ia32_register_spec_emitters();
1989 /* other ia32 emitter functions */
1994 IA32_EMIT(TestCMov);
1997 IA32_EMIT(SwitchJmp);
2000 IA32_EMIT(Conv_I2FP);
2001 IA32_EMIT(Conv_FP2I);
2002 IA32_EMIT(Conv_FP2FP);
2003 IA32_EMIT(Conv_I2I);
2004 IA32_EMIT(Conv_I2I8Bit);
2009 IA32_EMIT(xCmpCMov);
2010 IA32_EMIT(xCondJmp);
2011 IA32_EMIT2(fcomJmp, x87CondJmp);
2012 IA32_EMIT2(fcompJmp, x87CondJmp);
2013 IA32_EMIT2(fcomppJmp, x87CondJmp);
2014 IA32_EMIT2(fcomrJmp, x87CondJmp);
2015 IA32_EMIT2(fcomrpJmp, x87CondJmp);
2016 IA32_EMIT2(fcomrppJmp, x87CondJmp);
2018 /* benode emitter */
2044 static const char *last_name = NULL;
2045 static unsigned last_line = -1;
2046 static unsigned num = -1;
2049 * Emit the debug support for node node.
2052 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
2053 dbg_info *db = get_irn_dbg_info(node);
2055 const char *fname = be_retrieve_dbg_info(db, &lineno);
2057 if (! env->cg->birg->main_env->options->stabs_debug_support)
2061 if (last_name != fname) {
2063 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
2066 if (last_line != lineno) {
2069 snprintf(name, sizeof(name), ".LM%u", ++num);
2071 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
2072 be_emit_string(env, name);
2073 be_emit_cstring(env, ":\n");
2074 be_emit_write_line(env);
2079 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
2082 * Emits code for a node.
2085 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
2086 ir_op *op = get_irn_op(node);
2088 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
2090 if (op->ops.generic) {
2091 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
2092 ia32_emit_dbg(env, node);
2093 (*func) (env, node);
2095 emit_Nothing(env, node);
2096 ir_fprintf(stderr, "Error: No emit handler for node %+F (%+G, graph %+F)\n", node, node, current_ir_graph);
2102 * Emits gas alignment directives
2105 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
2106 be_emit_cstring(env, "\t.p2align ");
2107 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
2108 be_emit_write_line(env);
2112 * Emits gas alignment directives for Functions depended on cpu architecture.
2115 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
2117 unsigned maximum_skip;
2132 maximum_skip = (1 << align) - 1;
2133 ia32_emit_alignment(env, align, maximum_skip);
2137 * Emits gas alignment directives for Labels depended on cpu architecture.
2140 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
2141 unsigned align; unsigned maximum_skip;
2156 maximum_skip = (1 << align) - 1;
2157 ia32_emit_alignment(env, align, maximum_skip);
2161 * Test wether a block should be aligned.
2162 * For cpus in the P4/Athlon class it is usefull to align jump labels to
2163 * 16 bytes. However we should only do that if the alignment nops before the
2164 * label aren't executed more often than we have jumps to the label.
2167 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
2168 static const double DELTA = .0001;
2169 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2171 double prev_freq = 0; /**< execfreq of the fallthrough block */
2172 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
2173 cpu_support cpu = env->isa->opt_arch;
2176 if(exec_freq == NULL)
2178 if(cpu == arch_i386 || cpu == arch_i486)
2181 block_freq = get_block_execfreq(exec_freq, block);
2182 if(block_freq < DELTA)
2185 n_cfgpreds = get_Block_n_cfgpreds(block);
2186 for(i = 0; i < n_cfgpreds; ++i) {
2187 ir_node *pred = get_Block_cfgpred_block(block, i);
2188 double pred_freq = get_block_execfreq(exec_freq, pred);
2191 prev_freq += pred_freq;
2193 jmp_freq += pred_freq;
2197 if(prev_freq < DELTA && !(jmp_freq < DELTA))
2200 jmp_freq /= prev_freq;
2204 case arch_athlon_64:
2206 return jmp_freq > 3;
2208 return jmp_freq > 2;
2213 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
2218 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2220 n_cfgpreds = get_Block_n_cfgpreds(block);
2221 need_label = (n_cfgpreds != 0);
2223 if (should_align_block(env, block, prev)) {
2225 ia32_emit_align_label(env, env->isa->opt_arch);
2229 ia32_emit_block_name(env, block);
2230 be_emit_char(env, ':');
2232 be_emit_pad_comment(env);
2233 be_emit_cstring(env, " /* preds:");
2235 /* emit list of pred blocks in comment */
2236 arity = get_irn_arity(block);
2237 for (i = 0; i < arity; ++i) {
2238 ir_node *predblock = get_Block_cfgpred_block(block, i);
2239 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2242 be_emit_cstring(env, "\t/* ");
2243 ia32_emit_block_name(env, block);
2244 be_emit_cstring(env, ": ");
2246 if (exec_freq != NULL) {
2247 be_emit_irprintf(env->emit, " freq: %f",
2248 get_block_execfreq(exec_freq, block));
2250 be_emit_cstring(env, " */\n");
2251 be_emit_write_line(env);
2255 * Walks over the nodes in a block connected by scheduling edges
2256 * and emits code for each node.
2259 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2261 const ir_node *node;
2263 ia32_emit_block_header(env, block, last_block);
2265 /* emit the contents of the block */
2266 ia32_emit_dbg(env, block);
2267 sched_foreach(block, node) {
2268 ia32_emit_node(env, node);
2273 * Emits code for function start.
2276 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2277 ir_entity *irg_ent = get_irg_entity(irg);
2278 const char *irg_name = get_entity_ld_name(irg_ent);
2279 cpu_support cpu = env->isa->opt_arch;
2280 const be_irg_t *birg = env->cg->birg;
2282 be_emit_write_line(env);
2283 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2284 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2285 ia32_emit_align_func(env, cpu);
2286 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2287 be_emit_cstring(env, ".global ");
2288 be_emit_string(env, irg_name);
2289 be_emit_char(env, '\n');
2290 be_emit_write_line(env);
2292 ia32_emit_function_object(env, irg_name);
2293 be_emit_string(env, irg_name);
2294 be_emit_cstring(env, ":\n");
2295 be_emit_write_line(env);
2299 * Emits code for function end
2302 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2303 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2304 const be_irg_t *birg = env->cg->birg;
2306 ia32_emit_function_size(env, irg_name);
2307 be_dbg_method_end(birg->main_env->db_handle);
2308 be_emit_char(env, '\n');
2309 be_emit_write_line(env);
2314 * Sets labels for control flow nodes (jump target)
2317 void ia32_gen_labels(ir_node *block, void *data)
2320 int n = get_Block_n_cfgpreds(block);
2323 for (n--; n >= 0; n--) {
2324 pred = get_Block_cfgpred(block, n);
2325 set_irn_link(pred, block);
2330 * Emit an exception label if the current instruction can fail.
2332 void ia32_emit_exc_label(ia32_emit_env_t *env, const ir_node *node) {
2333 if (get_ia32_exc_label(node)) {
2334 be_emit_irprintf(env->emit, ".EXL%u\n", 0);
2335 be_emit_write_line(env);
2340 * Main driver. Emits the code for one routine.
2342 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2343 ia32_emit_env_t env;
2345 ir_node *last_block = NULL;
2348 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2349 env.emit = &env.isa->emit;
2350 env.arch_env = cg->arch_env;
2353 ia32_register_emitters();
2355 ia32_emit_func_prolog(&env, irg);
2356 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2358 n = ARR_LEN(cg->blk_sched);
2359 for (i = 0; i < n;) {
2362 block = cg->blk_sched[i];
2364 next_bl = i < n ? cg->blk_sched[i] : NULL;
2366 /* set here the link. the emitter expects to find the next block here */
2367 set_irn_link(block, next_bl);
2368 ia32_gen_block(&env, block, last_block);
2372 ia32_emit_func_epilog(&env, irg);
2375 void ia32_init_emitter(void)
2377 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");