2 * This file implements the node emitter.
22 #include "iredges_t.h"
24 #include "../besched_t.h"
25 #include "../benode_t.h"
27 #include "ia32_emitter.h"
28 #include "gen_ia32_emitter.h"
29 #include "gen_ia32_regalloc_if.h"
30 #include "ia32_nodes_attr.h"
31 #include "ia32_new_nodes.h"
32 #include "ia32_map_regs.h"
33 #include "bearch_ia32_t.h"
35 #define BLOCK_PREFIX(x) ".L" x
37 #define SNPRINTF_BUF_LEN 128
39 /* global arch_env for lc_printf functions */
40 static const arch_env_t *arch_env = NULL;
42 /** by default, we generate assembler code for the Linux gas */
43 asm_flavour_t asm_flavour = ASM_LINUX_GAS;
46 * Switch to a new section
48 void ia32_switch_section(FILE *F, section_t sec) {
49 static section_t curr_sec = NO_SECTION;
50 static const char *text[ASM_MAX][SECTION_MAX] = {
52 ".section\t.text", ".section\t.data", ".section\t.rodata", ".section\t.text"
55 ".section\t.text", ".section\t.data", ".section .rdata,\"dr\"", ".section\t.text"
72 fprintf(F, "\t%s\n", text[asm_flavour][sec]);
76 static void ia32_dump_function_object(FILE *F, const char *name)
78 switch (asm_flavour) {
80 fprintf(F, "\t.type\t%s, @function\n", name);
83 fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name);
88 static void ia32_dump_function_size(FILE *F, const char *name)
90 switch (asm_flavour) {
92 fprintf(F, "\t.size\t%s, .-%s\n", name, name);
97 /*************************************************************
99 * (_) | | / _| | | | |
100 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
101 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
102 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
103 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
106 *************************************************************/
109 * returns true if a node has x87 registers
111 static int has_x87_register(const ir_node *n) {
112 return is_irn_machine_user(n, 0);
115 /* We always pass the ir_node which is a pointer. */
116 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
117 return lc_arg_type_ptr;
122 * Returns the register at in position pos.
124 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
126 const arch_register_t *reg = NULL;
128 assert(get_irn_arity(irn) > pos && "Invalid IN position");
130 /* The out register of the operator at position pos is the
131 in register we need. */
132 op = get_irn_n(irn, pos);
134 reg = arch_get_irn_register(arch_env, op);
136 assert(reg && "no in register found");
138 /* in case of unknown: just return a register */
139 if (REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN]))
140 reg = &ia32_gp_regs[REG_EAX];
141 else if (REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]))
142 reg = &ia32_xmm_regs[REG_XMM0];
143 else if (REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]))
144 reg = &ia32_vfp_regs[REG_VF0];
150 * Returns the register at out position pos.
152 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
154 const arch_register_t *reg = NULL;
156 /* 1st case: irn is not of mode_T, so it has only */
157 /* one OUT register -> good */
158 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
159 /* Proj with the corresponding projnum for the register */
161 if (get_irn_mode(irn) != mode_T) {
162 reg = arch_get_irn_register(arch_env, irn);
164 else if (is_ia32_irn(irn)) {
165 reg = get_ia32_out_reg(irn, pos);
168 const ir_edge_t *edge;
170 foreach_out_edge(irn, edge) {
171 proj = get_edge_src_irn(edge);
172 assert(is_Proj(proj) && "non-Proj from mode_T node");
173 if (get_Proj_proj(proj) == pos) {
174 reg = arch_get_irn_register(arch_env, proj);
180 assert(reg && "no out register found");
190 * Returns the name of the in register at position pos.
192 static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
193 const arch_register_t *reg;
195 if (in_out == IN_REG) {
196 reg = get_in_reg(irn, pos);
198 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
199 /* FIXME: works for binop only */
200 assert(2 <= pos && pos <= 3);
201 reg = get_ia32_attr(irn)->x87[pos - 2];
205 /* destination address mode nodes don't have outputs */
206 if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
210 reg = get_out_reg(irn, pos);
211 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
212 reg = get_ia32_attr(irn)->x87[pos + 2];
214 return arch_register_get_name(reg);
218 * Get the register name for a node.
220 static int ia32_get_reg_name(lc_appendable_t *app,
221 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
224 ir_node *irn = arg->v_ptr;
225 int nr = occ->width - 1;
228 return lc_appendable_snadd(app, "(null)", 6);
230 buf = get_ia32_reg_name(irn, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
232 /* append the stupid % to register names */
233 lc_appendable_chadd(app, '%');
234 return lc_appendable_snadd(app, buf, strlen(buf));
238 * Get the x87 register name for a node.
240 static int ia32_get_x87_name(lc_appendable_t *app,
241 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
244 ir_node *irn = arg->v_ptr;
245 int nr = occ->width - 1;
249 return lc_appendable_snadd(app, "(null)", 6);
251 attr = get_ia32_attr(irn);
252 buf = attr->x87[nr]->name;
253 lc_appendable_chadd(app, '%');
254 return lc_appendable_snadd(app, buf, strlen(buf));
258 * Returns the tarval, offset or scale of an ia32 as a string.
260 static int ia32_const_to_str(lc_appendable_t *app,
261 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
264 ir_node *irn = arg->v_ptr;
267 return lc_arg_append(app, occ, "(null)", 6);
269 if (occ->conversion == 'C') {
270 buf = get_ia32_cnst(irn);
273 buf = get_ia32_am_offs(irn);
276 return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
280 * Determines the SSE suffix depending on the mode.
282 static int ia32_get_mode_suffix(lc_appendable_t *app,
283 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
285 ir_node *irn = arg->v_ptr;
286 ir_mode *mode = get_irn_mode(irn);
288 if (mode == mode_T) {
289 mode = (is_ia32_Ld(irn) || is_ia32_St(irn)) ? get_ia32_ls_mode(irn) : get_ia32_res_mode(irn);
293 return lc_arg_append(app, occ, "(null)", 6);
295 if (mode_is_float(mode)) {
296 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
299 return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
304 * Return the ia32 printf arg environment.
305 * We use the firm environment with some additional handlers.
307 const lc_arg_env_t *ia32_get_arg_env(void) {
308 static lc_arg_env_t *env = NULL;
310 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
311 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
312 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
313 static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
316 /* extend the firm printer */
317 env = firm_get_arg_env();
319 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
320 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
321 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
322 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
323 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
324 lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
330 static char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
331 switch(get_mode_size_bits(mode)) {
333 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
335 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
337 return (char *)arch_register_get_name(reg);
342 * Emits registers and/or address mode of a binary operation.
344 const char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
345 static char *buf = NULL;
347 /* verify that this function is never called on non-AM supporting operations */
348 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
350 #define PRODUCES_RESULT(n) \
351 (!(is_ia32_St(n) || \
352 is_ia32_Store8Bit(n) || \
353 is_ia32_CondJmp(n) || \
354 is_ia32_xCondJmp(n) || \
355 is_ia32_SwitchJmp(n)))
358 buf = xcalloc(1, SNPRINTF_BUF_LEN);
361 memset(buf, 0, SNPRINTF_BUF_LEN);
364 switch(get_ia32_op_type(n)) {
366 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
367 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
370 const arch_register_t *in1 = get_in_reg(n, 2);
371 const arch_register_t *in2 = get_in_reg(n, 3);
372 const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
373 const arch_register_t *in;
376 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
377 out = out ? out : in1;
378 in_name = arch_register_get_name(in);
380 if (is_ia32_emit_cl(n)) {
381 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
385 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
389 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
390 assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
391 snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
394 if (PRODUCES_RESULT(n)) {
395 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n, env));
398 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, ia32_emit_am(n, env));
403 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
404 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
405 ia32_emit_am(n, env),
406 is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
407 get_ia32_cnst(n)); /* tell the assembler to store it's address. */
410 const arch_register_t *in1 = get_in_reg(n, 2);
411 ir_mode *mode = get_ia32_res_mode(n);
414 mode = mode ? mode : get_ia32_ls_mode(n);
415 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
417 if (is_ia32_emit_cl(n)) {
418 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
422 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
426 assert(0 && "unsupported op type");
429 #undef PRODUCES_RESULT
435 * Returns the xxx PTR string for a given mode
437 * @param mode the mode
438 * @param x87_insn if non-zero returns the string for a x87 instruction
439 * else for a SSE instruction
441 static const char *pointer_size(ir_mode *mode, int x87_insn)
444 switch (get_mode_size_bits(mode)) {
445 case 8: return "BYTE PTR";
446 case 16: return "WORD PTR";
447 case 32: return "DWORD PTR";
453 case 96: return "XWORD PTR";
454 default: return NULL;
461 * Emits registers and/or address mode of a binary operation.
463 const char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
464 static char *buf = NULL;
466 /* verify that this function is never called on non-AM supporting operations */
467 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
470 buf = xcalloc(1, SNPRINTF_BUF_LEN);
473 memset(buf, 0, SNPRINTF_BUF_LEN);
476 switch(get_ia32_op_type(n)) {
478 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
479 ir_mode *mode = get_ia32_ls_mode(n);
480 const char *p = pointer_size(mode, 1);
481 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s %s", p, get_ia32_cnst(n));
484 ia32_attr_t *attr = get_ia32_attr(n);
485 const arch_register_t *in1 = attr->x87[0];
486 const arch_register_t *in2 = attr->x87[1];
487 const arch_register_t *out = attr->x87[2];
488 const arch_register_t *in;
491 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
492 out = out ? out : in1;
493 in_name = arch_register_get_name(in);
495 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
500 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
503 assert(0 && "unsupported op type");
506 #undef PRODUCES_RESULT
512 * Emits registers and/or address mode of a unary operation.
514 const char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
515 static char *buf = NULL;
518 buf = xcalloc(1, SNPRINTF_BUF_LEN);
521 memset(buf, 0, SNPRINTF_BUF_LEN);
524 switch(get_ia32_op_type(n)) {
526 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
527 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
530 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
534 snprintf(buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
537 assert(0 && "unsupported op type");
544 * Emits address mode.
546 const char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
547 ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
552 static struct obstack *obst = NULL;
553 ir_mode *mode = get_ia32_ls_mode(n);
555 if (! is_ia32_Lea(n))
556 assert(mode && "AM node must have ls_mode attribute set.");
559 obst = xcalloc(1, sizeof(*obst));
562 obstack_free(obst, NULL);
565 /* obstack_free with NULL results in an uninitialized obstack */
568 p = pointer_size(mode, has_x87_register(n));
570 obstack_printf(obst, "%s ", p);
572 /* emit address mode symconst */
573 if (get_ia32_am_sc(n)) {
574 if (is_ia32_am_sc_sign(n))
575 obstack_printf(obst, "-");
576 obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
579 if (am_flav & ia32_B) {
580 obstack_printf(obst, "[");
581 lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
585 if (am_flav & ia32_I) {
587 obstack_printf(obst, "+");
590 obstack_printf(obst, "[");
593 lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
595 if (am_flav & ia32_S) {
596 obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
602 if (am_flav & ia32_O) {
603 s = get_ia32_am_offs(n);
606 /* omit explicit + if there was no base or index */
608 obstack_printf(obst, "[");
613 obstack_printf(obst, s);
619 obstack_printf(obst, "] ");
621 size = obstack_object_size(obst);
622 s = obstack_finish(obst);
631 const char *ia32_emit_adr(const ir_node *irn, ia32_emit_env_t *env)
633 static char buf[SNPRINTF_BUF_LEN];
634 ir_mode *mode = get_ia32_ls_mode(irn);
635 const char *adr = get_ia32_cnst(irn);
636 const char *pref = pointer_size(mode, has_x87_register(irn));
638 snprintf(buf, SNPRINTF_BUF_LEN, "%s %s", pref ? pref : "", adr);
643 * Formated print of commands and comments.
645 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
647 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
650 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
652 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
658 * Add a number to a prefix. This number will not be used a second time.
660 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
661 static unsigned long id = 0;
662 snprintf(buf, buflen, "%s%lu", prefix, ++id);
668 /*************************************************
671 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
672 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
673 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
674 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
676 *************************************************/
679 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
682 * coding of conditions
684 struct cmp2conditon_t {
690 * positive conditions for signed compares
692 static const struct cmp2conditon_t cmp2condition_s[] = {
693 { NULL, pn_Cmp_False }, /* always false */
694 { "e", pn_Cmp_Eq }, /* == */
695 { "l", pn_Cmp_Lt }, /* < */
696 { "le", pn_Cmp_Le }, /* <= */
697 { "g", pn_Cmp_Gt }, /* > */
698 { "ge", pn_Cmp_Ge }, /* >= */
699 { "ne", pn_Cmp_Lg }, /* != */
700 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
701 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
702 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
703 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
704 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
705 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
706 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
707 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
708 { NULL, pn_Cmp_True }, /* always true */
712 * positive conditions for unsigned compares
714 static const struct cmp2conditon_t cmp2condition_u[] = {
715 { NULL, pn_Cmp_False }, /* always false */
716 { "e", pn_Cmp_Eq }, /* == */
717 { "b", pn_Cmp_Lt }, /* < */
718 { "be", pn_Cmp_Le }, /* <= */
719 { "a", pn_Cmp_Gt }, /* > */
720 { "ae", pn_Cmp_Ge }, /* >= */
721 { "ne", pn_Cmp_Lg }, /* != */
722 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
723 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
724 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
725 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
726 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
727 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
728 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
729 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
730 { NULL, pn_Cmp_True }, /* always true */
734 * returns the condition code
736 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
738 assert(cmp2condition_s[cmp_code].num == cmp_code);
739 assert(cmp2condition_u[cmp_code].num == cmp_code);
741 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
745 * Returns the target block for a control flow node.
747 static ir_node *get_cfop_target_block(const ir_node *irn) {
748 return get_irn_link(irn);
752 * Returns the target label for a control flow node.
754 static char *get_cfop_target(const ir_node *irn, char *buf) {
755 ir_node *bl = get_cfop_target_block(irn);
757 snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
761 /** Return the next block in Block schedule */
762 static ir_node *next_blk_sched(const ir_node *block) {
763 return get_irn_link(block);
767 * Returns the Proj with projection number proj and NOT mode_M
769 static ir_node *get_proj(const ir_node *irn, long proj) {
770 const ir_edge_t *edge;
773 assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
775 foreach_out_edge(irn, edge) {
776 src = get_edge_src_irn(edge);
778 assert(is_Proj(src) && "Proj expected");
779 if (get_irn_mode(src) == mode_M)
782 if (get_Proj_proj(src) == proj)
789 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
791 static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
792 const ir_node *proj1, *proj2 = NULL;
793 const ir_node *block, *next_bl = NULL;
794 char buf[SNPRINTF_BUF_LEN];
795 char cmd_buf[SNPRINTF_BUF_LEN];
796 char cmnt_buf[SNPRINTF_BUF_LEN];
798 /* get both Proj's */
799 proj1 = get_proj(irn, pn_Cond_true);
800 assert(proj1 && "CondJmp without true Proj");
802 proj2 = get_proj(irn, pn_Cond_false);
803 assert(proj2 && "CondJmp without false Proj");
805 /* for now, the code works for scheduled and non-schedules blocks */
806 block = get_nodes_block(irn);
808 /* we have a block schedule */
809 next_bl = next_blk_sched(block);
811 if (get_cfop_target_block(proj1) == next_bl) {
812 /* exchange both proj's so the second one can be omitted */
813 const ir_node *t = proj1;
818 /* the first Proj must always be created */
819 if (get_Proj_proj(proj1) == pn_Cond_true) {
820 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
821 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
822 get_cfop_target(proj1, buf));
823 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
826 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
827 get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
828 !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
829 get_cfop_target(proj1, buf));
830 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
834 /* the second Proj might be a fallthrough */
835 if (get_cfop_target_block(proj2) != next_bl) {
836 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
837 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
841 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(proj2, buf));
847 * Emits code for conditional jump.
849 static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
851 char cmd_buf[SNPRINTF_BUF_LEN];
852 char cmnt_buf[SNPRINTF_BUF_LEN];
854 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
855 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
857 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
861 * Emits code for conditional jump with two variables.
863 static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
864 CondJmp_emitter(irn, env);
868 * Emits code for conditional test and jump.
870 static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
872 #define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
875 const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
876 const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
877 char cmd_buf[SNPRINTF_BUF_LEN];
878 char cmnt_buf[SNPRINTF_BUF_LEN];
881 op2 = arch_register_get_name(get_in_reg(irn, 1));
883 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
884 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
887 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
893 * Emits code for conditional test and jump with two variables.
895 static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
896 TestJmp_emitter(irn, env);
899 static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
901 char cmd_buf[SNPRINTF_BUF_LEN];
902 char cmnt_buf[SNPRINTF_BUF_LEN];
904 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
905 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
907 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
910 static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
912 char cmd_buf[SNPRINTF_BUF_LEN];
913 char cmnt_buf[SNPRINTF_BUF_LEN];
915 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
916 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
918 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
922 * Emits code for conditional x87 floating point jump with two variables.
924 static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) {
926 char cmd_buf[SNPRINTF_BUF_LEN];
927 char cmnt_buf[SNPRINTF_BUF_LEN];
928 ia32_attr_t *attr = get_ia32_attr(irn);
929 const char *reg = attr->x87[1]->name;
930 const char *instr = "fcom";
933 switch (get_ia32_pncode(irn)) {
934 case iro_ia32_fcomrJmp:
936 case iro_ia32_fcomJmp:
940 case iro_ia32_fcomrpJmp:
942 case iro_ia32_fcompJmp:
945 case iro_ia32_fcomrppJmp:
947 case iro_ia32_fcomppJmp:
954 set_ia32_pncode(irn, (long)get_negated_pnc(get_ia32_pncode(irn), mode_Is));
956 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s", instr, reg);
957 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
959 // lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %3D", irn);
960 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn);
961 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */");
963 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sahf");
964 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store ah into flags */");
967 finish_CondJmp(F, irn, mode_Is);
970 static void emit_ia32_CMov(ir_node *irn, ia32_emit_env_t *env) {
972 char cmd_buf[SNPRINTF_BUF_LEN];
973 char cmnt_buf[SNPRINTF_BUF_LEN];
974 const lc_arg_env_t *arg_env = ia32_get_arg_env();
976 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn);
977 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* Psi condition */" );
980 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmov%s %1D, %3S",
981 get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
983 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* condition is true case */" );
987 /*********************************************************
990 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
991 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
992 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
993 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
996 *********************************************************/
998 /* jump table entry (target and corresponding number) */
999 typedef struct _branch_t {
1004 /* jump table for switch generation */
1005 typedef struct _jmp_tbl_t {
1006 ir_node *defProj; /**< default target */
1007 int min_value; /**< smallest switch case */
1008 int max_value; /**< largest switch case */
1009 int num_branches; /**< number of jumps */
1010 char *label; /**< label of the jump table */
1011 branch_t *branches; /**< jump array */
1015 * Compare two variables of type branch_t. Used to sort all switch cases
1017 static int ia32_cmp_branch_t(const void *a, const void *b) {
1018 branch_t *b1 = (branch_t *)a;
1019 branch_t *b2 = (branch_t *)b;
1021 if (b1->value <= b2->value)
1028 * Emits code for a SwitchJmp (creates a jump table if
1029 * possible otherwise a cmp-jmp cascade). Port from
1032 static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
1033 unsigned long interval;
1034 char buf[SNPRINTF_BUF_LEN];
1035 int last_value, i, pn;
1038 const ir_edge_t *edge;
1039 const lc_arg_env_t *env = ia32_get_arg_env();
1040 FILE *F = emit_env->out;
1041 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1043 /* fill the table structure */
1044 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1045 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
1047 tbl.num_branches = get_irn_n_edges(irn);
1048 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1049 tbl.min_value = INT_MAX;
1050 tbl.max_value = INT_MIN;
1053 /* go over all proj's and collect them */
1054 foreach_out_edge(irn, edge) {
1055 proj = get_edge_src_irn(edge);
1056 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1058 pn = get_Proj_proj(proj);
1060 /* create branch entry */
1061 tbl.branches[i].target = proj;
1062 tbl.branches[i].value = pn;
1064 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
1065 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
1067 /* check for default proj */
1068 if (pn == get_ia32_pncode(irn)) {
1069 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1076 /* sort the branches by their number */
1077 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1079 /* two-complement's magic make this work without overflow */
1080 interval = tbl.max_value - tbl.min_value;
1082 /* emit the table */
1083 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
1084 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
1087 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
1088 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
1091 if (tbl.num_branches > 1) {
1094 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
1095 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
1098 ia32_switch_section(F, SECTION_RODATA);
1099 fprintf(F, "\t.align 4\n");
1101 fprintf(F, "%s:\n", tbl.label);
1103 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
1104 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
1107 last_value = tbl.branches[0].value;
1108 for (i = 1; i < tbl.num_branches; ++i) {
1109 while (++last_value < tbl.branches[i].value) {
1110 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
1111 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
1114 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
1115 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
1118 ia32_switch_section(F, SECTION_TEXT);
1121 /* one jump is enough */
1122 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
1123 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
1134 * Emits code for a unconditional jump.
1136 static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
1137 ir_node *block, *next_bl;
1139 char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1141 /* for now, the code works for scheduled and non-schedules blocks */
1142 block = get_nodes_block(irn);
1144 /* we have a block schedule */
1145 next_bl = next_blk_sched(block);
1146 if (get_cfop_target_block(irn) != next_bl) {
1147 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
1148 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
1152 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
1157 /****************************
1160 * _ __ _ __ ___ _ ___
1161 * | '_ \| '__/ _ \| |/ __|
1162 * | |_) | | | (_) | |\__ \
1163 * | .__/|_| \___/| ||___/
1166 ****************************/
1169 * Emits code for a proj -> node
1171 static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
1172 ir_node *pred = get_Proj_pred(irn);
1174 if (get_irn_op(pred) == op_Start) {
1175 switch(get_Proj_proj(irn)) {
1176 case pn_Start_X_initial_exec:
1185 /**********************************
1188 * | | ___ _ __ _ _| |_) |
1189 * | | / _ \| '_ \| | | | _ <
1190 * | |___| (_) | |_) | |_| | |_) |
1191 * \_____\___/| .__/ \__, |____/
1194 **********************************/
1197 * Emit movsb/w instructions to make mov count divideable by 4
1199 static void emit_CopyB_prolog(FILE *F, int rem, int size) {
1200 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1202 fprintf(F, "\t/* memcopy %d bytes*/\n", size);
1204 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
1205 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
1210 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1211 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
1214 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1215 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
1218 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1219 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1221 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1222 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1230 * Emit rep movsd instruction for memcopy.
1232 static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
1233 FILE *F = emit_env->out;
1234 tarval *tv = get_ia32_Immop_tarval(irn);
1235 int rem = get_tarval_long(tv);
1236 ir_node *size_node = get_irn_n(irn, 2);
1238 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1240 /* beware: size_node could be a be_Copy to fulfill constraints for ecx */
1241 size_node = be_is_Copy(size_node) ? be_get_Copy_op(size_node) : size_node;
1242 size = get_tarval_long(get_ia32_Immop_tarval(size_node));
1244 emit_CopyB_prolog(F, rem, size);
1246 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
1247 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
1252 * Emits unrolled memcopy.
1254 static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
1255 tarval *tv = get_ia32_Immop_tarval(irn);
1256 int size = get_tarval_long(tv);
1257 FILE *F = emit_env->out;
1258 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1260 emit_CopyB_prolog(F, size & 0x3, size);
1264 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
1265 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
1272 /***************************
1276 * | | / _ \| '_ \ \ / /
1277 * | |___| (_) | | | \ V /
1278 * \_____\___/|_| |_|\_/
1280 ***************************/
1283 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1285 static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1286 FILE *F = emit_env->out;
1287 const lc_arg_env_t *env = ia32_get_arg_env();
1288 ir_mode *src_mode = get_ia32_src_mode(irn);
1289 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1290 char *from, *to, buf[64];
1291 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1293 from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
1294 to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
1296 switch(get_ia32_op_type(irn)) {
1298 lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
1300 case ia32_AddrModeS:
1301 lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
1304 assert(0 && "unsupported op type for Conv");
1307 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
1308 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
1312 static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1313 emit_ia32_Conv_with_FP(irn, emit_env);
1316 static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1317 emit_ia32_Conv_with_FP(irn, emit_env);
1320 static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1321 emit_ia32_Conv_with_FP(irn, emit_env);
1325 * Emits code for an Int conversion.
1327 static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1328 FILE *F = emit_env->out;
1329 const lc_arg_env_t *env = ia32_get_arg_env();
1330 char *move_cmd = "movzx";
1331 char *conv_cmd = NULL;
1332 ir_mode *src_mode = get_ia32_src_mode(irn);
1333 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1335 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1336 const arch_register_t *in_reg, *out_reg;
1338 n = get_mode_size_bits(src_mode);
1339 m = get_mode_size_bits(tgt_mode);
1341 if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
1343 if (n == 8 || m == 8)
1345 else if (n == 16 || m == 16)
1348 assert(0 && "unsupported Conv_I2I");
1351 switch(get_ia32_op_type(irn)) {
1353 in_reg = get_in_reg(irn, 2);
1354 out_reg = get_out_reg(irn, 0);
1356 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1357 REGS_ARE_EQUAL(out_reg, in_reg) &&
1358 mode_is_signed(n < m ? src_mode : tgt_mode))
1360 /* argument and result are both in EAX and */
1361 /* signedness is ok: -> use converts */
1362 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
1364 else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
1365 ! mode_is_signed(n < m ? src_mode : tgt_mode))
1367 /* argument and result are in the same register */
1368 /* and signedness is ok: -> use and with mask */
1369 int mask = (1 << (n < m ? n : m)) - 1;
1370 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
1373 /* use move w/o sign extension */
1374 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
1375 move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
1379 case ia32_AddrModeS:
1380 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
1381 move_cmd, irn, ia32_emit_am(irn, emit_env));
1384 assert(0 && "unsupported op type for Conv");
1387 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
1388 irn, n, src_mode, m, tgt_mode);
1394 * Emits code for an 8Bit Int conversion.
1396 void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
1397 emit_ia32_Conv_I2I(irn, emit_env);
1401 /*******************************************
1404 * | |__ ___ _ __ ___ __| | ___ ___
1405 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1406 * | |_) | __/ | | | (_) | (_| | __/\__ \
1407 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1409 *******************************************/
1412 * Emits a backend call
1414 static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
1415 FILE *F = emit_env->out;
1416 entity *ent = be_Call_get_entity(irn);
1417 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1420 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
1423 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
1426 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
1432 * Emits code to increase stack pointer.
1434 static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1435 FILE *F = emit_env->out;
1436 unsigned offs = be_get_IncSP_offset(irn);
1437 be_stack_dir_t dir = be_get_IncSP_direction(irn);
1438 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1441 if (dir == be_stack_dir_expand)
1442 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
1444 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
1445 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
1448 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
1449 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
1456 * Emits code to set stack pointer.
1458 static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1459 FILE *F = emit_env->out;
1460 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1462 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1463 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
1468 * Emits code for Copy.
1470 static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
1471 FILE *F = emit_env->out;
1472 const arch_env_t *aenv = emit_env->arch_env;
1473 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1475 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))))
1478 if (mode_is_float(get_irn_mode(irn)))
1479 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
1481 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
1482 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1487 * Emits code for exchange.
1489 static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
1490 FILE *F = emit_env->out;
1491 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1493 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
1494 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
1499 * Emits code for Constant loading.
1501 static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) {
1503 char cmd_buf[256], cmnt_buf[256];
1504 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1506 if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) {
1507 const char *instr = "xor";
1508 if (env->isa->opt_arch == arch_pentium_4) {
1509 /* P4 prefers sub r, r, others xor r, r */
1512 lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n);
1513 lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */");
1516 if (get_ia32_op_type(n) == ia32_SymConst) {
1517 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n);
1518 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */");
1521 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n);
1522 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */");
1525 lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n);
1528 static void emit_be_Return(const ir_node *n, ia32_emit_env_t *env) {
1530 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1532 lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", "ret", "/* be_Return */", n, n);
1537 /***********************************************************************************
1540 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1541 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1542 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1543 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1545 ***********************************************************************************/
1548 * Enters the emitter functions for handled nodes into the generic
1549 * pointer of an opcode.
1551 static void ia32_register_emitters(void) {
1553 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1554 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1555 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1556 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1558 /* first clear the generic function pointer for all ops */
1559 clear_irp_opcodes_generic_func();
1561 /* register all emitter functions defined in spec */
1562 ia32_register_spec_emitters();
1564 /* other ia32 emitter functions */
1570 IA32_EMIT(SwitchJmp);
1573 IA32_EMIT(Conv_I2FP);
1574 IA32_EMIT(Conv_FP2I);
1575 IA32_EMIT(Conv_FP2FP);
1576 IA32_EMIT(Conv_I2I);
1577 IA32_EMIT(Conv_I2I8Bit);
1579 IA32_EMIT2(fcomJmp, x87CondJmp);
1580 IA32_EMIT2(fcompJmp, x87CondJmp);
1581 IA32_EMIT2(fcomppJmp, x87CondJmp);
1582 IA32_EMIT2(fcomrJmp, x87CondJmp);
1583 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1584 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1586 /* benode emitter */
1605 * Emits code for a node.
1607 static void ia32_emit_node(const ir_node *irn, void *env) {
1608 ia32_emit_env_t *emit_env = env;
1609 FILE *F = emit_env->out;
1610 ir_op *op = get_irn_op(irn);
1611 DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
1613 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
1615 if (op->ops.generic) {
1616 void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
1620 ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
1625 * Emits gas alignment directives
1627 static void ia32_emit_alignment(FILE *F, unsigned align, unsigned skip) {
1628 fprintf(F, "\t.p2align %u,,%u\n", align, skip);
1632 * Emits gas alignment directives for Functions depended on cpu architecture.
1634 static void ia32_emit_align_func(FILE *F, cpu_support cpu) {
1635 unsigned align; unsigned maximum_skip;
1637 /* gcc doesn't emit alignment for p4 ?*/
1638 if (cpu == arch_pentium_4)
1643 align = 2; maximum_skip = 3;
1646 align = 4; maximum_skip = 15;
1649 align = 5; maximum_skip = 31;
1652 align = 4; maximum_skip = 15;
1654 ia32_emit_alignment(F, align, maximum_skip);
1658 * Emits gas alignment directives for Labels depended on cpu architecture.
1660 static void ia32_emit_align_label(FILE *F, cpu_support cpu) {
1661 unsigned align; unsigned maximum_skip;
1663 /* gcc doesn't emit alignment for p4 ?*/
1664 if (cpu == arch_pentium_4)
1669 align = 2; maximum_skip = 3;
1672 align = 4; maximum_skip = 15;
1675 align = 5; maximum_skip = 7;
1678 align = 4; maximum_skip = 7;
1680 ia32_emit_alignment(F, align, maximum_skip);
1684 * Walks over the nodes in a block connected by scheduling edges
1685 * and emits code for each node.
1687 static void ia32_gen_block(ir_node *block, void *env) {
1688 ia32_emit_env_t *emit_env = env;
1690 int need_label = block != get_irg_start_block(get_irn_irg(block));
1692 if (! is_Block(block))
1695 if (need_label && (emit_env->cg->opt & IA32_OPT_EXTBB)) {
1696 /* if the extended block scheduler is used, only leader blocks need
1698 need_label = (block == get_extbb_leader(get_nodes_extbb(block)));
1702 ia32_emit_align_label(emit_env->out, emit_env->isa->opt_arch);
1703 fprintf(emit_env->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
1706 sched_foreach(block, irn) {
1707 ia32_emit_node(irn, env);
1712 * Emits code for function start.
1714 static void ia32_emit_func_prolog(FILE *F, ir_graph *irg, cpu_support cpu) {
1715 entity *irg_ent = get_irg_entity(irg);
1716 const char *irg_name = get_entity_ld_name(irg_ent);
1719 ia32_switch_section(F, SECTION_TEXT);
1720 ia32_emit_align_func(F, cpu);
1721 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1722 fprintf(F, ".globl %s\n", irg_name);
1724 ia32_dump_function_object(F, irg_name);
1725 fprintf(F, "%s:\n", irg_name);
1729 * Emits code for function end
1731 static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
1732 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
1734 ia32_dump_function_size(F, irg_name);
1740 * Sets labels for control flow nodes (jump target)
1741 * TODO: Jump optimization
1743 static void ia32_gen_labels(ir_node *block, void *env) {
1745 int n = get_Block_n_cfgpreds(block);
1747 for (n--; n >= 0; n--) {
1748 pred = get_Block_cfgpred(block, n);
1749 set_irn_link(pred, block);
1754 * Main driver. Emits the code for one routine.
1756 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
1757 ia32_emit_env_t emit_env;
1761 emit_env.arch_env = cg->arch_env;
1763 emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
1764 FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
1766 /* set the global arch_env (needed by print hooks) */
1767 arch_env = cg->arch_env;
1769 ia32_register_emitters();
1771 ia32_emit_func_prolog(F, irg, emit_env.isa->opt_arch);
1772 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
1774 if ((cg->opt & IA32_OPT_EXTBB) && cg->blk_sched) {
1775 int i, n = ARR_LEN(cg->blk_sched);
1777 for (i = 0; i < n;) {
1780 block = cg->blk_sched[i];
1782 next_bl = i < n ? cg->blk_sched[i] : NULL;
1784 /* set here the link. the emitter expects to find the next block here */
1785 set_irn_link(block, next_bl);
1786 ia32_gen_block(block, &emit_env);
1790 /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
1791 in the block schedule. As this number should NEVER be equal the next block,
1792 we does not need a clear block link here. */
1793 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
1796 ia32_emit_func_epilog(F, irg);