2 * This file implements the node emitter.
22 #include "iredges_t.h"
24 #include "../besched_t.h"
25 #include "../benode_t.h"
27 #include "ia32_emitter.h"
28 #include "gen_ia32_emitter.h"
29 #include "gen_ia32_regalloc_if.h"
30 #include "ia32_nodes_attr.h"
31 #include "ia32_new_nodes.h"
32 #include "ia32_map_regs.h"
33 #include "bearch_ia32_t.h"
35 #define BLOCK_PREFIX(x) ".L" x
37 #define SNPRINTF_BUF_LEN 128
39 /* global arch_env for lc_printf functions */
40 static const arch_env_t *arch_env = NULL;
42 /** by default, we generate assembler code for the Linux gas */
43 asm_flavour_t asm_flavour = ASM_LINUX_GAS;
46 * Switch to a new section
48 void ia32_switch_section(FILE *F, section_t sec) {
49 static section_t curr_sec = NO_SECTION;
50 static const char *text[ASM_MAX][SECTION_MAX] = {
52 ".section\t.text", ".section\t.data", ".section\t.rodata", ".section\t.text"
55 ".section\t.text", ".section\t.data", ".section .rdata,\"dr\"", ".section\t.text"
72 fprintf(F, "\t%s\n", text[asm_flavour][sec]);
76 static void ia32_dump_function_object(FILE *F, const char *name)
78 switch (asm_flavour) {
80 fprintf(F, "\t.type\t%s, @function\n", name);
83 fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name);
88 static void ia32_dump_function_size(FILE *F, const char *name)
90 switch (asm_flavour) {
92 fprintf(F, "\t.size\t%s, .-%s\n", name, name);
97 /*************************************************************
99 * (_) | | / _| | | | |
100 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
101 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
102 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
103 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
106 *************************************************************/
109 * returns true if a node has x87 registers
111 static int has_x87_register(const ir_node *n) {
112 return is_irn_machine_user(n, 0);
115 /* We always pass the ir_node which is a pointer. */
116 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
117 return lc_arg_type_ptr;
122 * Returns the register at in position pos.
124 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
126 const arch_register_t *reg = NULL;
128 assert(get_irn_arity(irn) > pos && "Invalid IN position");
130 /* The out register of the operator at position pos is the
131 in register we need. */
132 op = get_irn_n(irn, pos);
134 reg = arch_get_irn_register(arch_env, op);
136 assert(reg && "no in register found");
138 /* in case of unknown: just return a register */
139 if (REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN]))
140 reg = &ia32_gp_regs[REG_EAX];
141 else if (REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]))
142 reg = &ia32_xmm_regs[REG_XMM0];
143 else if (REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]))
144 reg = &ia32_vfp_regs[REG_VF0];
145 else if (REGS_ARE_EQUAL(reg, &ia32_st_regs[REG_ST_UKNWN]))
146 reg = &ia32_st_regs[REG_ST0];
152 * Returns the register at out position pos.
154 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
156 const arch_register_t *reg = NULL;
158 /* 1st case: irn is not of mode_T, so it has only */
159 /* one OUT register -> good */
160 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
161 /* Proj with the corresponding projnum for the register */
163 if (get_irn_mode(irn) != mode_T) {
164 reg = arch_get_irn_register(arch_env, irn);
166 else if (is_ia32_irn(irn)) {
167 reg = get_ia32_out_reg(irn, pos);
170 const ir_edge_t *edge;
172 foreach_out_edge(irn, edge) {
173 proj = get_edge_src_irn(edge);
174 assert(is_Proj(proj) && "non-Proj from mode_T node");
175 if (get_Proj_proj(proj) == pos) {
176 reg = arch_get_irn_register(arch_env, proj);
182 assert(reg && "no out register found");
192 * Returns the name of the in register at position pos.
194 static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
195 const arch_register_t *reg;
197 if (in_out == IN_REG) {
198 reg = get_in_reg(irn, pos);
200 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
201 /* FIXME: works for binop only */
202 assert(2 <= pos && pos <= 3);
203 reg = get_ia32_attr(irn)->x87[pos - 2];
207 /* destination address mode nodes don't have outputs */
208 if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
212 reg = get_out_reg(irn, pos);
213 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
214 reg = get_ia32_attr(irn)->x87[pos + 2];
216 return arch_register_get_name(reg);
220 * Get the register name for a node.
222 static int ia32_get_reg_name(lc_appendable_t *app,
223 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
226 ir_node *X = arg->v_ptr;
227 int nr = occ->width - 1;
230 return lc_appendable_snadd(app, "(null)", 6);
232 buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
234 /* append the stupid % to register names */
235 lc_appendable_chadd(app, '%');
236 return lc_appendable_snadd(app, buf, strlen(buf));
240 * Get the x87 register name for a node.
242 static int ia32_get_x87_name(lc_appendable_t *app,
243 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
246 ir_node *X = arg->v_ptr;
247 int nr = occ->width - 1;
251 return lc_appendable_snadd(app, "(null)", 6);
253 attr = get_ia32_attr(X);
254 buf = attr->x87[nr]->name;
255 lc_appendable_chadd(app, '%');
256 return lc_appendable_snadd(app, buf, strlen(buf));
260 * Returns the tarval, offset or scale of an ia32 as a string.
262 static int ia32_const_to_str(lc_appendable_t *app,
263 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
266 ir_node *X = arg->v_ptr;
269 return lc_arg_append(app, occ, "(null)", 6);
271 if (occ->conversion == 'C') {
272 buf = get_ia32_cnst(X);
275 buf = get_ia32_am_offs(X);
278 return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
282 * Determines the SSE suffix depending on the mode.
284 static int ia32_get_mode_suffix(lc_appendable_t *app,
285 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
287 ir_node *X = arg->v_ptr;
288 ir_mode *mode = get_irn_mode(X);
290 if (mode == mode_T) {
291 mode = is_ia32_AddrModeS(X) || is_ia32_AddrModeD(X) ? get_ia32_ls_mode(X) : get_ia32_res_mode(X);
295 return lc_arg_append(app, occ, "(null)", 6);
297 if (mode_is_float(mode)) {
298 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
301 return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
306 * Return the ia32 printf arg environment.
307 * We use the firm environment with some additional handlers.
309 const lc_arg_env_t *ia32_get_arg_env(void) {
310 static lc_arg_env_t *env = NULL;
312 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
313 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
314 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
315 static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
318 /* extend the firm printer */
319 env = firm_get_arg_env();
321 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
322 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
323 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
324 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
325 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
326 lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
332 static char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
333 switch(get_mode_size_bits(mode)) {
335 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
337 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
339 return (char *)arch_register_get_name(reg);
344 * Emits registers and/or address mode of a binary operation.
346 char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
347 static char *buf = NULL;
349 /* verify that this function is never called on non-AM supporting operations */
350 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
352 #define PRODUCES_RESULT(n) \
353 (!(is_ia32_St(n) || \
354 is_ia32_Store8Bit(n) || \
355 is_ia32_CondJmp(n) || \
356 is_ia32_xCondJmp(n) || \
357 is_ia32_SwitchJmp(n)))
360 buf = xcalloc(1, SNPRINTF_BUF_LEN);
363 memset(buf, 0, SNPRINTF_BUF_LEN);
366 switch(get_ia32_op_type(n)) {
368 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
369 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
372 const arch_register_t *in1 = get_in_reg(n, 2);
373 const arch_register_t *in2 = get_in_reg(n, 3);
374 const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
375 const arch_register_t *in;
378 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
379 out = out ? out : in1;
380 in_name = arch_register_get_name(in);
382 if (is_ia32_emit_cl(n)) {
383 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
387 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
391 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
392 assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
393 snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
396 if (PRODUCES_RESULT(n)) {
397 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n, env));
400 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, ia32_emit_am(n, env));
405 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
406 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
407 ia32_emit_am(n, env),
408 is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
409 get_ia32_cnst(n)); /* tell the assembler to store it's address. */
412 const arch_register_t *in1 = get_in_reg(n, 2);
413 ir_mode *mode = get_ia32_res_mode(n);
416 mode = mode ? mode : get_ia32_ls_mode(n);
417 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
419 if (is_ia32_emit_cl(n)) {
420 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
424 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
428 assert(0 && "unsupported op type");
431 #undef PRODUCES_RESULT
437 * Emits registers and/or address mode of a binary operation.
439 char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
440 static char *buf = NULL;
442 /* verify that this function is never called on non-AM supporting operations */
443 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
446 buf = xcalloc(1, SNPRINTF_BUF_LEN);
449 memset(buf, 0, SNPRINTF_BUF_LEN);
452 switch(get_ia32_op_type(n)) {
454 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
455 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
458 ia32_attr_t *attr = get_ia32_attr(n);
459 const arch_register_t *in1 = attr->x87[0];
460 const arch_register_t *in2 = attr->x87[1];
461 const arch_register_t *out = attr->x87[2];
462 const arch_register_t *in;
465 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
466 out = out ? out : in1;
467 in_name = arch_register_get_name(in);
469 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
474 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
477 assert(0 && "unsupported op type");
480 #undef PRODUCES_RESULT
486 * Emits registers and/or address mode of a unary operation.
488 char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
489 static char *buf = NULL;
492 buf = xcalloc(1, SNPRINTF_BUF_LEN);
495 memset(buf, 0, SNPRINTF_BUF_LEN);
498 switch(get_ia32_op_type(n)) {
500 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
501 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
504 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
508 snprintf(buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
511 assert(0 && "unsupported op type");
518 * Emits address mode.
520 char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
521 ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
525 static struct obstack *obst = NULL;
526 ir_mode *mode = get_ia32_ls_mode(n);
528 if (! is_ia32_Lea(n))
529 assert(mode && "AM node must have ls_mode attribute set.");
532 obst = xcalloc(1, sizeof(*obst));
535 obstack_free(obst, NULL);
538 /* obstack_free with NULL results in an uninitialized obstack */
542 switch (get_mode_size_bits(mode)) {
544 obstack_printf(obst, "BYTE PTR ");
547 obstack_printf(obst, "WORD PTR ");
550 obstack_printf(obst, "DWORD PTR ");
553 if (has_x87_register(n))
554 /* ARGHHH: stupid gas x87 wants QWORD PTR but SSE must be WITHOUT */
555 obstack_printf(obst, "QWORD PTR ");
559 obstack_printf(obst, "XWORD PTR ");
566 /* emit address mode symconst */
567 if (get_ia32_am_sc(n)) {
568 if (is_ia32_am_sc_sign(n))
569 obstack_printf(obst, "-");
570 obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
573 if (am_flav & ia32_B) {
574 obstack_printf(obst, "[");
575 lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
579 if (am_flav & ia32_I) {
581 obstack_printf(obst, "+");
584 obstack_printf(obst, "[");
587 lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
589 if (am_flav & ia32_S) {
590 obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
596 if (am_flav & ia32_O) {
597 s = get_ia32_am_offs(n);
600 /* omit explicit + if there was no base or index */
602 obstack_printf(obst, "[");
607 obstack_printf(obst, s);
613 obstack_printf(obst, "] ");
615 size = obstack_object_size(obst);
616 s = obstack_finish(obst);
625 * Formated print of commands and comments.
627 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
629 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
632 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
634 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
640 * Add a number to a prefix. This number will not be used a second time.
642 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
643 static unsigned long id = 0;
644 snprintf(buf, buflen, "%s%lu", prefix, ++id);
650 /*************************************************
653 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
654 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
655 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
656 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
658 *************************************************/
661 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
664 * coding of conditions
666 struct cmp2conditon_t {
672 * positive conditions for signed compares
674 static const struct cmp2conditon_t cmp2condition_s[] = {
675 { NULL, pn_Cmp_False }, /* always false */
676 { "e", pn_Cmp_Eq }, /* == */
677 { "l", pn_Cmp_Lt }, /* < */
678 { "le", pn_Cmp_Le }, /* <= */
679 { "g", pn_Cmp_Gt }, /* > */
680 { "ge", pn_Cmp_Ge }, /* >= */
681 { "ne", pn_Cmp_Lg }, /* != */
682 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
683 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
684 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
685 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
686 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
687 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
688 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
689 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
690 { NULL, pn_Cmp_True }, /* always true */
694 * positive conditions for unsigned compares
696 static const struct cmp2conditon_t cmp2condition_u[] = {
697 { NULL, pn_Cmp_False }, /* always false */
698 { "e", pn_Cmp_Eq }, /* == */
699 { "b", pn_Cmp_Lt }, /* < */
700 { "be", pn_Cmp_Le }, /* <= */
701 { "a", pn_Cmp_Gt }, /* > */
702 { "ae", pn_Cmp_Ge }, /* >= */
703 { "ne", pn_Cmp_Lg }, /* != */
704 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
705 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
706 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
707 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
708 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
709 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
710 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
711 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
712 { NULL, pn_Cmp_True }, /* always true */
716 * returns the condition code
718 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
720 assert(cmp2condition_s[cmp_code].num == cmp_code);
721 assert(cmp2condition_u[cmp_code].num == cmp_code);
723 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
727 * Returns the target block for a control flow node.
729 static ir_node *get_cfop_target_block(const ir_node *irn) {
730 return get_irn_link(irn);
734 * Returns the target label for a control flow node.
736 static char *get_cfop_target(const ir_node *irn, char *buf) {
737 ir_node *bl = get_cfop_target_block(irn);
739 snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
743 /** Return the next block in Block schedule */
744 static ir_node *next_blk_sched(const ir_node *block) {
745 return get_irn_link(block);
749 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
751 static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
752 const ir_node *proj1, *proj2 = NULL;
753 const ir_node *block, *next_bl = NULL;
754 const ir_edge_t *edge;
755 char buf[SNPRINTF_BUF_LEN];
756 char cmd_buf[SNPRINTF_BUF_LEN];
757 char cmnt_buf[SNPRINTF_BUF_LEN];
759 /* get both Proj's */
760 edge = get_irn_out_edge_first(irn);
761 proj1 = get_edge_src_irn(edge);
762 assert(is_Proj(proj1) && "CondJmp with a non-Proj");
764 edge = get_irn_out_edge_next(irn, edge);
766 proj2 = get_edge_src_irn(edge);
767 assert(is_Proj(proj2) && "CondJmp with a non-Proj");
770 /* for now, the code works for scheduled and non-schedules blocks */
771 block = get_nodes_block(irn);
773 /* we have a block schedule */
774 next_bl = next_blk_sched(block);
776 if (get_cfop_target_block(proj1) == next_bl) {
777 /* exchange both proj's so the second one can be omitted */
778 const ir_node *t = proj1;
784 /* the first Proj must always be created */
785 if (get_Proj_proj(proj1) == pn_Cond_true) {
786 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
787 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
788 get_cfop_target(proj1, buf));
789 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
792 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
793 get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
794 !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
795 get_cfop_target(proj1, buf));
796 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
800 /* the second Proj might be a fallthrough */
802 if (get_cfop_target_block(proj2) != next_bl) {
803 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
804 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
808 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrogh %s */", get_cfop_target(proj2, buf));
815 * Emits code for conditional jump.
817 static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
819 char cmd_buf[SNPRINTF_BUF_LEN];
820 char cmnt_buf[SNPRINTF_BUF_LEN];
822 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
823 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
825 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
829 * Emits code for conditional jump with two variables.
831 static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
832 CondJmp_emitter(irn, env);
836 * Emits code for conditional test and jump.
838 static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
840 #define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
843 const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
844 const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
845 char cmd_buf[SNPRINTF_BUF_LEN];
846 char cmnt_buf[SNPRINTF_BUF_LEN];
849 op2 = arch_register_get_name(get_in_reg(irn, 1));
851 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
852 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
855 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
861 * Emits code for conditional test and jump with two variables.
863 static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
864 TestJmp_emitter(irn, env);
867 static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
869 char cmd_buf[SNPRINTF_BUF_LEN];
870 char cmnt_buf[SNPRINTF_BUF_LEN];
872 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
873 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
875 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
878 static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
880 char cmd_buf[SNPRINTF_BUF_LEN];
881 char cmnt_buf[SNPRINTF_BUF_LEN];
883 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
884 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
886 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
890 * Emits code for conditional x87 floating point jump with two variables.
892 static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) {
894 char cmd_buf[SNPRINTF_BUF_LEN];
895 char cmnt_buf[SNPRINTF_BUF_LEN];
896 ia32_attr_t *attr = get_ia32_attr(irn);
897 const char *reg = attr->x87[1]->name;
898 const char *instr = "fcom";
901 switch (get_ia32_pncode(irn)) {
902 case iro_ia32_fcomrJmp:
904 case iro_ia32_fcomJmp:
908 case iro_ia32_fcomrpJmp:
910 case iro_ia32_fcompJmp:
913 case iro_ia32_fcomrppJmp:
915 case iro_ia32_fcomppJmp:
922 set_ia32_pncode(irn, (long)get_negated_pnc(get_ia32_pncode(irn), mode_Is));
924 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s", instr, reg);
925 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
927 // lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %3D", irn);
928 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn);
929 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */");
931 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sahf");
932 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store ah into flags */");
935 finish_CondJmp(F, irn, mode_Is);
938 /*********************************************************
941 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
942 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
943 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
944 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
947 *********************************************************/
949 /* jump table entry (target and corresponding number) */
950 typedef struct _branch_t {
955 /* jump table for switch generation */
956 typedef struct _jmp_tbl_t {
957 ir_node *defProj; /**< default target */
958 int min_value; /**< smallest switch case */
959 int max_value; /**< largest switch case */
960 int num_branches; /**< number of jumps */
961 char *label; /**< label of the jump table */
962 branch_t *branches; /**< jump array */
966 * Compare two variables of type branch_t. Used to sort all switch cases
968 static int ia32_cmp_branch_t(const void *a, const void *b) {
969 branch_t *b1 = (branch_t *)a;
970 branch_t *b2 = (branch_t *)b;
972 if (b1->value <= b2->value)
979 * Emits code for a SwitchJmp (creates a jump table if
980 * possible otherwise a cmp-jmp cascade). Port from
983 static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
984 unsigned long interval;
985 char buf[SNPRINTF_BUF_LEN];
986 int last_value, i, pn;
989 const ir_edge_t *edge;
990 const lc_arg_env_t *env = ia32_get_arg_env();
991 FILE *F = emit_env->out;
992 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
994 /* fill the table structure */
995 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
996 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
998 tbl.num_branches = get_irn_n_edges(irn);
999 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1000 tbl.min_value = INT_MAX;
1001 tbl.max_value = INT_MIN;
1004 /* go over all proj's and collect them */
1005 foreach_out_edge(irn, edge) {
1006 proj = get_edge_src_irn(edge);
1007 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1009 pn = get_Proj_proj(proj);
1011 /* create branch entry */
1012 tbl.branches[i].target = proj;
1013 tbl.branches[i].value = pn;
1015 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
1016 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
1018 /* check for default proj */
1019 if (pn == get_ia32_pncode(irn)) {
1020 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1027 /* sort the branches by their number */
1028 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1030 /* two-complement's magic make this work without overflow */
1031 interval = tbl.max_value - tbl.min_value;
1033 /* emit the table */
1034 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
1035 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
1038 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
1039 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
1042 if (tbl.num_branches > 1) {
1045 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
1046 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
1049 ia32_switch_section(F, SECTION_RODATA);
1050 fprintf(F, "\t.align 4\n");
1052 fprintf(F, "%s:\n", tbl.label);
1054 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
1055 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
1058 last_value = tbl.branches[0].value;
1059 for (i = 1; i < tbl.num_branches; ++i) {
1060 while (++last_value < tbl.branches[i].value) {
1061 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
1062 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
1065 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
1066 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
1069 ia32_switch_section(F, SECTION_TEXT);
1072 /* one jump is enough */
1073 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
1074 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
1085 * Emits code for a unconditional jump.
1087 static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
1088 ir_node *block, *next_bl;
1090 char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1092 /* for now, the code works for scheduled and non-schedules blocks */
1093 block = get_nodes_block(irn);
1095 /* we have a block schedule */
1096 next_bl = next_blk_sched(block);
1097 if (get_cfop_target_block(irn) != next_bl) {
1098 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
1099 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
1103 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
1108 /****************************
1111 * _ __ _ __ ___ _ ___
1112 * | '_ \| '__/ _ \| |/ __|
1113 * | |_) | | | (_) | |\__ \
1114 * | .__/|_| \___/| ||___/
1117 ****************************/
1120 * Emits code for a proj -> node
1122 static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
1123 ir_node *pred = get_Proj_pred(irn);
1125 if (get_irn_op(pred) == op_Start) {
1126 switch(get_Proj_proj(irn)) {
1127 case pn_Start_X_initial_exec:
1136 /**********************************
1139 * | | ___ _ __ _ _| |_) |
1140 * | | / _ \| '_ \| | | | _ <
1141 * | |___| (_) | |_) | |_| | |_) |
1142 * \_____\___/| .__/ \__, |____/
1145 **********************************/
1148 * Emit movsb/w instructions to make mov count divideable by 4
1150 static void emit_CopyB_prolog(FILE *F, int rem, int size) {
1151 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1153 fprintf(F, "\t/* memcopy %d bytes*/\n", size);
1155 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
1156 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
1161 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1162 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
1165 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1166 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
1169 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1170 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1172 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1173 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1181 * Emit rep movsd instruction for memcopy.
1183 static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
1184 FILE *F = emit_env->out;
1185 tarval *tv = get_ia32_Immop_tarval(irn);
1186 int rem = get_tarval_long(tv);
1187 ir_node *size_node = get_irn_n(irn, 2);
1189 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1191 /* beware: size_node could be a be_Copy to fulfill constraints for ecx */
1192 size_node = be_is_Copy(size_node) ? be_get_Copy_op(size_node) : size_node;
1193 size = get_tarval_long(get_ia32_Immop_tarval(size_node));
1195 emit_CopyB_prolog(F, rem, size);
1197 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
1198 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
1203 * Emits unrolled memcopy.
1205 static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
1206 tarval *tv = get_ia32_Immop_tarval(irn);
1207 int size = get_tarval_long(tv);
1208 FILE *F = emit_env->out;
1209 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1211 emit_CopyB_prolog(F, size & 0x3, size);
1215 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
1216 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
1223 /***************************
1227 * | | / _ \| '_ \ \ / /
1228 * | |___| (_) | | | \ V /
1229 * \_____\___/|_| |_|\_/
1231 ***************************/
1234 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1236 static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1237 FILE *F = emit_env->out;
1238 const lc_arg_env_t *env = ia32_get_arg_env();
1239 ir_mode *src_mode = get_ia32_src_mode(irn);
1240 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1241 char *from, *to, buf[64];
1242 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1244 from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
1245 to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
1247 switch(get_ia32_op_type(irn)) {
1249 lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
1251 case ia32_AddrModeS:
1252 lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
1255 assert(0 && "unsupported op type for Conv");
1258 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
1259 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
1263 static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1264 emit_ia32_Conv_with_FP(irn, emit_env);
1267 static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1268 emit_ia32_Conv_with_FP(irn, emit_env);
1271 static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1272 emit_ia32_Conv_with_FP(irn, emit_env);
1276 * Emits code for an Int conversion.
1278 static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1279 FILE *F = emit_env->out;
1280 const lc_arg_env_t *env = ia32_get_arg_env();
1281 char *move_cmd = "movzx";
1282 char *conv_cmd = NULL;
1283 ir_mode *src_mode = get_ia32_src_mode(irn);
1284 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1286 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1287 const arch_register_t *in_reg, *out_reg;
1289 n = get_mode_size_bits(src_mode);
1290 m = get_mode_size_bits(tgt_mode);
1292 if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
1294 if (n == 8 || m == 8)
1296 else if (n == 16 || m == 16)
1299 assert(0 && "unsupported Conv_I2I");
1302 switch(get_ia32_op_type(irn)) {
1304 in_reg = get_in_reg(irn, 2);
1305 out_reg = get_out_reg(irn, 0);
1307 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1308 REGS_ARE_EQUAL(out_reg, in_reg) &&
1309 mode_is_signed(n < m ? src_mode : tgt_mode))
1311 /* argument and result are both in EAX and */
1312 /* signedness is ok: -> use converts */
1313 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
1315 else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
1316 ! mode_is_signed(n < m ? src_mode : tgt_mode))
1318 /* argument and result are in the same register */
1319 /* and signedness is ok: -> use and with mask */
1320 int mask = (1 << (n < m ? n : m)) - 1;
1321 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
1324 /* use move w/o sign extension */
1325 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
1326 move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
1330 case ia32_AddrModeS:
1331 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
1332 move_cmd, irn, ia32_emit_am(irn, emit_env));
1335 assert(0 && "unsupported op type for Conv");
1338 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
1339 irn, n, src_mode, m, tgt_mode);
1345 * Emits code for an 8Bit Int conversion.
1347 void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
1348 emit_ia32_Conv_I2I(irn, emit_env);
1352 /*******************************************
1355 * | |__ ___ _ __ ___ __| | ___ ___
1356 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1357 * | |_) | __/ | | | (_) | (_| | __/\__ \
1358 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1360 *******************************************/
1363 * Emits a backend call
1365 static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
1366 FILE *F = emit_env->out;
1367 entity *ent = be_Call_get_entity(irn);
1368 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1371 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
1374 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
1377 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
1383 * Emits code to increase stack pointer.
1385 static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1386 FILE *F = emit_env->out;
1387 unsigned offs = be_get_IncSP_offset(irn);
1388 be_stack_dir_t dir = be_get_IncSP_direction(irn);
1389 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1392 if (dir == be_stack_dir_expand)
1393 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
1395 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
1396 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
1399 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
1400 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
1407 * Emits code to set stack pointer.
1409 static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1410 FILE *F = emit_env->out;
1411 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1413 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1414 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
1419 * Emits code for Copy.
1421 static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
1422 FILE *F = emit_env->out;
1423 const arch_env_t *aenv = emit_env->arch_env;
1424 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1426 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))))
1429 if (mode_is_float(get_irn_mode(irn)))
1430 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
1432 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
1433 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1438 * Emits code for exchange.
1440 static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
1441 FILE *F = emit_env->out;
1442 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1444 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
1445 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
1450 * Emits code for Constant loading.
1452 static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) {
1454 char cmd_buf[256], cmnt_buf[256];
1455 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1457 if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) {
1458 const char *instr = "xor";
1459 if (env->isa->opt_arch == arch_pentium_4) {
1460 /* P4 prefers sub r, r, others xor r, r */
1463 lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n);
1464 lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */");
1467 if (get_ia32_op_type(n) == ia32_SymConst) {
1468 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n);
1469 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */");
1472 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n);
1473 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */");
1476 lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n);
1481 /***********************************************************************************
1484 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1485 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1486 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1487 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1489 ***********************************************************************************/
1492 * Enters the emitter functions for handled nodes into the generic
1493 * pointer of an opcode.
1495 static void ia32_register_emitters(void) {
1497 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1498 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1499 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1500 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1502 /* first clear the generic function pointer for all ops */
1503 clear_irp_opcodes_generic_func();
1505 /* register all emitter functions defined in spec */
1506 ia32_register_spec_emitters();
1508 /* other ia32 emitter functions */
1513 IA32_EMIT(SwitchJmp);
1516 IA32_EMIT(Conv_I2FP);
1517 IA32_EMIT(Conv_FP2I);
1518 IA32_EMIT(Conv_FP2FP);
1519 IA32_EMIT(Conv_I2I);
1520 IA32_EMIT(Conv_I2I8Bit);
1522 IA32_EMIT2(fcomJmp, x87CondJmp);
1523 IA32_EMIT2(fcompJmp, x87CondJmp);
1524 IA32_EMIT2(fcomppJmp, x87CondJmp);
1525 IA32_EMIT2(fcomrJmp, x87CondJmp);
1526 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1527 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1529 /* benode emitter */
1547 * Emits code for a node.
1549 static void ia32_emit_node(const ir_node *irn, void *env) {
1550 ia32_emit_env_t *emit_env = env;
1551 FILE *F = emit_env->out;
1552 ir_op *op = get_irn_op(irn);
1553 DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
1555 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
1557 if (op->ops.generic) {
1558 void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
1562 ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
1567 * Emits gas alignment directives
1569 static void ia32_emit_alignment(FILE *F, unsigned align, unsigned skip) {
1570 fprintf(F, "\t.p2align %u,,%u\n", align, skip);
1574 * Emits gas alignment directives for Functions depended on cpu architecture.
1576 static void ia32_emit_align_func(FILE *F, cpu_support cpu) {
1577 unsigned align; unsigned maximum_skip;
1579 /* gcc doesn't emit alignment for p4 ?*/
1580 if (cpu == arch_pentium_4)
1585 align = 2; maximum_skip = 3;
1588 align = 4; maximum_skip = 15;
1591 align = 5; maximum_skip = 31;
1594 align = 4; maximum_skip = 15;
1596 ia32_emit_alignment(F, align, maximum_skip);
1600 * Emits gas alignment directives for Labels depended on cpu architecture.
1602 static void ia32_emit_align_label(FILE *F, cpu_support cpu) {
1603 unsigned align; unsigned maximum_skip;
1605 /* gcc doesn't emit alignment for p4 ?*/
1606 if (cpu == arch_pentium_4)
1611 align = 2; maximum_skip = 3;
1614 align = 4; maximum_skip = 15;
1617 align = 5; maximum_skip = 7;
1620 align = 4; maximum_skip = 7;
1622 ia32_emit_alignment(F, align, maximum_skip);
1626 * Walks over the nodes in a block connected by scheduling edges
1627 * and emits code for each node.
1629 static void ia32_gen_block(ir_node *block, void *env) {
1630 ia32_emit_env_t *emit_env = env;
1632 int need_label = block != get_irg_start_block(get_irn_irg(block));
1634 if (! is_Block(block))
1637 if (need_label && (emit_env->cg->opt & IA32_OPT_EXTBB)) {
1638 /* if the extended block scheduler is used, only leader blocks need
1640 need_label = (block == get_extbb_leader(get_nodes_extbb(block)));
1644 ia32_emit_align_label(emit_env->out, emit_env->isa->opt_arch);
1645 fprintf(emit_env->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
1648 sched_foreach(block, irn) {
1649 ia32_emit_node(irn, env);
1654 * Emits code for function start.
1656 static void ia32_emit_func_prolog(FILE *F, ir_graph *irg, cpu_support cpu) {
1657 entity *irg_ent = get_irg_entity(irg);
1658 const char *irg_name = get_entity_ld_name(irg_ent);
1661 ia32_switch_section(F, SECTION_TEXT);
1662 ia32_emit_align_func(F, cpu);
1663 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1664 fprintf(F, ".globl %s\n", irg_name);
1666 ia32_dump_function_object(F, irg_name);
1667 fprintf(F, "%s:\n", irg_name);
1671 * Emits code for function end
1673 static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
1674 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
1676 fprintf(F, "\tret\n");
1677 ia32_dump_function_size(F, irg_name);
1683 * Sets labels for control flow nodes (jump target)
1684 * TODO: Jump optimization
1686 static void ia32_gen_labels(ir_node *block, void *env) {
1688 int n = get_Block_n_cfgpreds(block);
1690 for (n--; n >= 0; n--) {
1691 pred = get_Block_cfgpred(block, n);
1692 set_irn_link(pred, block);
1697 * Main driver. Emits the code for one routine.
1699 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
1700 ia32_emit_env_t emit_env;
1704 emit_env.arch_env = cg->arch_env;
1706 emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
1707 FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
1709 /* set the global arch_env (needed by print hooks) */
1710 arch_env = cg->arch_env;
1712 ia32_register_emitters();
1714 ia32_emit_func_prolog(F, irg, emit_env.isa->opt_arch);
1715 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
1717 if ((cg->opt & IA32_OPT_EXTBB) && cg->blk_sched) {
1718 int i, n = ARR_LEN(cg->blk_sched);
1720 for (i = 0; i < n;) {
1723 block = cg->blk_sched[i];
1725 next_bl = i < n ? cg->blk_sched[i] : NULL;
1727 /* set here the link. the emitter expects to find the next block here */
1728 set_irn_link(block, next_bl);
1729 ia32_gen_block(block, &emit_env);
1733 /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
1734 in the block schedule. As this number should NEVER be equal the next block,
1735 we does not need a clear block link here. */
1736 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
1739 ia32_emit_func_epilog(F, irg);