2 * This file implements the node emitter.
3 * @author Christian Wuerdig
22 #include "iredges_t.h"
25 #include "../besched_t.h"
26 #include "../benode_t.h"
28 #include "../be_dbgout.h"
30 #include "ia32_emitter.h"
31 #include "gen_ia32_emitter.h"
32 #include "gen_ia32_regalloc_if.h"
33 #include "ia32_nodes_attr.h"
34 #include "ia32_new_nodes.h"
35 #include "ia32_map_regs.h"
36 #include "bearch_ia32_t.h"
38 #define BLOCK_PREFIX(x) ".L" x
40 #define SNPRINTF_BUF_LEN 128
42 /* global arch_env for lc_printf functions */
43 static const arch_env_t *arch_env = NULL;
45 /** by default, we generate assembler code for the Linux gas */
46 asm_flavour_t asm_flavour = ASM_LINUX_GAS;
49 * Switch to a new section
51 void ia32_switch_section(FILE *F, section_t sec) {
52 static section_t curr_sec = NO_SECTION;
53 static const char *text[ASM_MAX][SECTION_MAX] = {
59 ".section\t.tbss,\"awT\",@nobits",
60 ".section\t.ctors,\"aw\",@progbits"
65 ".section .rdata,\"dr\"",
67 ".section\t.tbss,\"awT\",@nobits",
68 ".section\t.ctors,\"aw\",@progbits"
87 fprintf(F, "\t%s\n", text[asm_flavour][sec]);
95 static void ia32_dump_function_object(FILE *F, const char *name)
97 switch (asm_flavour) {
99 fprintf(F, "\t.type\t%s, @function\n", name);
102 fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name);
109 static void ia32_dump_function_size(FILE *F, const char *name)
111 switch (asm_flavour) {
113 fprintf(F, "\t.size\t%s, .-%s\n", name, name);
120 /*************************************************************
122 * (_) | | / _| | | | |
123 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
124 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
125 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
126 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
129 *************************************************************/
131 /* We always pass the ir_node which is a pointer. */
132 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
133 return lc_arg_type_ptr;
138 * Returns the register at in position pos.
140 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
142 const arch_register_t *reg = NULL;
144 assert(get_irn_arity(irn) > pos && "Invalid IN position");
146 /* The out register of the operator at position pos is the
147 in register we need. */
148 op = get_irn_n(irn, pos);
150 reg = arch_get_irn_register(arch_env, op);
152 assert(reg && "no in register found");
154 /* in case of a joker register: just return a valid register */
155 if (arch_register_type_is(reg, joker)) {
156 arch_register_req_t req;
157 const arch_register_req_t *p_req;
159 /* ask for the requirements */
160 p_req = arch_get_register_req(arch_env, &req, irn, pos);
162 if (arch_register_req_is(p_req, limited)) {
163 /* in case of limited requirements: get the first allowed register */
165 bitset_t *bs = bitset_alloca(arch_register_class_n_regs(p_req->cls));
168 p_req->limited(p_req->limited_env, bs);
169 idx = bitset_next_set(bs, 0);
170 reg = arch_register_for_index(p_req->cls, idx);
173 /* otherwise get first register in class */
174 reg = arch_register_for_index(p_req->cls, 0);
182 * Returns the register at out position pos.
184 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
186 const arch_register_t *reg = NULL;
188 /* 1st case: irn is not of mode_T, so it has only */
189 /* one OUT register -> good */
190 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
191 /* Proj with the corresponding projnum for the register */
193 if (get_irn_mode(irn) != mode_T) {
194 reg = arch_get_irn_register(arch_env, irn);
196 else if (is_ia32_irn(irn)) {
197 reg = get_ia32_out_reg(irn, pos);
200 const ir_edge_t *edge;
202 foreach_out_edge(irn, edge) {
203 proj = get_edge_src_irn(edge);
204 assert(is_Proj(proj) && "non-Proj from mode_T node");
205 if (get_Proj_proj(proj) == pos) {
206 reg = arch_get_irn_register(arch_env, proj);
212 assert(reg && "no out register found");
222 * Returns the name of the in register at position pos.
224 static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
225 const arch_register_t *reg;
227 if (in_out == IN_REG) {
228 reg = get_in_reg(irn, pos);
230 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
231 /* FIXME: works for binop only */
232 assert(2 <= pos && pos <= 3);
233 reg = get_ia32_attr(irn)->x87[pos - 2];
237 /* destination address mode nodes don't have outputs */
238 if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
242 reg = get_out_reg(irn, pos);
243 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
244 reg = get_ia32_attr(irn)->x87[pos + 2];
246 return arch_register_get_name(reg);
250 * Get the register name for a node.
252 static int ia32_get_reg_name(lc_appendable_t *app,
253 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
256 ir_node *irn = arg->v_ptr;
257 int nr = occ->width - 1;
260 return lc_appendable_snadd(app, "(null)", 6);
262 buf = get_ia32_reg_name(irn, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
264 /* append the stupid % to register names */
265 lc_appendable_chadd(app, '%');
266 return lc_appendable_snadd(app, buf, strlen(buf));
270 * Get the x87 register name for a node.
272 static int ia32_get_x87_name(lc_appendable_t *app,
273 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
276 ir_node *irn = arg->v_ptr;
277 int nr = occ->width - 1;
282 return lc_appendable_snadd(app, "(null)", 6);
284 attr = get_ia32_attr(irn);
285 buf = attr->x87[nr]->name;
287 res += lc_appendable_chadd(app, '%');
288 res += lc_appendable_snadd(app, buf, strlen(buf));
294 * Returns the tarval, offset or scale of an ia32 as a string.
296 static int ia32_const_to_str(lc_appendable_t *app,
297 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
300 ir_node *irn = arg->v_ptr;
303 return lc_arg_append(app, occ, "(null)", 6);
305 if (occ->conversion == 'C') {
306 buf = get_ia32_cnst(irn);
309 buf = get_ia32_am_offs(irn);
312 return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
316 * Determines the SSE suffix depending on the mode.
318 static int ia32_get_mode_suffix(lc_appendable_t *app,
319 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
321 ir_node *irn = arg->v_ptr;
322 ir_mode *mode = get_ia32_ls_mode(irn);;
324 if (mode == mode_T) {
325 mode = get_ia32_ls_mode(irn);
326 assert(mode != NULL);
330 return lc_arg_append(app, occ, "(null)", 6);
332 if (mode_is_float(mode)) {
333 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
336 return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
341 * Return the ia32 printf arg environment.
342 * We use the firm environment with some additional handlers.
344 const lc_arg_env_t *ia32_get_arg_env(void) {
345 static lc_arg_env_t *env = NULL;
347 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
348 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
349 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
350 static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
353 /* extend the firm printer */
354 env = firm_get_arg_env();
356 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
357 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
358 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
359 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
360 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
361 lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
367 static const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
368 switch(get_mode_size_bits(mode)) {
370 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
372 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
374 return (char *)arch_register_get_name(reg);
379 * Emits registers and/or address mode of a binary operation.
381 const char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
382 static char *buf = NULL;
384 #define PRODUCES_RESULT(n) \
385 (!(is_ia32_St(n) || \
386 is_ia32_Store8Bit(n) || \
387 is_ia32_CondJmp(n) || \
388 is_ia32_xCondJmp(n) || \
389 is_ia32_CmpSet(n) || \
390 is_ia32_xCmpSet(n) || \
391 is_ia32_SwitchJmp(n)))
394 buf = xcalloc(1, SNPRINTF_BUF_LEN);
397 memset(buf, 0, SNPRINTF_BUF_LEN);
400 switch(get_ia32_op_type(n)) {
402 if (is_ia32_ImmConst(n)) {
403 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
405 else if (is_ia32_ImmSymConst(n)) {
406 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, OFFSET FLAT:%s", n, get_ia32_cnst(n));
409 const arch_register_t *in1 = get_in_reg(n, 2);
410 const arch_register_t *in2 = get_in_reg(n, 3);
411 const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
412 const arch_register_t *in;
415 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
416 out = out ? out : in1;
417 in_name = arch_register_get_name(in);
419 if (is_ia32_emit_cl(n)) {
420 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
424 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
428 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
429 assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
430 snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
433 if (PRODUCES_RESULT(n)) {
434 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n, env));
437 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, ia32_emit_am(n, env));
442 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
443 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
444 ia32_emit_am(n, env),
445 is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
446 get_ia32_cnst(n)); /* tell the assembler to store it's address. */
449 const arch_register_t *in1 = get_in_reg(n, get_irn_arity(n) == 5 ? 3 : 2);
450 ir_mode *mode = get_ia32_ls_mode(n);
454 // except stores only integer nodes support dest AM
458 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
460 if (is_ia32_emit_cl(n)) {
461 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
465 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
469 assert(0 && "unsupported op type");
472 #undef PRODUCES_RESULT
478 * Returns the xxx PTR string for a given mode
480 * @param mode the mode
481 * @param x87_insn if non-zero returns the string for a x87 instruction
482 * else for a SSE instruction
484 static const char *pointer_size(ir_mode *mode, int x87_insn)
487 switch (get_mode_size_bits(mode)) {
488 case 8: return "BYTE PTR";
489 case 16: return "WORD PTR";
490 case 32: return "DWORD PTR";
496 case 96: return "XWORD PTR";
497 default: return NULL;
504 * Emits registers and/or address mode of a binary operation.
506 const char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
507 static char *buf = NULL;
509 /* verify that this function is never called on non-AM supporting operations */
510 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
513 buf = xcalloc(1, SNPRINTF_BUF_LEN);
516 memset(buf, 0, SNPRINTF_BUF_LEN);
519 switch(get_ia32_op_type(n)) {
521 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
522 ir_mode *mode = get_ia32_ls_mode(n);
523 const char *p = pointer_size(mode, 1);
524 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s %s", p, get_ia32_cnst(n));
527 ia32_attr_t *attr = get_ia32_attr(n);
528 const arch_register_t *in1 = attr->x87[0];
529 const arch_register_t *in2 = attr->x87[1];
530 const arch_register_t *out = attr->x87[2];
531 const arch_register_t *in;
533 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
534 out = out ? out : in1;
536 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s",
537 arch_register_get_name(out), arch_register_get_name(in));
542 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
545 assert(0 && "unsupported op type");
552 * Emits registers and/or address mode of a unary operation.
554 const char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
555 static char *buf = NULL;
558 buf = xcalloc(1, SNPRINTF_BUF_LEN);
561 memset(buf, 0, SNPRINTF_BUF_LEN);
564 switch(get_ia32_op_type(n)) {
566 if (is_ia32_ImmConst(n)) {
567 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
569 else if (is_ia32_ImmSymConst(n)) {
570 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "OFFSET FLAT:%C", n);
573 if (is_ia32_MulS(n) || is_ia32_Mulh(n)) {
574 /* MulS and Mulh implicitly multiply by EAX */
575 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S", n);
576 } else if(is_ia32_Push(n)) {
577 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S", n);
578 } else if(is_ia32_Pop(n)) {
579 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%2D", n);
581 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
586 assert(!is_ia32_Push(n));
587 snprintf(buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
591 Mulh is emitted via emit_unop
592 imul [MEM] means EDX:EAX <- EAX * [MEM]
594 assert((is_ia32_Mulh(n) || is_ia32_MulS(n) || is_ia32_Push(n)) && "Only MulS and Mulh can have AM source as unop");
595 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
598 assert(0 && "unsupported op type");
605 * Emits address mode.
607 const char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
608 ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
612 static struct obstack *obst = NULL;
613 ir_mode *mode = get_ia32_ls_mode(n);
615 /* just to be sure... */
616 assert(!is_ia32_use_frame(n) || get_ia32_frame_ent(n) != NULL);
618 if (! is_ia32_Lea(n))
619 assert(mode && "AM node must have ls_mode attribute set.");
622 obst = xcalloc(1, sizeof(*obst));
625 obstack_free(obst, NULL);
628 /* obstack_free with NULL results in an uninitialized obstack */
631 p = pointer_size(mode, ia32_has_x87_register(n) || is_ia32_GetST0(n) || is_ia32_SetST0(n));
633 obstack_printf(obst, "%s ", p);
635 /* emit address mode symconst */
636 if (get_ia32_am_sc(n)) {
637 if (is_ia32_am_sc_sign(n))
638 obstack_printf(obst, "-");
639 obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
642 if (am_flav & ia32_B) {
643 obstack_printf(obst, "[");
644 lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
648 if (am_flav & ia32_I) {
650 obstack_printf(obst, "+");
653 obstack_printf(obst, "[");
656 lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
658 if (am_flav & ia32_S) {
659 obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
665 if (am_flav & ia32_O) {
666 int offs = get_ia32_am_offs_int(n);
669 /* omit explicit + if there was no base or index */
671 obstack_printf(obst, "[%d", offs);
673 obstack_printf(obst, "%+d", offs);
681 obstack_printf(obst, "] ");
683 obstack_1grow(obst, '\0');
684 s = obstack_finish(obst);
692 const char *ia32_emit_adr(const ir_node *irn, ia32_emit_env_t *env)
694 static char buf[SNPRINTF_BUF_LEN];
695 ir_mode *mode = get_ia32_ls_mode(irn);
696 const char *adr = get_ia32_cnst(irn);
697 const char *pref = pointer_size(mode, ia32_has_x87_register(irn));
699 snprintf(buf, SNPRINTF_BUF_LEN, "%s %s", pref ? pref : "", adr);
704 * Formated print of commands and comments.
706 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
708 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
711 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
713 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
719 * Add a number to a prefix. This number will not be used a second time.
721 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
722 static unsigned long id = 0;
723 snprintf(buf, buflen, "%s%lu", prefix, ++id);
729 /*************************************************
732 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
733 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
734 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
735 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
737 *************************************************/
740 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
743 * coding of conditions
745 struct cmp2conditon_t {
751 * positive conditions for signed compares
753 static const struct cmp2conditon_t cmp2condition_s[] = {
754 { NULL, pn_Cmp_False }, /* always false */
755 { "e", pn_Cmp_Eq }, /* == */
756 { "l", pn_Cmp_Lt }, /* < */
757 { "le", pn_Cmp_Le }, /* <= */
758 { "g", pn_Cmp_Gt }, /* > */
759 { "ge", pn_Cmp_Ge }, /* >= */
760 { "ne", pn_Cmp_Lg }, /* != */
761 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
762 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
763 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
764 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
765 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
766 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
767 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
768 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
769 { NULL, pn_Cmp_True }, /* always true */
773 * positive conditions for unsigned compares
775 static const struct cmp2conditon_t cmp2condition_u[] = {
776 { NULL, pn_Cmp_False }, /* always false */
777 { "e", pn_Cmp_Eq }, /* == */
778 { "b", pn_Cmp_Lt }, /* < */
779 { "be", pn_Cmp_Le }, /* <= */
780 { "a", pn_Cmp_Gt }, /* > */
781 { "ae", pn_Cmp_Ge }, /* >= */
782 { "ne", pn_Cmp_Lg }, /* != */
783 { NULL, pn_Cmp_True }, /* always true */
787 * returns the condition code
789 static const char *get_cmp_suffix(int cmp_code)
791 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
792 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
794 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
795 return cmp2condition_u[cmp_code & 7].name;
797 return cmp2condition_s[cmp_code & 15].name;
802 * Returns the target block for a control flow node.
804 static ir_node *get_cfop_target_block(const ir_node *irn) {
805 return get_irn_link(irn);
809 * Returns the target label for a control flow node.
811 static char *get_cfop_target(const ir_node *irn, char *buf) {
812 ir_node *bl = get_cfop_target_block(irn);
814 snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
818 /** Return the next block in Block schedule */
819 static ir_node *next_blk_sched(const ir_node *block) {
820 return get_irn_link(block);
824 * Returns the Proj with projection number proj and NOT mode_M
826 static ir_node *get_proj(const ir_node *irn, long proj) {
827 const ir_edge_t *edge;
830 assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
832 foreach_out_edge(irn, edge) {
833 src = get_edge_src_irn(edge);
835 assert(is_Proj(src) && "Proj expected");
836 if (get_irn_mode(src) == mode_M)
839 if (get_Proj_proj(src) == proj)
846 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
848 static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
849 const ir_node *proj_true;
850 const ir_node *proj_false;
851 const ir_node *block;
852 const ir_node *next_block;
853 char buf[SNPRINTF_BUF_LEN];
854 char cmd_buf[SNPRINTF_BUF_LEN];
855 char cmnt_buf[SNPRINTF_BUF_LEN];
860 /* get both Proj's */
861 proj_true = get_proj(irn, pn_Cond_true);
862 assert(proj_true && "CondJmp without true Proj");
864 proj_false = get_proj(irn, pn_Cond_false);
865 assert(proj_false && "CondJmp without false Proj");
867 pnc = get_ia32_pncode(irn);
869 /* for now, the code works for scheduled and non-schedules blocks */
870 block = get_nodes_block(irn);
872 /* we have a block schedule */
873 next_block = next_blk_sched(block);
875 if (get_cfop_target_block(proj_true) == next_block) {
876 /* exchange both proj's so the second one can be omitted */
877 const ir_node *t = proj_true;
879 proj_true = proj_false;
882 pnc = get_negated_pnc(pnc, mode);
885 /* the first Proj must always be created */
886 is_unsigned = mode_is_float(mode) || ! mode_is_signed(mode);
888 /* in case of unordered compare, check for parity */
889 if (pnc & pn_Cmp_Uo) {
890 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jp %s", get_cfop_target(proj_true, buf));
891 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* jump to false if result is unordered */");
895 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
897 get_cfop_target(proj_true, buf));
898 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* %s(a, b) %s*/",
899 get_pnc_string(pnc & ~ia32_pn_Cmp_Unsigned), flipped ? "(was flipped)" : "");
902 /* the second Proj might be a fallthrough */
903 if (get_cfop_target_block(proj_false) != next_block) {
904 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj_false, buf));
905 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
909 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(proj_false, buf));
915 * Emits code for conditional jump.
917 static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
919 char cmd_buf[SNPRINTF_BUF_LEN];
920 char cmnt_buf[SNPRINTF_BUF_LEN];
922 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
923 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
925 finish_CondJmp(F, irn, mode_Is);
929 * Emits code for conditional jump with two variables.
931 static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
932 CondJmp_emitter(irn, env);
936 * Emits code for conditional test and jump.
938 static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
940 #define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
943 const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
944 const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
945 char cmd_buf[SNPRINTF_BUF_LEN];
946 char cmnt_buf[SNPRINTF_BUF_LEN];
949 op2 = arch_register_get_name(get_in_reg(irn, 1));
951 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
952 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
955 finish_CondJmp(F, irn, mode_Is);
961 * Emits code for conditional test and jump with two variables.
963 static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
964 TestJmp_emitter(irn, env);
967 static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
969 char cmd_buf[SNPRINTF_BUF_LEN];
970 char cmnt_buf[SNPRINTF_BUF_LEN];
972 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
973 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
975 finish_CondJmp(F, irn, mode_Is);
978 static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
980 char cmd_buf[SNPRINTF_BUF_LEN];
981 char cmnt_buf[SNPRINTF_BUF_LEN];
983 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
984 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
986 finish_CondJmp(F, irn, mode_Is);
990 * Emits code for conditional SSE floating point jump with two variables.
992 static void emit_ia32_xCondJmp(ir_node *irn, ia32_emit_env_t *env) {
994 char cmd_buf[SNPRINTF_BUF_LEN];
995 char cmnt_buf[SNPRINTF_BUF_LEN];
996 const lc_arg_env_t *arg_env = ia32_get_arg_env();
998 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %s", irn, ia32_emit_binop(irn, env));
999 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1002 finish_CondJmp(F, irn, mode_F);
1006 * Emits code for conditional x87 floating point jump with two variables.
1008 static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) {
1010 char cmd_buf[SNPRINTF_BUF_LEN];
1011 char cmnt_buf[SNPRINTF_BUF_LEN];
1012 ia32_attr_t *attr = get_ia32_attr(irn);
1013 const char *reg = attr->x87[1]->name;
1014 const char *instr = "fcom";
1017 switch (get_ia32_irn_opcode(irn)) {
1018 case iro_ia32_fcomrJmp:
1020 case iro_ia32_fcomJmp:
1024 case iro_ia32_fcomrpJmp:
1026 case iro_ia32_fcompJmp:
1029 case iro_ia32_fcomrppJmp:
1031 case iro_ia32_fcomppJmp:
1038 set_ia32_pncode(irn, get_inversed_pnc(get_ia32_pncode(irn)));
1040 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s%s", instr, reg[0] == '\0' ? "" : "%", reg);
1041 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1043 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn);
1044 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */");
1046 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sahf");
1047 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store ah into flags */");
1050 /* the compare flags must be evaluated using carry , ie unsigned */
1051 finish_CondJmp(F, irn, mode_Is);
1054 static void CMov_emitter(ir_node *irn, ia32_emit_env_t *env) {
1056 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1057 const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn));
1058 int is_PsiCondCMov = is_ia32_PsiCondCMov(irn);
1059 int idx_left = 2 - is_PsiCondCMov;
1060 int idx_right = 3 - is_PsiCondCMov;
1062 char cmd_buf[SNPRINTF_BUF_LEN];
1063 char cmnt_buf[SNPRINTF_BUF_LEN];
1064 const arch_register_t *in1, *in2, *out;
1066 out = arch_get_irn_register(env->arch_env, irn);
1067 in1 = arch_get_irn_register(env->arch_env, get_irn_n(irn, idx_left));
1068 in2 = arch_get_irn_register(env->arch_env, get_irn_n(irn, idx_right));
1070 /* we have to emit the cmp first, because the destination register */
1071 /* could be one of the compare registers */
1072 if (is_ia32_CmpCMov(irn)) {
1073 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn);
1075 else if (is_ia32_xCmpCMov(irn)) {
1076 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %1S, %2S", get_irn_n(irn, 0), irn, irn);
1078 else if (is_PsiCondCMov) {
1079 /* omit compare because flags are already set by And/Or */
1080 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "test %1S, %1S", irn, irn);
1083 assert(0 && "unsupported CMov");
1085 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Psi condition */" );
1088 if (REGS_ARE_EQUAL(out, in2)) {
1089 /* best case: default in == out -> do nothing */
1091 else if (REGS_ARE_EQUAL(out, in1)) {
1092 /* true in == out -> need complement compare and exchange true and default in */
1093 ir_node *t = get_irn_n(irn, idx_left);
1094 set_irn_n(irn, idx_left, get_irn_n(irn, idx_right));
1095 set_irn_n(irn, idx_right, t);
1097 cmp_suffix = get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), get_irn_mode(irn)));
1101 /* out is different from in: need copy default -> out */
1103 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1105 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %4S", irn, irn);
1107 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* copy default -> out */" );
1112 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmov%s %1D, %2S", cmp_suffix, irn, irn);
1114 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmov%s %1D, %3S", cmp_suffix, irn, irn);
1116 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* condition is true case */" );
1120 static void emit_ia32_CmpCMov(ir_node *irn, ia32_emit_env_t *env) {
1121 CMov_emitter(irn, env);
1124 static void emit_ia32_PsiCondCMov(ir_node *irn, ia32_emit_env_t *env) {
1125 CMov_emitter(irn, env);
1128 static void emit_ia32_xCmpCMov(ir_node *irn, ia32_emit_env_t *env) {
1129 CMov_emitter(irn, env);
1132 static void Set_emitter(ir_node *irn, ir_mode *mode, ia32_emit_env_t *env) {
1134 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1135 const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn));
1136 const char *reg8bit;
1138 char cmd_buf[SNPRINTF_BUF_LEN];
1139 char cmnt_buf[SNPRINTF_BUF_LEN];
1140 const arch_register_t *out;
1142 out = arch_get_irn_register(env->arch_env, irn);
1143 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1145 if (is_ia32_CmpSet(irn)) {
1146 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
1148 else if (is_ia32_xCmpSet(irn)) {
1149 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %s", get_irn_n(irn, 2), ia32_emit_binop(irn, env));
1151 else if (is_ia32_PsiCondSet(irn)) {
1152 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, 0", irn);
1155 assert(0 && "unsupported Set");
1157 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* calculate Psi condition */" );
1160 /* use mov to clear target because it doesn't affect the eflags */
1161 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "mov %%%s, 0", arch_register_get_name(out));
1162 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */");
1165 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "set%s %%%s", cmp_suffix, reg8bit);
1166 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* set 1 iff true, 0 otherweise */" );
1170 static void emit_ia32_CmpSet(ir_node *irn, ia32_emit_env_t *env) {
1171 Set_emitter(irn, get_irn_mode(get_irn_n(irn, 2)), env);
1174 static void emit_ia32_PsiCondSet(ir_node *irn, ia32_emit_env_t *env) {
1175 Set_emitter(irn, get_irn_mode(get_irn_n(irn, 0)), env);
1178 static void emit_ia32_xCmpSet(ir_node *irn, ia32_emit_env_t *env) {
1179 Set_emitter(irn, get_irn_mode(get_irn_n(irn, 2)), env);
1182 static void emit_ia32_xCmp(ir_node *irn, ia32_emit_env_t *env) {
1184 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1186 long pnc = get_ia32_pncode(irn);
1187 long unord = pnc & pn_Cmp_Uo;
1188 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1189 char cmd_buf[SNPRINTF_BUF_LEN];
1190 char cmnt_buf[SNPRINTF_BUF_LEN];
1193 case pn_Cmp_Leg: /* odered */
1196 case pn_Cmp_Uo: /* unordered */
1200 case pn_Cmp_Eq: /* == */
1204 case pn_Cmp_Lt: /* < */
1208 case pn_Cmp_Le: /* <= */
1212 case pn_Cmp_Gt: /* > */
1216 case pn_Cmp_Ge: /* >= */
1220 case pn_Cmp_Lg: /* != */
1225 assert(sse_pnc >= 0 && "unsupported compare");
1227 if (unord && sse_pnc != 3) {
1229 We need a separate compare against unordered.
1230 Quick and Dirty solution:
1231 - get some memory on stack
1235 - and result and stored result
1238 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sub %%esp, 8");
1239 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* reserve some space for unordered compare result */");
1241 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmpsd %s, 3", ia32_emit_binop(irn, env));
1242 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* SSE compare: unordered */");
1244 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "movsd [%%esp], %1D", irn);
1245 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* store compare result */");
1249 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmpsd %s, %d", ia32_emit_binop(irn, env), sse_pnc);
1250 lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* SSE compare (%+F) with result in %1D */", irn, irn);
1253 if (unord && sse_pnc != 3) {
1254 lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "andpd %1D, [%%esp]", irn);
1255 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* build the final result */");
1257 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "add %%esp, 8");
1258 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* free allocated space */");
1263 /*********************************************************
1266 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1267 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1268 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1269 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1272 *********************************************************/
1274 /* jump table entry (target and corresponding number) */
1275 typedef struct _branch_t {
1280 /* jump table for switch generation */
1281 typedef struct _jmp_tbl_t {
1282 ir_node *defProj; /**< default target */
1283 int min_value; /**< smallest switch case */
1284 int max_value; /**< largest switch case */
1285 int num_branches; /**< number of jumps */
1286 char *label; /**< label of the jump table */
1287 branch_t *branches; /**< jump array */
1291 * Compare two variables of type branch_t. Used to sort all switch cases
1293 static int ia32_cmp_branch_t(const void *a, const void *b) {
1294 branch_t *b1 = (branch_t *)a;
1295 branch_t *b2 = (branch_t *)b;
1297 if (b1->value <= b2->value)
1304 * Emits code for a SwitchJmp (creates a jump table if
1305 * possible otherwise a cmp-jmp cascade). Port from
1308 static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
1309 unsigned long interval;
1310 char buf[SNPRINTF_BUF_LEN];
1311 int last_value, i, pn;
1314 const ir_edge_t *edge;
1315 const lc_arg_env_t *env = ia32_get_arg_env();
1316 FILE *F = emit_env->out;
1317 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1319 /* fill the table structure */
1320 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1321 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1323 tbl.num_branches = get_irn_n_edges(irn);
1324 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1325 tbl.min_value = INT_MAX;
1326 tbl.max_value = INT_MIN;
1329 /* go over all proj's and collect them */
1330 foreach_out_edge(irn, edge) {
1331 proj = get_edge_src_irn(edge);
1332 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1334 pn = get_Proj_proj(proj);
1336 /* create branch entry */
1337 tbl.branches[i].target = proj;
1338 tbl.branches[i].value = pn;
1340 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
1341 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
1343 /* check for default proj */
1344 if (pn == get_ia32_pncode(irn)) {
1345 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1352 /* sort the branches by their number */
1353 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1355 /* two-complement's magic make this work without overflow */
1356 interval = tbl.max_value - tbl.min_value;
1358 /* emit the table */
1359 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
1360 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
1363 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
1364 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
1367 if (tbl.num_branches > 1) {
1370 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
1371 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
1374 ia32_switch_section(F, SECTION_RODATA);
1375 fprintf(F, "\t.align 4\n");
1377 fprintf(F, "%s:\n", tbl.label);
1379 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
1380 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
1383 last_value = tbl.branches[0].value;
1384 for (i = 1; i < tbl.num_branches; ++i) {
1385 while (++last_value < tbl.branches[i].value) {
1386 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
1387 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
1390 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
1391 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
1394 ia32_switch_section(F, SECTION_TEXT);
1397 /* one jump is enough */
1398 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
1399 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
1410 * Emits code for a unconditional jump.
1412 static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
1413 ir_node *block, *next_bl;
1415 char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1417 /* for now, the code works for scheduled and non-schedules blocks */
1418 block = get_nodes_block(irn);
1420 /* we have a block schedule */
1421 next_bl = next_blk_sched(block);
1422 if (get_cfop_target_block(irn) != next_bl) {
1423 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
1424 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
1428 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
1433 /****************************
1436 * _ __ _ __ ___ _ ___
1437 * | '_ \| '__/ _ \| |/ __|
1438 * | |_) | | | (_) | |\__ \
1439 * | .__/|_| \___/| ||___/
1442 ****************************/
1445 * Emits code for a proj -> node
1447 static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
1448 ir_node *pred = get_Proj_pred(irn);
1450 if (get_irn_op(pred) == op_Start) {
1451 switch(get_Proj_proj(irn)) {
1452 case pn_Start_X_initial_exec:
1461 /**********************************
1464 * | | ___ _ __ _ _| |_) |
1465 * | | / _ \| '_ \| | | | _ <
1466 * | |___| (_) | |_) | |_| | |_) |
1467 * \_____\___/| .__/ \__, |____/
1470 **********************************/
1473 * Emit movsb/w instructions to make mov count divideable by 4
1475 static void emit_CopyB_prolog(FILE *F, const ir_node *irn, int rem) {
1476 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1478 ir_fprintf(F, "\t/* memcopy prolog %+F */\n", irn);
1480 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
1481 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward */");
1486 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1487 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
1491 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1492 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
1496 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1497 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1499 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1500 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1508 * Emit rep movsd instruction for memcopy.
1510 static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
1511 FILE *F = emit_env->out;
1512 tarval *tv = get_ia32_Immop_tarval(irn);
1513 int rem = get_tarval_long(tv);
1514 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1516 emit_CopyB_prolog(F, irn, rem);
1518 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
1519 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
1524 * Emits unrolled memcopy.
1526 static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
1527 tarval *tv = get_ia32_Immop_tarval(irn);
1528 int size = get_tarval_long(tv);
1529 FILE *F = emit_env->out;
1530 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1532 emit_CopyB_prolog(F, irn, size & 0x3);
1536 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
1537 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
1544 /***************************
1548 * | | / _ \| '_ \ \ / /
1549 * | |___| (_) | | | \ V /
1550 * \_____\___/|_| |_|\_/
1552 ***************************/
1555 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1557 static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1558 FILE *F = emit_env->out;
1559 const lc_arg_env_t *env = ia32_get_arg_env();
1560 ir_mode *ls_mode = get_ia32_ls_mode(irn);
1561 int ls_bits = get_mode_size_bits(ls_mode);
1562 char *from, *to, buf[64];
1563 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1565 if(is_ia32_Conv_I2FP(irn)) {
1567 to = ls_bits == 32 ? "ss" : "sd";
1568 } else if(is_ia32_Conv_FP2I(irn)) {
1569 from = ls_bits == 32 ? "ss" : "sd";
1572 assert(is_ia32_Conv_FP2FP(irn));
1573 from = ls_bits == 32 ? "sd" : "ss";
1574 to = ls_bits == 32 ? "ss" : "sd";
1577 switch(get_ia32_op_type(irn)) {
1579 lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
1581 case ia32_AddrModeS:
1582 lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
1585 assert(0 && "unsupported op type for Conv");
1588 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
1589 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1593 static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1594 emit_ia32_Conv_with_FP(irn, emit_env);
1597 static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1598 emit_ia32_Conv_with_FP(irn, emit_env);
1601 static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1602 emit_ia32_Conv_with_FP(irn, emit_env);
1606 * Emits code for an Int conversion.
1608 static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1609 FILE *F = emit_env->out;
1610 const lc_arg_env_t *env = ia32_get_arg_env();
1611 char *move_cmd = "movzx";
1612 char *conv_cmd = NULL;
1613 ir_mode *smaller_mode = get_ia32_ls_mode(irn);
1614 int smaller_bits = get_mode_size_bits(smaller_mode);
1616 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1617 const arch_register_t *in_reg, *out_reg;
1619 assert(!mode_is_float(smaller_mode));
1620 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1622 signed_mode = mode_is_signed(smaller_mode);
1627 switch(get_ia32_op_type(irn)) {
1629 in_reg = get_in_reg(irn, 2);
1630 out_reg = get_out_reg(irn, 0);
1632 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1633 REGS_ARE_EQUAL(out_reg, in_reg) &&
1636 if (smaller_bits == 8)
1638 else if (smaller_bits == 16)
1643 /* argument and result are both in EAX and */
1644 /* signedness is ok: -> use converts */
1645 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
1647 else if (REGS_ARE_EQUAL(out_reg, in_reg) && ! signed_mode)
1649 /* argument and result are in the same register */
1650 /* and signedness is ok: -> use and with mask */
1651 int mask = (1 << smaller_bits) - 1;
1652 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
1655 /* use move w/o sign extension */
1656 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
1658 ia32_get_reg_name_for_mode(emit_env, smaller_mode, in_reg));
1662 case ia32_AddrModeS:
1663 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
1664 move_cmd, irn, ia32_emit_am(irn, emit_env));
1667 assert(0 && "unsupported op type for Conv");
1670 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1676 * Emits code for an 8Bit Int conversion.
1678 void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
1679 emit_ia32_Conv_I2I(irn, emit_env);
1683 /*******************************************
1686 * | |__ ___ _ __ ___ __| | ___ ___
1687 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1688 * | |_) | __/ | | | (_) | (_| | __/\__ \
1689 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1691 *******************************************/
1694 * Emits a backend call
1696 static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
1697 FILE *F = emit_env->out;
1698 ir_entity *ent = be_Call_get_entity(irn);
1699 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1702 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
1705 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "call %1D", get_irn_n(irn, be_pos_Call_ptr));
1708 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
1714 * Emits code to increase stack pointer.
1716 static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1717 FILE *F = emit_env->out;
1718 int offs = be_get_IncSP_offset(irn);
1719 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1723 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
1725 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, -offs);
1726 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
1729 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
1730 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
1737 * Emits code to set stack pointer.
1739 static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1740 FILE *F = emit_env->out;
1741 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1743 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1744 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
1749 * Emits code for Copy/CopyKeep.
1751 static void Copy_emitter(const ir_node *irn, ir_node *op, ia32_emit_env_t *emit_env) {
1752 FILE *F = emit_env->out;
1753 const arch_env_t *aenv = emit_env->arch_env;
1754 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1756 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, op)) ||
1757 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1760 if (mode_is_float(get_irn_mode(irn)))
1761 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movsd %1D, %1S", irn, irn, irn);
1763 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
1764 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1768 static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
1769 Copy_emitter(irn, be_get_Copy_op(irn), emit_env);
1772 static void emit_be_CopyKeep(const ir_node *irn, ia32_emit_env_t *emit_env) {
1773 Copy_emitter(irn, be_get_CopyKeep_op(irn), emit_env);
1777 * Emits code for exchange.
1779 static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
1780 FILE *F = emit_env->out;
1781 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1782 const arch_register_t *in1, *in2;
1783 const arch_register_class_t *cls1, *cls2;
1785 in1 = arch_get_irn_register(emit_env->arch_env, get_irn_n(irn, 0));
1786 in2 = arch_get_irn_register(emit_env->arch_env, get_irn_n(irn, 1));
1788 cls1 = arch_register_get_class(in1);
1789 cls2 = arch_register_get_class(in2);
1791 assert(cls1 == cls2 && "Register class mismatch at Perm");
1793 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1795 if(emit_env->isa->opt_arch == arch_athlon) {
1796 // xchg commands are Vector path on athlons and therefore stall the DirectPath pipeline
1797 // it is often beneficial to use the 3 xor trick instead of an xchg
1799 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %1S, %2S", irn, irn);
1801 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %2S, %1S", irn, irn);
1803 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %1S, %2S", irn, irn);
1806 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
1811 else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1812 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN,
1813 "pxor %1S, %2S\n\tpxor %2S, %1S\n\tpxor %1S, %2S", irn, irn, irn, irn, irn, irn);
1815 else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1819 else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1824 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
1829 * Emits code for Constant loading.
1831 static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) {
1833 char cmd_buf[256], cmnt_buf[256];
1834 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1835 ir_mode *mode = get_irn_mode(n);
1836 tarval *tv = get_ia32_Immop_tarval(n);
1838 if (get_ia32_op_type(n) == ia32_SymConst) {
1839 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n);
1840 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */");
1842 assert(mode == mode_Iu);
1843 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1844 if (tv == get_tarval_b_false() || tv == get_tarval_null(mode)) {
1845 const char *instr = "xor";
1846 if (env->isa->opt_arch == arch_pentium_4) {
1847 /* P4 prefers sub r, r, others xor r, r */
1850 lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n);
1851 lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */");
1853 lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n);
1854 lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */");
1857 lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n);
1861 * Emits code to increase stack pointer.
1863 static void emit_ia32_AddSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1864 FILE *F = emit_env->out;
1865 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1867 if (is_ia32_ImmConst(irn)) {
1868 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1D, %C", irn, irn);
1870 else if (is_ia32_ImmSymConst(irn)) {
1871 if (get_ia32_op_type(irn) == ia32_Normal)
1872 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1D, OFFSET_FLAT:%C", irn, irn);
1873 else /* source address mode */
1874 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1D, [%s%s]", irn, get_id_str(get_ia32_am_sc(irn)), get_ia32_am_offs(irn));
1877 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1D, %2S", irn, irn);
1879 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* reserve space on stack */");
1885 * Emits code to increase stack pointer.
1887 static void emit_ia32_SubSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1888 FILE *F = emit_env->out;
1889 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1891 if (is_ia32_ImmConst(irn)) {
1892 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1D, %C", irn, irn);
1894 else if (is_ia32_ImmSymConst(irn)) {
1895 if (get_ia32_op_type(irn) == ia32_Normal)
1896 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1D, OFFSET_FLAT:%C", irn, irn);
1897 else /* source address mode */
1898 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1D, [%s%s]", irn, get_id_str(get_ia32_am_sc(irn)), get_ia32_am_offs(irn));
1901 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1D, %2S", irn, irn);
1903 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* free space on stack */");
1909 * Emits code to load the TLS base
1911 static void emit_ia32_LdTls(const ir_node *irn, ia32_emit_env_t *emit_env) {
1912 FILE *F = emit_env->out;
1913 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1915 switch (asm_flavour) {
1917 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, DWORD PTR %%gs:0", irn);
1920 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, DWORD PTR %%gs:0", irn);
1923 assert(0 && "unsupported TLS");
1926 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get thread local storage base */");
1931 static void emit_be_Return(const ir_node *n, ia32_emit_env_t *env) {
1933 const lc_arg_env_t *arg_env = ia32_get_arg_env();
1935 lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", "ret", "/* be_Return */", n, n);
1938 static void emit_Nothing(const ir_node *n, ia32_emit_env_t *env) {
1941 ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", n, n);
1945 /***********************************************************************************
1948 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1949 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1950 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1951 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1953 ***********************************************************************************/
1956 * Enters the emitter functions for handled nodes into the generic
1957 * pointer of an opcode.
1959 static void ia32_register_emitters(void) {
1961 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1962 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1963 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1964 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1965 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1966 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1968 /* first clear the generic function pointer for all ops */
1969 clear_irp_opcodes_generic_func();
1971 /* register all emitter functions defined in spec */
1972 ia32_register_spec_emitters();
1974 /* other ia32 emitter functions */
1980 IA32_EMIT(PsiCondCMov);
1982 IA32_EMIT(PsiCondSet);
1983 IA32_EMIT(SwitchJmp);
1986 IA32_EMIT(Conv_I2FP);
1987 IA32_EMIT(Conv_FP2I);
1988 IA32_EMIT(Conv_FP2FP);
1989 IA32_EMIT(Conv_I2I);
1990 IA32_EMIT(Conv_I2I8Bit);
1997 IA32_EMIT(xCmpCMov);
1998 IA32_EMIT(xCondJmp);
1999 IA32_EMIT2(fcomJmp, x87CondJmp);
2000 IA32_EMIT2(fcompJmp, x87CondJmp);
2001 IA32_EMIT2(fcomppJmp, x87CondJmp);
2002 IA32_EMIT2(fcomrJmp, x87CondJmp);
2003 IA32_EMIT2(fcomrpJmp, x87CondJmp);
2004 IA32_EMIT2(fcomrppJmp, x87CondJmp);
2006 /* benode emitter */
2032 static const char *last_name = NULL;
2033 static unsigned last_line = -1;
2034 static unsigned num = -1;
2037 * Emit the debug support for node irn.
2039 static void ia32_emit_dbg(const ir_node *irn, ia32_emit_env_t *env) {
2040 dbg_info *db = get_irn_dbg_info(irn);
2042 const char *fname = be_retrieve_dbg_info(db, &lineno);
2044 if (! env->cg->birg->main_env->options->stabs_debug_support)
2048 if (last_name != fname) {
2050 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
2053 if (last_line != lineno) {
2057 snprintf(name, sizeof(name), ".LM%u", ++num);
2059 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
2060 fprintf(F, "%s:\n", name);
2066 * Emits code for a node.
2068 static void ia32_emit_node(const ir_node *irn, void *env) {
2069 ia32_emit_env_t *emit_env = env;
2070 ir_op *op = get_irn_op(irn);
2071 DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
2073 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
2075 if (op->ops.generic) {
2076 void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
2077 ia32_emit_dbg(irn, emit_env);
2081 emit_Nothing(irn, env);
2082 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", irn, irn);
2087 * Emits gas alignment directives
2089 static void ia32_emit_alignment(FILE *F, unsigned align, unsigned skip) {
2090 fprintf(F, "\t.p2align %u,,%u\n", align, skip);
2094 * Emits gas alignment directives for Functions depended on cpu architecture.
2096 static void ia32_emit_align_func(FILE *F, cpu_support cpu) {
2098 unsigned maximum_skip;
2113 maximum_skip = (1 << align) - 1;
2114 ia32_emit_alignment(F, align, maximum_skip);
2118 * Emits gas alignment directives for Labels depended on cpu architecture.
2120 static void ia32_emit_align_label(FILE *F, cpu_support cpu) {
2121 unsigned align; unsigned maximum_skip;
2136 maximum_skip = (1 << align) - 1;
2137 ia32_emit_alignment(F, align, maximum_skip);
2140 static int is_first_loop_block(ir_node *block, ir_node *prev_block, ia32_emit_env_t *env) {
2141 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2142 double block_freq, prev_freq;
2143 static const double DELTA = .0001;
2144 cpu_support cpu = env->isa->opt_arch;
2146 if(exec_freq == NULL)
2148 if(cpu == arch_i386 || cpu == arch_i486)
2151 block_freq = get_block_execfreq(exec_freq, block);
2152 prev_freq = get_block_execfreq(exec_freq, prev_block);
2154 if(block_freq < DELTA || prev_freq < DELTA)
2157 block_freq /= prev_freq;
2161 case arch_athlon_64:
2163 return block_freq > 3;
2168 return block_freq > 2;
2172 * Walks over the nodes in a block connected by scheduling edges
2173 * and emits code for each node.
2175 static void ia32_gen_block(ir_node *block, ir_node *last_block, ia32_emit_env_t *env) {
2176 ir_graph *irg = get_irn_irg(block);
2177 ir_node *start_block = get_irg_start_block(irg);
2183 assert(is_Block(block));
2185 if (block == start_block)
2188 if (need_label && get_irn_arity(block) == 1) {
2189 ir_node *pred_block = get_Block_cfgpred_block(block, 0);
2191 if (pred_block == last_block && get_irn_n_edges_kind(pred_block, EDGE_KIND_BLOCK) <= 2)
2195 /* special case: if one of our cfg preds is a switch-jmp we need a label, */
2196 /* otherwise there might be jump table entries jumping to */
2197 /* non-existent (omitted) labels */
2198 for (i = get_Block_n_cfgpreds(block) - 1; i >= 0; --i) {
2199 ir_node *pred = get_Block_cfgpred(block, i);
2201 if (is_Proj(pred)) {
2202 assert(get_irn_mode(pred) == mode_X);
2203 if (is_ia32_SwitchJmp(get_Proj_pred(pred))) {
2211 char cmd_buf[SNPRINTF_BUF_LEN];
2214 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2216 /* align the loop headers */
2217 if (! is_first_loop_block(block, last_block, env)) {
2218 /* align blocks where the previous block has no fallthrough */
2219 arity = get_irn_arity(block);
2221 for (i = 0; i < arity; ++i) {
2222 ir_node *predblock = get_Block_cfgpred_block(block, i);
2224 if (predblock == last_block) {
2232 ia32_emit_align_label(env->out, env->isa->opt_arch);
2234 ir_snprintf(cmd_buf, sizeof(cmd_buf), BLOCK_PREFIX("%d:"),
2235 get_irn_node_nr(block));
2236 fprintf(F, "%-43s ", cmd_buf);
2238 /* emit list of pred blocks in comment */
2239 fprintf(F, "/* preds:");
2241 arity = get_irn_arity(block);
2242 for (i = 0; i < arity; ++i) {
2243 ir_node *predblock = get_Block_cfgpred_block(block, i);
2244 fprintf(F, " %ld", get_irn_node_nr(predblock));
2247 if (exec_freq != NULL) {
2248 fprintf(F, " freq: %f", get_block_execfreq(exec_freq, block));
2251 fprintf(F, " */\n");
2254 /* emit the contents of the block */
2255 ia32_emit_dbg(block, env);
2256 sched_foreach(block, irn) {
2257 ia32_emit_node(irn, env);
2262 * Emits code for function start.
2264 static void ia32_emit_func_prolog(FILE *F, ir_graph *irg, ia32_emit_env_t *emit_env) {
2265 ir_entity *irg_ent = get_irg_entity(irg);
2266 const char *irg_name = get_entity_ld_name(irg_ent);
2267 cpu_support cpu = emit_env->isa->opt_arch;
2268 const be_irg_t *birg = emit_env->cg->birg;
2271 ia32_switch_section(F, SECTION_TEXT);
2272 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2273 ia32_emit_align_func(F, cpu);
2274 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2275 fprintf(F, ".globl %s\n", irg_name);
2277 ia32_dump_function_object(F, irg_name);
2278 fprintf(F, "%s:\n", irg_name);
2282 * Emits code for function end
2284 static void ia32_emit_func_epilog(FILE *F, ir_graph *irg, ia32_emit_env_t *emit_env) {
2285 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2286 const be_irg_t *birg = emit_env->cg->birg;
2288 ia32_dump_function_size(F, irg_name);
2289 be_dbg_method_end(birg->main_env->db_handle);
2295 * Sets labels for control flow nodes (jump target)
2296 * TODO: Jump optimization
2298 static void ia32_gen_labels(ir_node *block, void *env) {
2300 int n = get_Block_n_cfgpreds(block);
2302 for (n--; n >= 0; n--) {
2303 pred = get_Block_cfgpred(block, n);
2304 set_irn_link(pred, block);
2309 * Main driver. Emits the code for one routine.
2311 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
2312 ia32_emit_env_t emit_env;
2314 ir_node *last_block = NULL;
2318 emit_env.arch_env = cg->arch_env;
2320 emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
2321 FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
2323 /* set the global arch_env (needed by print hooks) */
2324 arch_env = cg->arch_env;
2326 ia32_register_emitters();
2328 ia32_emit_func_prolog(F, irg, &emit_env);
2329 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
2331 n = ARR_LEN(cg->blk_sched);
2332 for (i = 0; i < n;) {
2335 block = cg->blk_sched[i];
2337 next_bl = i < n ? cg->blk_sched[i] : NULL;
2339 /* set here the link. the emitter expects to find the next block here */
2340 set_irn_link(block, next_bl);
2341 ia32_gen_block(block, last_block, &emit_env);
2345 ia32_emit_func_epilog(F, irg, &emit_env);