2 * This file implements the node emitter.
3 * @author Christian Wuerdig, Matthias Braun
21 #include "iredges_t.h"
24 #include "raw_bitset.h"
26 #include "../besched_t.h"
27 #include "../benode_t.h"
29 #include "../be_dbgout.h"
30 #include "../beemitter.h"
31 #include "../begnuas.h"
33 #include "ia32_emitter.h"
34 #include "gen_ia32_emitter.h"
35 #include "gen_ia32_regalloc_if.h"
36 #include "ia32_nodes_attr.h"
37 #include "ia32_new_nodes.h"
38 #include "ia32_map_regs.h"
39 #include "bearch_ia32_t.h"
41 #define BLOCK_PREFIX ".L"
43 #define SNPRINTF_BUF_LEN 128
45 /* global arch_env for lc_printf functions */
46 static const arch_env_t *arch_env = NULL;
49 * Returns the register at in position pos.
51 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
53 const arch_register_t *reg = NULL;
55 assert(get_irn_arity(irn) > pos && "Invalid IN position");
57 /* The out register of the operator at position pos is the
58 in register we need. */
59 op = get_irn_n(irn, pos);
61 reg = arch_get_irn_register(arch_env, op);
63 assert(reg && "no in register found");
65 /* in case of a joker register: just return a valid register */
66 if (arch_register_type_is(reg, joker)) {
67 const arch_register_req_t *req;
69 /* ask for the requirements */
70 req = arch_get_register_req(arch_env, irn, pos);
72 if (arch_register_req_is(req, limited)) {
73 /* in case of limited requirements: get the first allowed register */
74 unsigned idx = rbitset_next(req->limited, 0, 1);
75 reg = arch_register_for_index(req->cls, idx);
77 /* otherwise get first register in class */
78 reg = arch_register_for_index(req->cls, 0);
86 * Returns the register at out position pos.
88 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
90 const arch_register_t *reg = NULL;
92 /* 1st case: irn is not of mode_T, so it has only */
93 /* one OUT register -> good */
94 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
95 /* Proj with the corresponding projnum for the register */
97 if (get_irn_mode(irn) != mode_T) {
98 reg = arch_get_irn_register(arch_env, irn);
99 } else if (is_ia32_irn(irn)) {
100 reg = get_ia32_out_reg(irn, pos);
102 const ir_edge_t *edge;
104 foreach_out_edge(irn, edge) {
105 proj = get_edge_src_irn(edge);
106 assert(is_Proj(proj) && "non-Proj from mode_T node");
107 if (get_Proj_proj(proj) == pos) {
108 reg = arch_get_irn_register(arch_env, proj);
114 assert(reg && "no out register found");
119 * Returns an ident for the given tarval tv.
121 static ident *get_ident_for_tv(tarval *tv) {
123 tarval_snprintf(buf, sizeof(buf), tv);
124 return new_id_from_str(buf);
128 * Determine the gnu assembler suffix that indicates a mode
130 static char get_mode_suffix(const ir_mode *mode) {
131 if(mode_is_float(mode)) {
132 switch(get_mode_size_bits(mode)) {
141 assert(mode_is_int(mode) || mode_is_reference(mode));
142 switch(get_mode_size_bits(mode)) {
153 panic("Can't output mode_suffix for %+F\n", mode);
156 static int produces_result(const ir_node *node) {
157 return !(is_ia32_St(node) ||
158 is_ia32_Store8Bit(node) ||
159 is_ia32_CondJmp(node) ||
160 is_ia32_xCondJmp(node) ||
161 is_ia32_CmpSet(node) ||
162 is_ia32_xCmpSet(node) ||
163 is_ia32_SwitchJmp(node));
166 static const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
167 switch(get_mode_size_bits(mode)) {
169 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
171 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
173 return (char *)arch_register_get_name(reg);
178 * Add a number to a prefix. This number will not be used a second time.
180 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
181 static unsigned long id = 0;
182 snprintf(buf, buflen, "%s%lu", prefix, ++id);
186 /*************************************************************
188 * (_) | | / _| | | | |
189 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
190 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
191 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
192 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
195 *************************************************************/
197 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
198 // be_emit_env_t* so we cheat a bit...
199 #define be_emit_char(env,c) be_emit_char(env->emit,c)
200 #define be_emit_string(env,s) be_emit_string(env->emit,s)
201 #undef be_emit_cstring
202 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
203 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
204 #define be_emit_write_line(env) be_emit_write_line(env->emit)
205 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
206 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
208 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
210 const arch_register_t *reg = get_in_reg(node, pos);
211 const char *reg_name = arch_register_get_name(reg);
213 assert(pos < get_irn_arity(node));
215 be_emit_char(env, '%');
216 be_emit_string(env, reg_name);
219 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
220 const arch_register_t *reg = get_out_reg(node, pos);
221 const char *reg_name = arch_register_get_name(reg);
223 be_emit_char(env, '%');
224 be_emit_string(env, reg_name);
227 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
229 ia32_attr_t *attr = get_ia32_attr(node);
232 be_emit_char(env, '%');
233 be_emit_string(env, attr->x87[pos]->name);
236 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
241 switch(get_ia32_immop_type(node)) {
243 tv = get_ia32_Immop_tarval(node);
244 id = get_ident_for_tv(tv);
246 case ia32_ImmSymConst:
247 id = get_ia32_Immop_symconst(node);
251 be_emit_string(env, "BAD");
255 be_emit_ident(env, id);
258 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode)
260 be_emit_char(env, get_mode_suffix(mode));
263 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
265 ir_mode *mode = get_ia32_ls_mode(node);
267 ia32_emit_mode_suffix(env, mode);
270 static char get_xmm_mode_suffix(ir_mode *mode)
272 assert(mode_is_float(mode));
273 switch(get_mode_size_bits(mode)) {
284 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
286 ir_mode *mode = get_ia32_ls_mode(node);
287 assert(mode != NULL);
288 be_emit_char(env, 's');
289 be_emit_char(env, get_xmm_mode_suffix(mode));
292 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
294 ir_mode *mode = get_ia32_ls_mode(node);
295 assert(mode != NULL);
296 be_emit_char(env, get_xmm_mode_suffix(mode));
299 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
301 if(get_mode_size_bits(mode) == 32)
303 if(mode_is_signed(mode)) {
304 be_emit_char(env, 's');
306 be_emit_char(env, 'z');
310 static void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
312 switch (be_gas_flavour) {
313 case GAS_FLAVOUR_NORMAL:
314 be_emit_cstring(env, "\t.type\t");
315 be_emit_string(env, name);
316 be_emit_cstring(env, ", @function\n");
317 be_emit_write_line(env);
319 case GAS_FLAVOUR_MINGW:
320 be_emit_cstring(env, "\t.def\t");
321 be_emit_string(env, name);
322 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
323 be_emit_write_line(env);
330 static void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
332 switch (be_gas_flavour) {
333 case GAS_FLAVOUR_NORMAL:
334 be_emit_cstring(env, "\t.size\t");
335 be_emit_string(env, name);
336 be_emit_cstring(env, ", .-");
337 be_emit_string(env, name);
338 be_emit_char(env, '\n');
339 be_emit_write_line(env);
349 * Emits registers and/or address mode of a binary operation.
351 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
352 switch(get_ia32_op_type(node)) {
354 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
355 be_emit_char(env, '$');
356 ia32_emit_immediate(env, node);
357 be_emit_cstring(env, ", ");
358 ia32_emit_source_register(env, node, 2);
360 const arch_register_t *in1 = get_in_reg(node, 2);
361 const arch_register_t *in2 = get_in_reg(node, 3);
362 const arch_register_t *out = produces_result(node) ? get_out_reg(node, 0) : NULL;
363 const arch_register_t *in;
366 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
367 out = out ? out : in1;
368 in_name = arch_register_get_name(in);
370 if (is_ia32_emit_cl(node)) {
371 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
375 be_emit_char(env, '%');
376 be_emit_string(env, in_name);
377 be_emit_cstring(env, ", %");
378 be_emit_string(env, arch_register_get_name(out));
382 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
383 assert(!produces_result(node) && "Source AM with Const must not produce result");
384 ia32_emit_am(env, node);
385 be_emit_cstring(env, ", $");
386 ia32_emit_immediate(env, node);
387 } else if (produces_result(node)) {
388 ia32_emit_am(env, node);
389 be_emit_cstring(env, ", ");
390 ia32_emit_dest_register(env, node, 0);
392 ia32_emit_am(env, node);
393 be_emit_cstring(env, ", ");
394 ia32_emit_source_register(env, node, 2);
398 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
399 be_emit_char(env, '$');
400 ia32_emit_immediate(env, node);
401 be_emit_cstring(env, ", ");
402 ia32_emit_am(env, node);
404 const arch_register_t *in1 = get_in_reg(node, get_irn_arity(node) == 5 ? 3 : 2);
405 ir_mode *mode = get_ia32_ls_mode(node);
408 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
410 if (is_ia32_emit_cl(node)) {
411 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
415 be_emit_char(env, '%');
416 be_emit_string(env, in_name);
417 be_emit_cstring(env, ", ");
418 ia32_emit_am(env, node);
422 assert(0 && "unsupported op type");
427 * Emits registers and/or address mode of a binary operation.
429 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
430 switch(get_ia32_op_type(node)) {
432 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
433 // should not happen...
436 ia32_attr_t *attr = get_ia32_attr(node);
437 const arch_register_t *in1 = attr->x87[0];
438 const arch_register_t *in2 = attr->x87[1];
439 const arch_register_t *out = attr->x87[2];
440 const arch_register_t *in;
442 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
443 out = out ? out : in1;
445 be_emit_char(env, '%');
446 be_emit_string(env, arch_register_get_name(in));
447 be_emit_cstring(env, ", %");
448 be_emit_string(env, arch_register_get_name(out));
453 ia32_emit_am(env, node);
456 assert(0 && "unsupported op type");
461 * Emits registers and/or address mode of a unary operation.
463 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
464 switch(get_ia32_op_type(node)) {
466 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
467 be_emit_char(env, '$');
468 ia32_emit_immediate(env, node);
470 if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
471 ia32_emit_source_register(env, node, 3);
472 } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
473 ia32_emit_source_register(env, node, 4);
474 } else if(is_ia32_Push(node)) {
475 ia32_emit_source_register(env, node, 2);
476 } else if(is_ia32_Pop(node)) {
477 ia32_emit_dest_register(env, node, 1);
479 ia32_emit_dest_register(env, node, 0);
485 ia32_emit_am(env, node);
488 assert(0 && "unsupported op type");
493 * Emits address mode.
495 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
496 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
497 ident *id = get_ia32_am_sc(node);
498 int offs = get_ia32_am_offs_int(node);
500 /* just to be sure... */
501 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
505 if (is_ia32_am_sc_sign(node))
506 be_emit_char(env, '-');
507 be_emit_ident(env, id);
512 be_emit_irprintf(env->emit, "%+d", offs);
514 be_emit_irprintf(env->emit, "%d", offs);
518 if (am_flav & (ia32_B | ia32_I)) {
519 be_emit_char(env, '(');
522 if (am_flav & ia32_B) {
523 ia32_emit_source_register(env, node, 0);
526 /* emit index + scale */
527 if (am_flav & ia32_I) {
528 be_emit_char(env, ',');
529 ia32_emit_source_register(env, node, 1);
531 if (am_flav & ia32_S) {
532 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
535 be_emit_char(env, ')');
539 /*************************************************
542 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
543 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
544 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
545 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
547 *************************************************/
550 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
553 * coding of conditions
555 struct cmp2conditon_t {
561 * positive conditions for signed compares
563 static const struct cmp2conditon_t cmp2condition_s[] = {
564 { NULL, pn_Cmp_False }, /* always false */
565 { "e", pn_Cmp_Eq }, /* == */
566 { "l", pn_Cmp_Lt }, /* < */
567 { "le", pn_Cmp_Le }, /* <= */
568 { "g", pn_Cmp_Gt }, /* > */
569 { "ge", pn_Cmp_Ge }, /* >= */
570 { "ne", pn_Cmp_Lg }, /* != */
571 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
572 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
573 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
574 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
575 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
576 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
577 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
578 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
579 { NULL, pn_Cmp_True }, /* always true */
583 * positive conditions for unsigned compares
585 static const struct cmp2conditon_t cmp2condition_u[] = {
586 { NULL, pn_Cmp_False }, /* always false */
587 { "e", pn_Cmp_Eq }, /* == */
588 { "b", pn_Cmp_Lt }, /* < */
589 { "be", pn_Cmp_Le }, /* <= */
590 { "a", pn_Cmp_Gt }, /* > */
591 { "ae", pn_Cmp_Ge }, /* >= */
592 { "ne", pn_Cmp_Lg }, /* != */
593 { NULL, pn_Cmp_True }, /* always true */
597 * returns the condition code
599 static const char *get_cmp_suffix(int cmp_code)
601 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
602 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
604 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
605 return cmp2condition_u[cmp_code & 7].name;
607 return cmp2condition_s[cmp_code & 15].name;
611 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
613 be_emit_string(env, get_cmp_suffix(pnc));
618 * Returns the target block for a control flow node.
620 static ir_node *get_cfop_target_block(const ir_node *irn) {
621 return get_irn_link(irn);
625 * Returns the target label for a control flow node.
627 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
628 ir_node *block = get_cfop_target_block(node);
630 be_emit_cstring(env, BLOCK_PREFIX);
631 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
634 /** Return the next block in Block schedule */
635 static ir_node *next_blk_sched(const ir_node *block) {
636 return get_irn_link(block);
640 * Returns the Proj with projection number proj and NOT mode_M
642 static ir_node *get_proj(const ir_node *node, long proj) {
643 const ir_edge_t *edge;
646 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
648 foreach_out_edge(node, edge) {
649 src = get_edge_src_irn(edge);
651 assert(is_Proj(src) && "Proj expected");
652 if (get_irn_mode(src) == mode_M)
655 if (get_Proj_proj(src) == proj)
662 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
664 static void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node,
665 ir_mode *mode, long pnc) {
666 const ir_node *proj_true;
667 const ir_node *proj_false;
668 const ir_node *block;
669 const ir_node *next_block;
672 /* get both Proj's */
673 proj_true = get_proj(node, pn_Cond_true);
674 assert(proj_true && "CondJmp without true Proj");
676 proj_false = get_proj(node, pn_Cond_false);
677 assert(proj_false && "CondJmp without false Proj");
679 /* for now, the code works for scheduled and non-schedules blocks */
680 block = get_nodes_block(node);
682 /* we have a block schedule */
683 next_block = next_blk_sched(block);
685 if (get_cfop_target_block(proj_true) == next_block) {
686 /* exchange both proj's so the second one can be omitted */
687 const ir_node *t = proj_true;
689 proj_true = proj_false;
692 pnc = get_negated_pnc(pnc, mode);
695 /* in case of unordered compare, check for parity */
696 if (pnc & pn_Cmp_Uo) {
697 be_emit_cstring(env, "\tjp ");
698 ia32_emit_cfop_target(env, proj_true);
699 be_emit_finish_line_gas(env, proj_true);
702 be_emit_cstring(env, "\tj");
703 ia32_emit_cmp_suffix(env, pnc);
704 be_emit_char(env, ' ');
705 ia32_emit_cfop_target(env, proj_true);
706 be_emit_finish_line_gas(env, proj_true);
708 /* the second Proj might be a fallthrough */
709 if (get_cfop_target_block(proj_false) != next_block) {
710 be_emit_cstring(env, "\tjmp ");
711 ia32_emit_cfop_target(env, proj_false);
712 be_emit_finish_line_gas(env, proj_false);
714 be_emit_cstring(env, "\t/* fallthrough to");
715 ia32_emit_cfop_target(env, proj_false);
716 be_emit_cstring(env, " */");
717 be_emit_finish_line_gas(env, proj_false);
722 * Emits code for conditional jump.
724 static void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
725 be_emit_cstring(env, "\tcmp ");
726 ia32_emit_binop(env, node);
727 be_emit_finish_line_gas(env, node);
729 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
733 * Emits code for conditional jump with two variables.
735 static void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
736 CondJmp_emitter(env, node);
740 * Emits code for conditional test and jump.
742 static void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
743 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
744 be_emit_cstring(env, "\ttest $");
745 ia32_emit_immediate(env, node);
746 be_emit_cstring(env, ", ");
747 ia32_emit_source_register(env, node, 0);
748 be_emit_finish_line_gas(env, node);
750 be_emit_cstring(env, "\ttest ");
751 ia32_emit_source_register(env, node, 1);
752 be_emit_cstring(env, ", ");
753 ia32_emit_source_register(env, node, 0);
754 be_emit_finish_line_gas(env, node);
756 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
760 * Emits code for conditional test and jump with two variables.
762 static void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
763 TestJmp_emitter(env, node);
766 static void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
767 be_emit_cstring(env, "/* omitted redundant test */");
768 be_emit_finish_line_gas(env, node);
770 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
773 static void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
774 be_emit_cstring(env, "/* omitted redundant test/cmp */");
775 be_emit_finish_line_gas(env, node);
777 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
781 * Emits code for conditional SSE floating point jump with two variables.
783 static void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
784 be_emit_cstring(env, "\tucomi");
785 ia32_emit_xmm_mode_suffix(env, node);
786 be_emit_char(env, ' ');
787 ia32_emit_binop(env, node);
788 be_emit_finish_line_gas(env, node);
790 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
794 * Emits code for conditional x87 floating point jump with two variables.
796 static void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
797 ia32_attr_t *attr = get_ia32_attr(node);
798 const char *reg = attr->x87[1]->name;
799 long pnc = get_ia32_pncode(node);
801 switch (get_ia32_irn_opcode(node)) {
802 case iro_ia32_fcomrJmp:
803 pnc = get_inversed_pnc(pnc);
804 reg = attr->x87[0]->name;
805 case iro_ia32_fcomJmp:
807 be_emit_cstring(env, "\tfucom ");
809 case iro_ia32_fcomrpJmp:
810 pnc = get_inversed_pnc(pnc);
811 reg = attr->x87[0]->name;
812 case iro_ia32_fcompJmp:
813 be_emit_cstring(env, "\tfucomp ");
815 case iro_ia32_fcomrppJmp:
816 pnc = get_inversed_pnc(pnc);
817 case iro_ia32_fcomppJmp:
818 be_emit_cstring(env, "\tfucompp ");
824 be_emit_char(env, '%');
825 be_emit_string(env, reg);
827 be_emit_finish_line_gas(env, node);
829 be_emit_cstring(env, "\tfnstsw %ax");
830 be_emit_finish_line_gas(env, node);
831 be_emit_cstring(env, "\tsahf");
832 be_emit_finish_line_gas(env, node);
834 finish_CondJmp(env, node, mode_E, pnc);
837 static void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
838 long pnc = get_ia32_pncode(node);
839 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
840 int idx_left = 2 - is_PsiCondCMov;
841 int idx_right = 3 - is_PsiCondCMov;
842 const arch_register_t *in1, *in2, *out;
844 out = arch_get_irn_register(env->arch_env, node);
845 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
846 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
848 /* we have to emit the cmp first, because the destination register */
849 /* could be one of the compare registers */
850 if (is_ia32_CmpCMov(node)) {
851 be_emit_cstring(env, "\tcmp ");
852 ia32_emit_source_register(env, node, 1);
853 be_emit_cstring(env, ", ");
854 ia32_emit_source_register(env, node, 0);
855 } else if (is_ia32_xCmpCMov(node)) {
856 be_emit_cstring(env, "\tucomis");
857 ia32_emit_mode_suffix(env, get_irn_mode(node));
858 be_emit_char(env, ' ');
859 ia32_emit_source_register(env, node, 1);
860 be_emit_cstring(env, ", ");
861 ia32_emit_source_register(env, node, 0);
862 } else if (is_PsiCondCMov) {
863 /* omit compare because flags are already set by And/Or */
864 be_emit_cstring(env, "\ttest ");
865 ia32_emit_source_register(env, node, 0);
866 be_emit_cstring(env, ", ");
867 ia32_emit_source_register(env, node, 0);
869 assert(0 && "unsupported CMov");
871 be_emit_finish_line_gas(env, node);
873 if (REGS_ARE_EQUAL(out, in2)) {
874 /* best case: default in == out -> do nothing */
875 } else if (REGS_ARE_EQUAL(out, in1)) {
876 ir_node *n = (ir_node*) node;
877 /* true in == out -> need complement compare and exchange true and default in */
878 ir_node *t = get_irn_n(n, idx_left);
879 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
880 set_irn_n(n, idx_right, t);
882 pnc = get_negated_pnc(pnc, get_irn_mode(node));
884 /* out is different from in: need copy default -> out */
885 if (is_PsiCondCMov) {
886 be_emit_cstring(env, "\tmovl ");
887 ia32_emit_dest_register(env, node, 2);
888 be_emit_cstring(env, ", ");
889 ia32_emit_dest_register(env, node, 0);
891 be_emit_cstring(env, "\tmovl ");
892 ia32_emit_source_register(env, node, 3);
893 be_emit_cstring(env, ", ");
894 ia32_emit_dest_register(env, node, 0);
896 be_emit_finish_line_gas(env, node);
899 if (is_PsiCondCMov) {
900 be_emit_cstring(env, "\tcmov");
901 ia32_emit_cmp_suffix(env, pnc);
902 be_emit_cstring(env, "l ");
903 ia32_emit_source_register(env, node, 1);
904 be_emit_cstring(env, ", ");
905 ia32_emit_dest_register(env, node, 0);
907 be_emit_cstring(env, "\tcmov");
908 ia32_emit_cmp_suffix(env, pnc);
909 be_emit_cstring(env, "l ");
910 ia32_emit_source_register(env, node, 2);
911 be_emit_cstring(env, ", ");
912 ia32_emit_dest_register(env, node, 0);
914 be_emit_finish_line_gas(env, node);
917 static void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
918 CMov_emitter(env, node);
921 static void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
922 CMov_emitter(env, node);
925 static void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
926 CMov_emitter(env, node);
929 static void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
930 int pnc = get_ia32_pncode(node);
932 const arch_register_t *out;
934 out = arch_get_irn_register(env->arch_env, node);
935 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
937 if (is_ia32_CmpSet(node)) {
938 be_emit_cstring(env, "\tcmp ");
939 ia32_emit_binop(env, node);
940 } else if (is_ia32_xCmpSet(node)) {
941 be_emit_cstring(env, "\tucomis");
942 ia32_emit_mode_suffix(env, get_irn_mode(get_irn_n(node, 2)));
943 be_emit_char(env, ' ');
944 ia32_emit_binop(env, node);
945 } else if (is_ia32_PsiCondSet(node)) {
946 be_emit_cstring(env, "\tcmp $0, ");
947 ia32_emit_source_register(env, node, 0);
949 assert(0 && "unsupported Set");
951 be_emit_finish_line_gas(env, node);
953 /* use mov to clear target because it doesn't affect the eflags */
954 be_emit_cstring(env, "\tmovl $0, %");
955 be_emit_string(env, arch_register_get_name(out));
956 be_emit_finish_line_gas(env, node);
958 be_emit_cstring(env, "\tset");
959 ia32_emit_cmp_suffix(env, pnc);
960 be_emit_cstring(env, " %");
961 be_emit_string(env, reg8bit);
962 be_emit_finish_line_gas(env, node);
965 static void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
966 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
969 static void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
970 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
973 static void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
974 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
977 static void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
979 long pnc = get_ia32_pncode(node);
980 long unord = pnc & pn_Cmp_Uo;
982 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
985 case pn_Cmp_Leg: /* odered */
988 case pn_Cmp_Uo: /* unordered */
992 case pn_Cmp_Eq: /* == */
996 case pn_Cmp_Lt: /* < */
1000 case pn_Cmp_Le: /* <= */
1004 case pn_Cmp_Gt: /* > */
1008 case pn_Cmp_Ge: /* >= */
1012 case pn_Cmp_Lg: /* != */
1017 assert(sse_pnc >= 0 && "unsupported compare");
1019 if (unord && sse_pnc != 3) {
1021 We need a separate compare against unordered.
1022 Quick and Dirty solution:
1023 - get some memory on stack
1027 - and result and stored result
1030 be_emit_cstring(env, "\tsubl $8, %esp");
1031 be_emit_finish_line_gas(env, node);
1033 be_emit_cstring(env, "\tcmpsd $3, ");
1034 ia32_emit_binop(env, node);
1035 be_emit_finish_line_gas(env, node);
1037 be_emit_cstring(env, "\tmovsd ");
1038 ia32_emit_dest_register(env, node, 0);
1039 be_emit_cstring(env, ", (%esp)");
1040 be_emit_finish_line_gas(env, node);
1043 be_emit_cstring(env, "\tcmpsd ");
1044 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1045 ia32_emit_binop(env, node);
1046 be_emit_finish_line_gas(env, node);
1048 if (unord && sse_pnc != 3) {
1049 be_emit_cstring(env, "\tandpd (%esp), ");
1050 ia32_emit_dest_register(env, node, 0);
1051 be_emit_finish_line_gas(env, node);
1053 be_emit_cstring(env, "\taddl $8, %esp");
1054 be_emit_finish_line_gas(env, node);
1058 /*********************************************************
1061 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1062 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1063 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1064 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1067 *********************************************************/
1069 /* jump table entry (target and corresponding number) */
1070 typedef struct _branch_t {
1075 /* jump table for switch generation */
1076 typedef struct _jmp_tbl_t {
1077 ir_node *defProj; /**< default target */
1078 int min_value; /**< smallest switch case */
1079 int max_value; /**< largest switch case */
1080 int num_branches; /**< number of jumps */
1081 char *label; /**< label of the jump table */
1082 branch_t *branches; /**< jump array */
1086 * Compare two variables of type branch_t. Used to sort all switch cases
1088 static int ia32_cmp_branch_t(const void *a, const void *b) {
1089 branch_t *b1 = (branch_t *)a;
1090 branch_t *b2 = (branch_t *)b;
1092 if (b1->value <= b2->value)
1099 * Emits code for a SwitchJmp (creates a jump table if
1100 * possible otherwise a cmp-jmp cascade). Port from
1103 static void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1104 unsigned long interval;
1109 const ir_edge_t *edge;
1111 /* fill the table structure */
1112 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1113 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1115 tbl.num_branches = get_irn_n_edges(node);
1116 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1117 tbl.min_value = INT_MAX;
1118 tbl.max_value = INT_MIN;
1121 /* go over all proj's and collect them */
1122 foreach_out_edge(node, edge) {
1123 proj = get_edge_src_irn(edge);
1124 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1126 pnc = get_Proj_proj(proj);
1128 /* create branch entry */
1129 tbl.branches[i].target = proj;
1130 tbl.branches[i].value = pnc;
1132 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1133 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1135 /* check for default proj */
1136 if (pnc == get_ia32_pncode(node)) {
1137 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1144 /* sort the branches by their number */
1145 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1147 /* two-complement's magic make this work without overflow */
1148 interval = tbl.max_value - tbl.min_value;
1150 /* emit the table */
1151 be_emit_cstring(env, "\tcmpl $");
1152 be_emit_irprintf(env->emit, "%u, ", interval);
1153 ia32_emit_source_register(env, node, 0);
1154 be_emit_finish_line_gas(env, node);
1156 be_emit_cstring(env, "\tja ");
1157 ia32_emit_cfop_target(env, tbl.defProj);
1158 be_emit_finish_line_gas(env, node);
1160 if (tbl.num_branches > 1) {
1162 be_emit_cstring(env, "\tjmp *");
1163 be_emit_string(env, tbl.label);
1164 be_emit_cstring(env, "(,");
1165 ia32_emit_source_register(env, node, 0);
1166 be_emit_cstring(env, ",4)");
1167 be_emit_finish_line_gas(env, node);
1169 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1170 be_emit_cstring(env, "\t.align 4\n");
1171 be_emit_write_line(env);
1173 be_emit_string(env, tbl.label);
1174 be_emit_cstring(env, ":\n");
1175 be_emit_write_line(env);
1177 be_emit_cstring(env, ".long ");
1178 ia32_emit_cfop_target(env, tbl.branches[0].target);
1179 be_emit_finish_line_gas(env, NULL);
1181 last_value = tbl.branches[0].value;
1182 for (i = 1; i < tbl.num_branches; ++i) {
1183 while (++last_value < tbl.branches[i].value) {
1184 be_emit_cstring(env, ".long ");
1185 ia32_emit_cfop_target(env, tbl.defProj);
1186 be_emit_finish_line_gas(env, NULL);
1188 be_emit_cstring(env, ".long ");
1189 ia32_emit_cfop_target(env, tbl.branches[i].target);
1190 be_emit_finish_line_gas(env, NULL);
1192 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1194 /* one jump is enough */
1195 be_emit_cstring(env, "\tjmp ");
1196 ia32_emit_cfop_target(env, tbl.branches[0].target);
1197 be_emit_finish_line_gas(env, node);
1207 * Emits code for a unconditional jump.
1209 static void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1210 ir_node *block, *next_block;
1212 /* for now, the code works for scheduled and non-schedules blocks */
1213 block = get_nodes_block(node);
1215 /* we have a block schedule */
1216 next_block = next_blk_sched(block);
1217 if (get_cfop_target_block(node) != next_block) {
1218 be_emit_cstring(env, "\tjmp ");
1219 ia32_emit_cfop_target(env, node);
1221 be_emit_cstring(env, "\t/* fallthrough to ");
1222 ia32_emit_cfop_target(env, node);
1223 be_emit_cstring(env, " */");
1225 be_emit_finish_line_gas(env, node);
1228 /**********************************
1231 * | | ___ _ __ _ _| |_) |
1232 * | | / _ \| '_ \| | | | _ <
1233 * | |___| (_) | |_) | |_| | |_) |
1234 * \_____\___/| .__/ \__, |____/
1237 **********************************/
1240 * Emit movsb/w instructions to make mov count divideable by 4
1242 static void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1243 be_emit_cstring(env, "\tcld");
1244 be_emit_finish_line_gas(env, NULL);
1248 be_emit_cstring(env, "\tmovsb");
1249 be_emit_finish_line_gas(env, NULL);
1252 be_emit_cstring(env, "\tmovsw");
1253 be_emit_finish_line_gas(env, NULL);
1256 be_emit_cstring(env, "\tmovsb");
1257 be_emit_finish_line_gas(env, NULL);
1258 be_emit_cstring(env, "\tmovsw");
1259 be_emit_finish_line_gas(env, NULL);
1265 * Emit rep movsd instruction for memcopy.
1267 static void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1268 tarval *tv = get_ia32_Immop_tarval(node);
1269 int rem = get_tarval_long(tv);
1271 emit_CopyB_prolog(env, rem);
1273 be_emit_cstring(env, "\trep movsd");
1274 be_emit_finish_line_gas(env, node);
1278 * Emits unrolled memcopy.
1280 static void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1281 tarval *tv = get_ia32_Immop_tarval(node);
1282 int size = get_tarval_long(tv);
1284 emit_CopyB_prolog(env, size & 0x3);
1288 be_emit_cstring(env, "\tmovsd");
1289 be_emit_finish_line_gas(env, NULL);
1295 /***************************
1299 * | | / _ \| '_ \ \ / /
1300 * | |___| (_) | | | \ V /
1301 * \_____\___/|_| |_|\_/
1303 ***************************/
1306 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1308 static void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1309 ir_mode *ls_mode = get_ia32_ls_mode(node);
1310 int ls_bits = get_mode_size_bits(ls_mode);
1312 be_emit_cstring(env, "\tcvt");
1314 if(is_ia32_Conv_I2FP(node)) {
1316 be_emit_cstring(env, "si2ss");
1318 be_emit_cstring(env, "si2sd");
1320 } else if(is_ia32_Conv_FP2I(node)) {
1322 be_emit_cstring(env, "ss2si");
1324 be_emit_cstring(env, "sd2si");
1327 assert(is_ia32_Conv_FP2FP(node));
1329 be_emit_cstring(env, "sd2ss");
1331 be_emit_cstring(env, "ss2sd");
1334 be_emit_char(env, ' ');
1336 switch(get_ia32_op_type(node)) {
1338 ia32_emit_source_register(env, node, 2);
1339 be_emit_cstring(env, ", ");
1340 ia32_emit_dest_register(env, node, 0);
1342 case ia32_AddrModeS:
1343 ia32_emit_dest_register(env, node, 0);
1344 be_emit_cstring(env, ", ");
1345 ia32_emit_am(env, node);
1348 assert(0 && "unsupported op type for Conv");
1350 be_emit_finish_line_gas(env, node);
1353 static void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1354 emit_ia32_Conv_with_FP(env, node);
1357 static void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1358 emit_ia32_Conv_with_FP(env, node);
1361 static void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1362 emit_ia32_Conv_with_FP(env, node);
1366 * Emits code for an Int conversion.
1368 static void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1369 const char *sign_suffix;
1370 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1371 int smaller_bits = get_mode_size_bits(smaller_mode);
1373 const arch_register_t *in_reg, *out_reg;
1375 assert(!mode_is_float(smaller_mode));
1376 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1378 signed_mode = mode_is_signed(smaller_mode);
1379 if(smaller_bits == 32) {
1380 // this should not happen as it's no convert
1384 sign_suffix = signed_mode ? "s" : "z";
1387 switch(get_ia32_op_type(node)) {
1389 in_reg = get_in_reg(node, 2);
1390 out_reg = get_out_reg(node, 0);
1392 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1393 REGS_ARE_EQUAL(out_reg, in_reg) &&
1396 /* argument and result are both in EAX and */
1397 /* signedness is ok: -> use converts */
1398 if (smaller_bits == 8) {
1399 be_emit_cstring(env, "\tcbtw");
1400 } else if (smaller_bits == 16) {
1401 be_emit_cstring(env, "\tcwtl");
1405 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1406 /* argument and result are in the same register */
1407 /* and signedness is ok: -> use and with mask */
1408 int mask = (1 << smaller_bits) - 1;
1409 be_emit_cstring(env, "\tandl $0x");
1410 be_emit_irprintf(env->emit, "%x, ", mask);
1411 ia32_emit_dest_register(env, node, 0);
1413 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1415 be_emit_cstring(env, "\tmov");
1416 be_emit_string(env, sign_suffix);
1417 ia32_emit_mode_suffix(env, smaller_mode);
1418 be_emit_cstring(env, "l %");
1419 be_emit_string(env, sreg);
1420 be_emit_cstring(env, ", ");
1421 ia32_emit_dest_register(env, node, 0);
1424 case ia32_AddrModeS: {
1425 be_emit_cstring(env, "\tmov");
1426 be_emit_string(env, sign_suffix);
1427 ia32_emit_mode_suffix(env, smaller_mode);
1428 be_emit_cstring(env, "l %");
1429 ia32_emit_am(env, node);
1430 be_emit_cstring(env, ", ");
1431 ia32_emit_dest_register(env, node, 0);
1435 assert(0 && "unsupported op type for Conv");
1437 be_emit_finish_line_gas(env, node);
1441 * Emits code for an 8Bit Int conversion.
1443 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1444 emit_ia32_Conv_I2I(env, node);
1448 /*******************************************
1451 * | |__ ___ _ __ ___ __| | ___ ___
1452 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1453 * | |_) | __/ | | | (_) | (_| | __/\__ \
1454 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1456 *******************************************/
1459 * Emits a backend call
1461 static void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1462 ir_entity *ent = be_Call_get_entity(node);
1464 be_emit_cstring(env, "\tcall ");
1466 be_emit_string(env, get_entity_ld_name(ent));
1468 be_emit_char(env, '*');
1469 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1471 be_emit_finish_line_gas(env, node);
1475 * Emits code to increase stack pointer.
1477 static void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1478 int offs = be_get_IncSP_offset(node);
1484 be_emit_cstring(env, "\tsubl $");
1485 be_emit_irprintf(env->emit, "%u, ", offs);
1486 ia32_emit_source_register(env, node, 0);
1488 be_emit_cstring(env, "\taddl $");
1489 be_emit_irprintf(env->emit, "%u, ", -offs);
1490 ia32_emit_source_register(env, node, 0);
1492 be_emit_finish_line_gas(env, node);
1496 * Emits code to set stack pointer.
1498 static void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1499 be_emit_cstring(env, "\tmovl ");
1500 ia32_emit_source_register(env, node, 2);
1501 be_emit_cstring(env, ", ");
1502 ia32_emit_dest_register(env, node, 0);
1503 be_emit_finish_line_gas(env, node);
1507 * Emits code for Copy/CopyKeep.
1509 static void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op) {
1510 const arch_env_t *aenv = env->arch_env;
1512 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1513 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1516 if (mode_is_float(get_irn_mode(node))) {
1517 be_emit_cstring(env, "\tmovsd ");
1518 ia32_emit_source_register(env, node, 0);
1519 be_emit_cstring(env, ", ");
1520 ia32_emit_dest_register(env, node, 0);
1522 be_emit_cstring(env, "\tmovl ");
1523 ia32_emit_source_register(env, node, 0);
1524 be_emit_cstring(env, ", ");
1525 ia32_emit_dest_register(env, node, 0);
1527 be_emit_finish_line_gas(env, node);
1530 static void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1531 Copy_emitter(env, node, be_get_Copy_op(node));
1534 static void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1535 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1539 * Emits code for exchange.
1541 static void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1542 const arch_register_t *in1, *in2;
1543 const arch_register_class_t *cls1, *cls2;
1545 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1546 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1548 cls1 = arch_register_get_class(in1);
1549 cls2 = arch_register_get_class(in2);
1551 assert(cls1 == cls2 && "Register class mismatch at Perm");
1553 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1555 if(emit_env->isa->opt_arch == arch_athlon) {
1556 // xchg commands are Vector path on athlons and therefore stall the DirectPath pipeline
1557 // it is often beneficial to use the 3 xor trick instead of an xchg
1559 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %1S, %2S", irn, irn);
1561 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %2S, %1S", irn, irn);
1563 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xor %1S, %2S", irn, irn);
1566 be_emit_cstring(env, "\txchg ");
1567 ia32_emit_source_register(env, node, 1);
1568 be_emit_cstring(env, ", ");
1569 ia32_emit_source_register(env, node, 0);
1570 be_emit_finish_line_gas(env, node);
1574 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1575 be_emit_cstring(env, "\txorpd ");
1576 ia32_emit_source_register(env, node, 1);
1577 be_emit_cstring(env, ", ");
1578 ia32_emit_source_register(env, node, 0);
1579 be_emit_finish_line_gas(env, NULL);
1581 be_emit_cstring(env, "\txorpd ");
1582 ia32_emit_source_register(env, node, 0);
1583 be_emit_cstring(env, ", ");
1584 ia32_emit_source_register(env, node, 1);
1585 be_emit_finish_line_gas(env, NULL);
1587 be_emit_cstring(env, "\txorpd ");
1588 ia32_emit_source_register(env, node, 1);
1589 be_emit_cstring(env, ", ");
1590 ia32_emit_source_register(env, node, 0);
1591 be_emit_finish_line_gas(env, node);
1592 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1594 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1600 * Emits code for Constant loading.
1602 static void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1603 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1605 if (imm_tp == ia32_ImmSymConst) {
1606 be_emit_cstring(env, "\tmovl $");
1607 ia32_emit_immediate(env, node);
1608 be_emit_cstring(env, ", ");
1609 ia32_emit_dest_register(env, node, 0);
1611 tarval *tv = get_ia32_Immop_tarval(node);
1612 assert(get_irn_mode(node) == mode_Iu);
1613 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1614 if (tarval_is_null(tv)) {
1615 if (env->isa->opt_arch == arch_pentium_4) {
1616 /* P4 prefers sub r, r, others xor r, r */
1617 be_emit_cstring(env, "\tsubl ");
1619 be_emit_cstring(env, "\txorl ");
1621 ia32_emit_dest_register(env, node, 0);
1622 be_emit_cstring(env, ", ");
1623 ia32_emit_dest_register(env, node, 0);
1625 be_emit_cstring(env, "\tmovl $");
1626 ia32_emit_immediate(env, node);
1627 be_emit_cstring(env, ", ");
1628 ia32_emit_dest_register(env, node, 0);
1631 be_emit_finish_line_gas(env, node);
1635 * Emits code to load the TLS base
1637 static void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1638 be_emit_cstring(env, "\tmovl %gs:0, ");
1639 ia32_emit_dest_register(env, node, 0);
1640 be_emit_finish_line_gas(env, node);
1643 static void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1644 be_emit_cstring(env, "\tret");
1645 be_emit_finish_line_gas(env, node);
1648 static void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1652 /***********************************************************************************
1655 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1656 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1657 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1658 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1660 ***********************************************************************************/
1663 * Enters the emitter functions for handled nodes into the generic
1664 * pointer of an opcode.
1666 static void ia32_register_emitters(void) {
1668 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1669 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1670 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1671 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1672 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1673 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1675 /* first clear the generic function pointer for all ops */
1676 clear_irp_opcodes_generic_func();
1678 /* register all emitter functions defined in spec */
1679 ia32_register_spec_emitters();
1681 /* other ia32 emitter functions */
1687 IA32_EMIT(PsiCondCMov);
1689 IA32_EMIT(PsiCondSet);
1690 IA32_EMIT(SwitchJmp);
1693 IA32_EMIT(Conv_I2FP);
1694 IA32_EMIT(Conv_FP2I);
1695 IA32_EMIT(Conv_FP2FP);
1696 IA32_EMIT(Conv_I2I);
1697 IA32_EMIT(Conv_I2I8Bit);
1702 IA32_EMIT(xCmpCMov);
1703 IA32_EMIT(xCondJmp);
1704 IA32_EMIT2(fcomJmp, x87CondJmp);
1705 IA32_EMIT2(fcompJmp, x87CondJmp);
1706 IA32_EMIT2(fcomppJmp, x87CondJmp);
1707 IA32_EMIT2(fcomrJmp, x87CondJmp);
1708 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1709 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1711 /* benode emitter */
1737 static const char *last_name = NULL;
1738 static unsigned last_line = -1;
1739 static unsigned num = -1;
1742 * Emit the debug support for node node.
1744 static void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1745 dbg_info *db = get_irn_dbg_info(node);
1747 const char *fname = be_retrieve_dbg_info(db, &lineno);
1749 if (! env->cg->birg->main_env->options->stabs_debug_support)
1753 if (last_name != fname) {
1755 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1758 if (last_line != lineno) {
1761 snprintf(name, sizeof(name), ".LM%u", ++num);
1763 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1764 be_emit_string(env, name);
1765 be_emit_cstring(env, ":\n");
1766 be_emit_write_line(env);
1771 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1774 * Emits code for a node.
1776 static void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1777 ir_op *op = get_irn_op(node);
1778 DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
1780 DBG((mod, LEVEL_1, "emitting code for %+F\n", node));
1782 if (op->ops.generic) {
1783 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1784 ia32_emit_dbg(env, node);
1785 (*func) (env, node);
1787 emit_Nothing(env, node);
1788 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1793 * Emits gas alignment directives
1795 static void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1796 be_emit_cstring(env, "\t.p2align ");
1797 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
1798 be_emit_write_line(env);
1802 * Emits gas alignment directives for Functions depended on cpu architecture.
1804 static void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1806 unsigned maximum_skip;
1821 maximum_skip = (1 << align) - 1;
1822 ia32_emit_alignment(env, align, maximum_skip);
1826 * Emits gas alignment directives for Labels depended on cpu architecture.
1828 static void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1829 unsigned align; unsigned maximum_skip;
1844 maximum_skip = (1 << align) - 1;
1845 ia32_emit_alignment(env, align, maximum_skip);
1848 static int is_first_loop_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev_block) {
1849 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1850 double block_freq, prev_freq;
1851 static const double DELTA = .0001;
1852 cpu_support cpu = env->isa->opt_arch;
1854 if(exec_freq == NULL)
1856 if(cpu == arch_i386 || cpu == arch_i486)
1859 block_freq = get_block_execfreq(exec_freq, block);
1860 prev_freq = get_block_execfreq(exec_freq, prev_block);
1862 if(block_freq < DELTA || prev_freq < DELTA)
1865 block_freq /= prev_freq;
1869 case arch_athlon_64:
1871 return block_freq > 3;
1876 return block_freq > 2;
1880 * Walks over the nodes in a block connected by scheduling edges
1881 * and emits code for each node.
1883 static void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block) {
1884 ir_graph *irg = get_irn_irg(block);
1885 ir_node *start_block = get_irg_start_block(irg);
1887 const ir_node *node;
1890 assert(is_Block(block));
1892 if (block == start_block)
1895 if (need_label && get_irn_arity(block) == 1) {
1896 ir_node *pred_block = get_Block_cfgpred_block(block, 0);
1898 if (pred_block == last_block && get_irn_n_edges_kind(pred_block, EDGE_KIND_BLOCK) <= 2)
1902 /* special case: if one of our cfg preds is a switch-jmp we need a label, */
1903 /* otherwise there might be jump table entries jumping to */
1904 /* non-existent (omitted) labels */
1905 for (i = get_Block_n_cfgpreds(block) - 1; i >= 0; --i) {
1906 ir_node *pred = get_Block_cfgpred(block, i);
1908 if (is_Proj(pred)) {
1909 assert(get_irn_mode(pred) == mode_X);
1910 if (is_ia32_SwitchJmp(get_Proj_pred(pred))) {
1920 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1922 /* align the loop headers */
1923 if (! is_first_loop_block(env, block, last_block)) {
1924 /* align blocks where the previous block has no fallthrough */
1925 arity = get_irn_arity(block);
1927 for (i = 0; i < arity; ++i) {
1928 ir_node *predblock = get_Block_cfgpred_block(block, i);
1930 if (predblock == last_block) {
1938 ia32_emit_align_label(env, env->isa->opt_arch);
1940 be_emit_cstring(env, BLOCK_PREFIX);
1941 be_emit_irprintf(env->emit, "%d:", get_irn_node_nr(block));
1942 be_emit_pad_comment(env);
1943 be_emit_cstring(env, " /* preds:");
1945 /* emit list of pred blocks in comment */
1946 arity = get_irn_arity(block);
1947 for (i = 0; i < arity; ++i) {
1948 ir_node *predblock = get_Block_cfgpred_block(block, i);
1949 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
1952 if (exec_freq != NULL) {
1953 be_emit_irprintf(env->emit, " freq: %f", get_block_execfreq(exec_freq, block));
1955 be_emit_cstring(env, " */\n");
1956 be_emit_write_line(env);
1959 /* emit the contents of the block */
1960 ia32_emit_dbg(env, block);
1961 sched_foreach(block, node) {
1962 ia32_emit_node(env, node);
1967 * Emits code for function start.
1969 static void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
1970 ir_entity *irg_ent = get_irg_entity(irg);
1971 const char *irg_name = get_entity_ld_name(irg_ent);
1972 cpu_support cpu = env->isa->opt_arch;
1973 const be_irg_t *birg = env->cg->birg;
1975 be_emit_write_line(env);
1976 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1977 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
1978 ia32_emit_align_func(env, cpu);
1979 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1980 be_emit_cstring(env, ".global ");
1981 be_emit_string(env, irg_name);
1982 be_emit_char(env, '\n');
1983 be_emit_write_line(env);
1985 ia32_emit_function_object(env, irg_name);
1986 be_emit_string(env, irg_name);
1987 be_emit_cstring(env, ":\n");
1988 be_emit_write_line(env);
1992 * Emits code for function end
1994 static void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
1995 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
1996 const be_irg_t *birg = env->cg->birg;
1998 ia32_emit_function_size(env, irg_name);
1999 be_dbg_method_end(birg->main_env->db_handle);
2000 be_emit_char(env, '\n');
2001 be_emit_write_line(env);
2006 * Sets labels for control flow nodes (jump target)
2008 static void ia32_gen_labels(ir_node *block, void *data) {
2010 int n = get_Block_n_cfgpreds(block);
2012 for (n--; n >= 0; n--) {
2013 pred = get_Block_cfgpred(block, n);
2014 set_irn_link(pred, block);
2019 * Main driver. Emits the code for one routine.
2021 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2022 ia32_emit_env_t env;
2024 ir_node *last_block = NULL;
2027 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2028 env.emit = &env.isa->emit;
2029 env.arch_env = cg->arch_env;
2031 FIRM_DBG_REGISTER(env.mod, "firm.be.ia32.emitter");
2033 /* set the global arch_env (needed by print hooks) */
2034 arch_env = cg->arch_env;
2036 ia32_register_emitters();
2038 ia32_emit_func_prolog(&env, irg);
2039 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2041 n = ARR_LEN(cg->blk_sched);
2042 for (i = 0; i < n;) {
2045 block = cg->blk_sched[i];
2047 next_bl = i < n ? cg->blk_sched[i] : NULL;
2049 /* set here the link. the emitter expects to find the next block here */
2050 set_irn_link(block, next_bl);
2051 ia32_gen_block(&env, block, last_block);
2055 ia32_emit_func_epilog(&env, irg);