3 * @brief This file implements the node emitter.
4 * @author Christian Wuerdig, Matthias Braun
22 #include "iredges_t.h"
25 #include "raw_bitset.h"
27 #include "../besched_t.h"
28 #include "../benode_t.h"
30 #include "../be_dbgout.h"
31 #include "../beemitter.h"
32 #include "../begnuas.h"
33 #include "../beirg_t.h"
35 #include "ia32_emitter.h"
36 #include "gen_ia32_emitter.h"
37 #include "gen_ia32_regalloc_if.h"
38 #include "ia32_nodes_attr.h"
39 #include "ia32_new_nodes.h"
40 #include "ia32_map_regs.h"
41 #include "bearch_ia32_t.h"
43 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
45 #define BLOCK_PREFIX ".L"
47 #define SNPRINTF_BUF_LEN 128
50 * Returns the register at in position pos.
53 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
56 const arch_env_t *arch_env = env->arch_env;
58 const arch_register_t *reg = NULL;
60 assert(get_irn_arity(irn) > pos && "Invalid IN position");
62 /* The out register of the operator at position pos is the
63 in register we need. */
64 op = get_irn_n(irn, pos);
66 reg = arch_get_irn_register(arch_env, op);
68 assert(reg && "no in register found");
70 /* in case of a joker register: just return a valid register */
71 if (arch_register_type_is(reg, joker)) {
72 const arch_register_req_t *req;
74 /* ask for the requirements */
75 req = arch_get_register_req(arch_env, irn, pos);
77 if (arch_register_req_is(req, limited)) {
78 /* in case of limited requirements: get the first allowed register */
79 unsigned idx = rbitset_next(req->limited, 0, 1);
80 reg = arch_register_for_index(req->cls, idx);
82 /* otherwise get first register in class */
83 reg = arch_register_for_index(req->cls, 0);
91 * Returns the register at out position pos.
94 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
97 const arch_env_t *arch_env = env->arch_env;
99 const arch_register_t *reg = NULL;
101 /* 1st case: irn is not of mode_T, so it has only */
102 /* one OUT register -> good */
103 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
104 /* Proj with the corresponding projnum for the register */
106 if (get_irn_mode(irn) != mode_T) {
107 reg = arch_get_irn_register(arch_env, irn);
108 } else if (is_ia32_irn(irn)) {
109 reg = get_ia32_out_reg(irn, pos);
111 const ir_edge_t *edge;
113 foreach_out_edge(irn, edge) {
114 proj = get_edge_src_irn(edge);
115 assert(is_Proj(proj) && "non-Proj from mode_T node");
116 if (get_Proj_proj(proj) == pos) {
117 reg = arch_get_irn_register(arch_env, proj);
123 assert(reg && "no out register found");
128 * Returns an ident for the given tarval tv.
131 ident *get_ident_for_tv(tarval *tv) {
133 tarval_snprintf(buf, sizeof(buf), tv);
134 return new_id_from_str(buf);
138 * Determine the gnu assembler suffix that indicates a mode
141 char get_mode_suffix(const ir_mode *mode) {
142 if(mode_is_float(mode)) {
143 switch(get_mode_size_bits(mode)) {
152 assert(mode_is_int(mode) || mode_is_reference(mode));
153 switch(get_mode_size_bits(mode)) {
164 panic("Can't output mode_suffix for %+F\n", mode);
168 int produces_result(const ir_node *node) {
169 return !(is_ia32_St(node) ||
170 is_ia32_Store8Bit(node) ||
171 is_ia32_CondJmp(node) ||
172 is_ia32_xCondJmp(node) ||
173 is_ia32_CmpSet(node) ||
174 is_ia32_xCmpSet(node) ||
175 is_ia32_SwitchJmp(node));
179 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
180 const arch_register_t *reg) {
181 switch(get_mode_size_bits(mode)) {
183 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
185 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
187 return (char *)arch_register_get_name(reg);
192 * Add a number to a prefix. This number will not be used a second time.
195 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
196 static unsigned long id = 0;
197 snprintf(buf, buflen, "%s%lu", prefix, ++id);
201 /*************************************************************
203 * (_) | | / _| | | | |
204 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
205 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
206 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
207 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
210 *************************************************************/
212 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
213 // be_emit_env_t* so we cheat a bit...
214 #define be_emit_char(env,c) be_emit_char(env->emit,c)
215 #define be_emit_string(env,s) be_emit_string(env->emit,s)
216 #undef be_emit_cstring
217 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
218 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
219 #define be_emit_write_line(env) be_emit_write_line(env->emit)
220 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
221 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
223 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
225 const arch_register_t *reg = get_in_reg(env, node, pos);
226 const char *reg_name = arch_register_get_name(reg);
228 assert(pos < get_irn_arity(node));
230 be_emit_char(env, '%');
231 be_emit_string(env, reg_name);
234 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
235 const arch_register_t *reg = get_out_reg(env, node, pos);
236 const char *reg_name = arch_register_get_name(reg);
238 be_emit_char(env, '%');
239 be_emit_string(env, reg_name);
242 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
244 ia32_attr_t *attr = get_ia32_attr(node);
247 be_emit_char(env, '%');
248 be_emit_string(env, attr->x87[pos]->name);
251 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
257 be_emit_char(env, '$');
259 switch(get_ia32_immop_type(node)) {
261 tv = get_ia32_Immop_tarval(node);
262 id = get_ident_for_tv(tv);
264 case ia32_ImmSymConst:
265 ent = get_ia32_Immop_symconst(node);
266 mark_entity_visited(ent);
267 id = get_entity_ld_ident(ent);
271 be_emit_string(env, "BAD");
275 be_emit_ident(env, id);
278 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode)
280 be_emit_char(env, get_mode_suffix(mode));
283 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
285 ir_mode *mode = get_ia32_ls_mode(node);
287 ia32_emit_mode_suffix(env, mode);
291 char get_xmm_mode_suffix(ir_mode *mode)
293 assert(mode_is_float(mode));
294 switch(get_mode_size_bits(mode)) {
305 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
307 ir_mode *mode = get_ia32_ls_mode(node);
308 assert(mode != NULL);
309 be_emit_char(env, 's');
310 be_emit_char(env, get_xmm_mode_suffix(mode));
313 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
315 ir_mode *mode = get_ia32_ls_mode(node);
316 assert(mode != NULL);
317 be_emit_char(env, get_xmm_mode_suffix(mode));
320 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
322 if(get_mode_size_bits(mode) == 32)
324 if(mode_is_signed(mode)) {
325 be_emit_char(env, 's');
327 be_emit_char(env, 'z');
332 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
334 switch (be_gas_flavour) {
335 case GAS_FLAVOUR_NORMAL:
336 be_emit_cstring(env, "\t.type\t");
337 be_emit_string(env, name);
338 be_emit_cstring(env, ", @function\n");
339 be_emit_write_line(env);
341 case GAS_FLAVOUR_MINGW:
342 be_emit_cstring(env, "\t.def\t");
343 be_emit_string(env, name);
344 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
345 be_emit_write_line(env);
353 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
355 switch (be_gas_flavour) {
356 case GAS_FLAVOUR_NORMAL:
357 be_emit_cstring(env, "\t.size\t");
358 be_emit_string(env, name);
359 be_emit_cstring(env, ", .-");
360 be_emit_string(env, name);
361 be_emit_char(env, '\n');
362 be_emit_write_line(env);
372 * Emits registers and/or address mode of a binary operation.
374 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
375 switch(get_ia32_op_type(node)) {
377 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
378 ia32_emit_immediate(env, node);
379 be_emit_cstring(env, ", ");
380 ia32_emit_source_register(env, node, 2);
382 const arch_register_t *in1 = get_in_reg(env, node, 2);
383 const arch_register_t *in2 = get_in_reg(env, node, 3);
384 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
385 const arch_register_t *in;
388 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
389 out = out ? out : in1;
390 in_name = arch_register_get_name(in);
392 if (is_ia32_emit_cl(node)) {
393 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
397 be_emit_char(env, '%');
398 be_emit_string(env, in_name);
399 be_emit_cstring(env, ", %");
400 be_emit_string(env, arch_register_get_name(out));
404 ia32_emit_am(env, node);
405 be_emit_cstring(env, ", ");
406 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
407 assert(!produces_result(node) && "Source AM with Const must not produce result");
408 ia32_emit_immediate(env, node);
409 } else if (produces_result(node)) {
410 ia32_emit_dest_register(env, node, 0);
412 ia32_emit_source_register(env, node, 2);
416 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
417 ia32_emit_immediate(env, node);
418 be_emit_cstring(env, ", ");
419 ia32_emit_am(env, node);
421 const arch_register_t *in1 = get_in_reg(env, node,
422 get_irn_arity(node) == 5 ? 3 : 2);
423 ir_mode *mode = get_ia32_ls_mode(node);
426 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
428 if (is_ia32_emit_cl(node)) {
429 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
433 be_emit_char(env, '%');
434 be_emit_string(env, in_name);
435 be_emit_cstring(env, ", ");
436 ia32_emit_am(env, node);
440 assert(0 && "unsupported op type");
445 * Emits registers and/or address mode of a binary operation.
447 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
448 switch(get_ia32_op_type(node)) {
450 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
451 // should not happen...
454 ia32_attr_t *attr = get_ia32_attr(node);
455 const arch_register_t *in1 = attr->x87[0];
456 const arch_register_t *in2 = attr->x87[1];
457 const arch_register_t *out = attr->x87[2];
458 const arch_register_t *in;
460 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
461 out = out ? out : in1;
463 be_emit_char(env, '%');
464 be_emit_string(env, arch_register_get_name(in));
465 be_emit_cstring(env, ", %");
466 be_emit_string(env, arch_register_get_name(out));
471 ia32_emit_am(env, node);
474 assert(0 && "unsupported op type");
479 * Emits registers and/or address mode of a unary operation.
481 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
482 switch(get_ia32_op_type(node)) {
484 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
485 ia32_emit_immediate(env, node);
487 if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
488 ia32_emit_source_register(env, node, 3);
489 } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
490 ia32_emit_source_register(env, node, 4);
491 } else if(is_ia32_Push(node)) {
492 ia32_emit_source_register(env, node, 2);
493 } else if(is_ia32_Pop(node)) {
494 ia32_emit_dest_register(env, node, 1);
496 ia32_emit_dest_register(env, node, 0);
502 ia32_emit_am(env, node);
505 assert(0 && "unsupported op type");
510 * Emits address mode.
512 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
513 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
514 ir_entity *ent = get_ia32_am_sc(node);
515 int offs = get_ia32_am_offs_int(node);
517 /* just to be sure... */
518 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
524 mark_entity_visited(ent);
525 id = get_entity_ld_ident(ent);
526 if (is_ia32_am_sc_sign(node))
527 be_emit_char(env, '-');
528 be_emit_ident(env, id);
530 if(get_entity_owner(ent) == get_tls_type()) {
531 if (get_entity_visibility(ent) == visibility_external_allocated) {
532 be_emit_cstring(env, "@INDNTPOFF");
534 be_emit_cstring(env, "@NTPOFF");
541 be_emit_irprintf(env->emit, "%+d", offs);
543 be_emit_irprintf(env->emit, "%d", offs);
547 if (am_flav & (ia32_B | ia32_I)) {
548 be_emit_char(env, '(');
551 if (am_flav & ia32_B) {
552 ia32_emit_source_register(env, node, 0);
555 /* emit index + scale */
556 if (am_flav & ia32_I) {
557 be_emit_char(env, ',');
558 ia32_emit_source_register(env, node, 1);
560 if (am_flav & ia32_S) {
561 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
564 be_emit_char(env, ')');
568 /*************************************************
571 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
572 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
573 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
574 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
576 *************************************************/
579 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
582 * coding of conditions
584 struct cmp2conditon_t {
590 * positive conditions for signed compares
593 const struct cmp2conditon_t cmp2condition_s[] = {
594 { NULL, pn_Cmp_False }, /* always false */
595 { "e", pn_Cmp_Eq }, /* == */
596 { "l", pn_Cmp_Lt }, /* < */
597 { "le", pn_Cmp_Le }, /* <= */
598 { "g", pn_Cmp_Gt }, /* > */
599 { "ge", pn_Cmp_Ge }, /* >= */
600 { "ne", pn_Cmp_Lg }, /* != */
601 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
602 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
603 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
604 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
605 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
606 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
607 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
608 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
609 { NULL, pn_Cmp_True }, /* always true */
613 * positive conditions for unsigned compares
616 const struct cmp2conditon_t cmp2condition_u[] = {
617 { NULL, pn_Cmp_False }, /* always false */
618 { "e", pn_Cmp_Eq }, /* == */
619 { "b", pn_Cmp_Lt }, /* < */
620 { "be", pn_Cmp_Le }, /* <= */
621 { "a", pn_Cmp_Gt }, /* > */
622 { "ae", pn_Cmp_Ge }, /* >= */
623 { "ne", pn_Cmp_Lg }, /* != */
624 { NULL, pn_Cmp_True }, /* always true */
628 * returns the condition code
631 const char *get_cmp_suffix(int cmp_code)
633 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
634 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
636 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
637 return cmp2condition_u[cmp_code & 7].name;
639 return cmp2condition_s[cmp_code & 15].name;
643 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
645 be_emit_string(env, get_cmp_suffix(pnc));
650 * Returns the target block for a control flow node.
653 ir_node *get_cfop_target_block(const ir_node *irn) {
654 return get_irn_link(irn);
658 * Returns the target label for a control flow node.
660 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
661 ir_node *block = get_cfop_target_block(node);
663 be_emit_cstring(env, BLOCK_PREFIX);
664 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
667 /** Return the next block in Block schedule */
668 static ir_node *next_blk_sched(const ir_node *block) {
669 return get_irn_link(block);
673 * Returns the Proj with projection number proj and NOT mode_M
676 ir_node *get_proj(const ir_node *node, long proj) {
677 const ir_edge_t *edge;
680 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
682 foreach_out_edge(node, edge) {
683 src = get_edge_src_irn(edge);
685 assert(is_Proj(src) && "Proj expected");
686 if (get_irn_mode(src) == mode_M)
689 if (get_Proj_proj(src) == proj)
696 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
699 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
701 const ir_node *proj_true;
702 const ir_node *proj_false;
703 const ir_node *block;
704 const ir_node *next_block;
707 /* get both Proj's */
708 proj_true = get_proj(node, pn_Cond_true);
709 assert(proj_true && "CondJmp without true Proj");
711 proj_false = get_proj(node, pn_Cond_false);
712 assert(proj_false && "CondJmp without false Proj");
714 /* for now, the code works for scheduled and non-schedules blocks */
715 block = get_nodes_block(node);
717 /* we have a block schedule */
718 next_block = next_blk_sched(block);
720 if (get_cfop_target_block(proj_true) == next_block) {
721 /* exchange both proj's so the second one can be omitted */
722 const ir_node *t = proj_true;
724 proj_true = proj_false;
727 pnc = get_negated_pnc(pnc, mode);
730 /* in case of unordered compare, check for parity */
731 if (pnc & pn_Cmp_Uo) {
732 be_emit_cstring(env, "\tjp ");
733 ia32_emit_cfop_target(env, proj_true);
734 be_emit_finish_line_gas(env, proj_true);
737 be_emit_cstring(env, "\tj");
738 ia32_emit_cmp_suffix(env, pnc);
739 be_emit_char(env, ' ');
740 ia32_emit_cfop_target(env, proj_true);
741 be_emit_finish_line_gas(env, proj_true);
743 /* the second Proj might be a fallthrough */
744 if (get_cfop_target_block(proj_false) != next_block) {
745 be_emit_cstring(env, "\tjmp ");
746 ia32_emit_cfop_target(env, proj_false);
747 be_emit_finish_line_gas(env, proj_false);
749 be_emit_cstring(env, "\t/* fallthrough to");
750 ia32_emit_cfop_target(env, proj_false);
751 be_emit_cstring(env, " */");
752 be_emit_finish_line_gas(env, proj_false);
757 * Emits code for conditional jump.
760 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
761 be_emit_cstring(env, "\tcmp ");
762 ia32_emit_binop(env, node);
763 be_emit_finish_line_gas(env, node);
765 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
769 * Emits code for conditional jump with two variables.
772 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
773 CondJmp_emitter(env, node);
777 * Emits code for conditional test and jump.
780 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
781 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
782 be_emit_cstring(env, "\ttest ");
783 ia32_emit_immediate(env, node);
784 be_emit_cstring(env, ", ");
785 ia32_emit_source_register(env, node, 0);
786 be_emit_finish_line_gas(env, node);
788 be_emit_cstring(env, "\ttest ");
789 ia32_emit_source_register(env, node, 1);
790 be_emit_cstring(env, ", ");
791 ia32_emit_source_register(env, node, 0);
792 be_emit_finish_line_gas(env, node);
794 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
798 * Emits code for conditional test and jump with two variables.
801 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
802 TestJmp_emitter(env, node);
806 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
807 be_emit_cstring(env, "/* omitted redundant test */");
808 be_emit_finish_line_gas(env, node);
810 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
814 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
815 be_emit_cstring(env, "/* omitted redundant test/cmp */");
816 be_emit_finish_line_gas(env, node);
818 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
822 * Emits code for conditional SSE floating point jump with two variables.
825 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
826 be_emit_cstring(env, "\tucomi");
827 ia32_emit_xmm_mode_suffix(env, node);
828 be_emit_char(env, ' ');
829 ia32_emit_binop(env, node);
830 be_emit_finish_line_gas(env, node);
832 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
836 * Emits code for conditional x87 floating point jump with two variables.
839 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
840 ia32_attr_t *attr = get_ia32_attr(node);
841 const char *reg = attr->x87[1]->name;
842 long pnc = get_ia32_pncode(node);
844 switch (get_ia32_irn_opcode(node)) {
845 case iro_ia32_fcomrJmp:
846 pnc = get_inversed_pnc(pnc);
847 reg = attr->x87[0]->name;
848 case iro_ia32_fcomJmp:
850 be_emit_cstring(env, "\tfucom ");
852 case iro_ia32_fcomrpJmp:
853 pnc = get_inversed_pnc(pnc);
854 reg = attr->x87[0]->name;
855 case iro_ia32_fcompJmp:
856 be_emit_cstring(env, "\tfucomp ");
858 case iro_ia32_fcomrppJmp:
859 pnc = get_inversed_pnc(pnc);
860 case iro_ia32_fcomppJmp:
861 be_emit_cstring(env, "\tfucompp ");
867 be_emit_char(env, '%');
868 be_emit_string(env, reg);
870 be_emit_finish_line_gas(env, node);
872 be_emit_cstring(env, "\tfnstsw %ax");
873 be_emit_finish_line_gas(env, node);
874 be_emit_cstring(env, "\tsahf");
875 be_emit_finish_line_gas(env, node);
877 finish_CondJmp(env, node, mode_E, pnc);
881 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
882 long pnc = get_ia32_pncode(node);
883 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
884 int idx_left = 2 - is_PsiCondCMov;
885 int idx_right = 3 - is_PsiCondCMov;
886 const arch_register_t *in1, *in2, *out;
888 out = arch_get_irn_register(env->arch_env, node);
889 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
890 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
892 /* we have to emit the cmp first, because the destination register */
893 /* could be one of the compare registers */
894 if (is_ia32_CmpCMov(node)) {
895 be_emit_cstring(env, "\tcmp ");
896 ia32_emit_source_register(env, node, 1);
897 be_emit_cstring(env, ", ");
898 ia32_emit_source_register(env, node, 0);
899 } else if (is_ia32_xCmpCMov(node)) {
900 be_emit_cstring(env, "\tucomis");
901 ia32_emit_mode_suffix(env, get_irn_mode(node));
902 be_emit_char(env, ' ');
903 ia32_emit_source_register(env, node, 1);
904 be_emit_cstring(env, ", ");
905 ia32_emit_source_register(env, node, 0);
906 } else if (is_PsiCondCMov) {
907 /* omit compare because flags are already set by And/Or */
908 be_emit_cstring(env, "\ttest ");
909 ia32_emit_source_register(env, node, 0);
910 be_emit_cstring(env, ", ");
911 ia32_emit_source_register(env, node, 0);
913 assert(0 && "unsupported CMov");
915 be_emit_finish_line_gas(env, node);
917 if (REGS_ARE_EQUAL(out, in2)) {
918 /* best case: default in == out -> do nothing */
919 } else if (REGS_ARE_EQUAL(out, in1)) {
920 ir_node *n = (ir_node*) node;
921 /* true in == out -> need complement compare and exchange true and default in */
922 ir_node *t = get_irn_n(n, idx_left);
923 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
924 set_irn_n(n, idx_right, t);
926 pnc = get_negated_pnc(pnc, get_irn_mode(node));
928 /* out is different from in: need copy default -> out */
929 if (is_PsiCondCMov) {
930 be_emit_cstring(env, "\tmovl ");
931 ia32_emit_dest_register(env, node, 2);
932 be_emit_cstring(env, ", ");
933 ia32_emit_dest_register(env, node, 0);
935 be_emit_cstring(env, "\tmovl ");
936 ia32_emit_source_register(env, node, 3);
937 be_emit_cstring(env, ", ");
938 ia32_emit_dest_register(env, node, 0);
940 be_emit_finish_line_gas(env, node);
943 if (is_PsiCondCMov) {
944 be_emit_cstring(env, "\tcmov");
945 ia32_emit_cmp_suffix(env, pnc);
946 be_emit_cstring(env, "l ");
947 ia32_emit_source_register(env, node, 1);
948 be_emit_cstring(env, ", ");
949 ia32_emit_dest_register(env, node, 0);
951 be_emit_cstring(env, "\tcmov");
952 ia32_emit_cmp_suffix(env, pnc);
953 be_emit_cstring(env, "l ");
954 ia32_emit_source_register(env, node, 2);
955 be_emit_cstring(env, ", ");
956 ia32_emit_dest_register(env, node, 0);
958 be_emit_finish_line_gas(env, node);
962 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
963 CMov_emitter(env, node);
967 void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
968 CMov_emitter(env, node);
972 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
973 CMov_emitter(env, node);
977 void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
978 int pnc = get_ia32_pncode(node);
980 const arch_register_t *out;
982 out = arch_get_irn_register(env->arch_env, node);
983 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
985 if (is_ia32_CmpSet(node)) {
986 be_emit_cstring(env, "\tcmp ");
987 ia32_emit_binop(env, node);
988 } else if (is_ia32_xCmpSet(node)) {
989 be_emit_cstring(env, "\tucomis");
990 ia32_emit_mode_suffix(env, get_irn_mode(get_irn_n(node, 2)));
991 be_emit_char(env, ' ');
992 ia32_emit_binop(env, node);
993 } else if (is_ia32_PsiCondSet(node)) {
994 be_emit_cstring(env, "\tcmp $0, ");
995 ia32_emit_source_register(env, node, 0);
997 assert(0 && "unsupported Set");
999 be_emit_finish_line_gas(env, node);
1001 /* use mov to clear target because it doesn't affect the eflags */
1002 be_emit_cstring(env, "\tmovl $0, %");
1003 be_emit_string(env, arch_register_get_name(out));
1004 be_emit_finish_line_gas(env, node);
1006 be_emit_cstring(env, "\tset");
1007 ia32_emit_cmp_suffix(env, pnc);
1008 be_emit_cstring(env, " %");
1009 be_emit_string(env, reg8bit);
1010 be_emit_finish_line_gas(env, node);
1014 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1015 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1019 void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
1020 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
1024 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1025 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1029 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1031 long pnc = get_ia32_pncode(node);
1032 long unord = pnc & pn_Cmp_Uo;
1034 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1037 case pn_Cmp_Leg: /* odered */
1040 case pn_Cmp_Uo: /* unordered */
1044 case pn_Cmp_Eq: /* == */
1048 case pn_Cmp_Lt: /* < */
1052 case pn_Cmp_Le: /* <= */
1056 case pn_Cmp_Gt: /* > */
1060 case pn_Cmp_Ge: /* >= */
1064 case pn_Cmp_Lg: /* != */
1069 assert(sse_pnc >= 0 && "unsupported compare");
1071 if (unord && sse_pnc != 3) {
1073 We need a separate compare against unordered.
1074 Quick and Dirty solution:
1075 - get some memory on stack
1079 - and result and stored result
1082 be_emit_cstring(env, "\tsubl $8, %esp");
1083 be_emit_finish_line_gas(env, node);
1085 be_emit_cstring(env, "\tcmpsd $3, ");
1086 ia32_emit_binop(env, node);
1087 be_emit_finish_line_gas(env, node);
1089 be_emit_cstring(env, "\tmovsd ");
1090 ia32_emit_dest_register(env, node, 0);
1091 be_emit_cstring(env, ", (%esp)");
1092 be_emit_finish_line_gas(env, node);
1095 be_emit_cstring(env, "\tcmpsd ");
1096 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1097 ia32_emit_binop(env, node);
1098 be_emit_finish_line_gas(env, node);
1100 if (unord && sse_pnc != 3) {
1101 be_emit_cstring(env, "\tandpd (%esp), ");
1102 ia32_emit_dest_register(env, node, 0);
1103 be_emit_finish_line_gas(env, node);
1105 be_emit_cstring(env, "\taddl $8, %esp");
1106 be_emit_finish_line_gas(env, node);
1110 /*********************************************************
1113 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1114 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1115 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1116 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1119 *********************************************************/
1121 /* jump table entry (target and corresponding number) */
1122 typedef struct _branch_t {
1127 /* jump table for switch generation */
1128 typedef struct _jmp_tbl_t {
1129 ir_node *defProj; /**< default target */
1130 int min_value; /**< smallest switch case */
1131 int max_value; /**< largest switch case */
1132 int num_branches; /**< number of jumps */
1133 char *label; /**< label of the jump table */
1134 branch_t *branches; /**< jump array */
1138 * Compare two variables of type branch_t. Used to sort all switch cases
1141 int ia32_cmp_branch_t(const void *a, const void *b) {
1142 branch_t *b1 = (branch_t *)a;
1143 branch_t *b2 = (branch_t *)b;
1145 if (b1->value <= b2->value)
1152 * Emits code for a SwitchJmp (creates a jump table if
1153 * possible otherwise a cmp-jmp cascade). Port from
1157 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1158 unsigned long interval;
1163 const ir_edge_t *edge;
1165 /* fill the table structure */
1166 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1167 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1169 tbl.num_branches = get_irn_n_edges(node);
1170 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1171 tbl.min_value = INT_MAX;
1172 tbl.max_value = INT_MIN;
1175 /* go over all proj's and collect them */
1176 foreach_out_edge(node, edge) {
1177 proj = get_edge_src_irn(edge);
1178 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1180 pnc = get_Proj_proj(proj);
1182 /* create branch entry */
1183 tbl.branches[i].target = proj;
1184 tbl.branches[i].value = pnc;
1186 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1187 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1189 /* check for default proj */
1190 if (pnc == get_ia32_pncode(node)) {
1191 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1198 /* sort the branches by their number */
1199 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1201 /* two-complement's magic make this work without overflow */
1202 interval = tbl.max_value - tbl.min_value;
1204 /* emit the table */
1205 be_emit_cstring(env, "\tcmpl $");
1206 be_emit_irprintf(env->emit, "%u, ", interval);
1207 ia32_emit_source_register(env, node, 0);
1208 be_emit_finish_line_gas(env, node);
1210 be_emit_cstring(env, "\tja ");
1211 ia32_emit_cfop_target(env, tbl.defProj);
1212 be_emit_finish_line_gas(env, node);
1214 if (tbl.num_branches > 1) {
1216 be_emit_cstring(env, "\tjmp *");
1217 be_emit_string(env, tbl.label);
1218 be_emit_cstring(env, "(,");
1219 ia32_emit_source_register(env, node, 0);
1220 be_emit_cstring(env, ",4)");
1221 be_emit_finish_line_gas(env, node);
1223 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1224 be_emit_cstring(env, "\t.align 4\n");
1225 be_emit_write_line(env);
1227 be_emit_string(env, tbl.label);
1228 be_emit_cstring(env, ":\n");
1229 be_emit_write_line(env);
1231 be_emit_cstring(env, ".long ");
1232 ia32_emit_cfop_target(env, tbl.branches[0].target);
1233 be_emit_finish_line_gas(env, NULL);
1235 last_value = tbl.branches[0].value;
1236 for (i = 1; i < tbl.num_branches; ++i) {
1237 while (++last_value < tbl.branches[i].value) {
1238 be_emit_cstring(env, ".long ");
1239 ia32_emit_cfop_target(env, tbl.defProj);
1240 be_emit_finish_line_gas(env, NULL);
1242 be_emit_cstring(env, ".long ");
1243 ia32_emit_cfop_target(env, tbl.branches[i].target);
1244 be_emit_finish_line_gas(env, NULL);
1246 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1248 /* one jump is enough */
1249 be_emit_cstring(env, "\tjmp ");
1250 ia32_emit_cfop_target(env, tbl.branches[0].target);
1251 be_emit_finish_line_gas(env, node);
1261 * Emits code for a unconditional jump.
1264 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1265 ir_node *block, *next_block;
1267 /* for now, the code works for scheduled and non-schedules blocks */
1268 block = get_nodes_block(node);
1270 /* we have a block schedule */
1271 next_block = next_blk_sched(block);
1272 if (get_cfop_target_block(node) != next_block) {
1273 be_emit_cstring(env, "\tjmp ");
1274 ia32_emit_cfop_target(env, node);
1276 be_emit_cstring(env, "\t/* fallthrough to ");
1277 ia32_emit_cfop_target(env, node);
1278 be_emit_cstring(env, " */");
1280 be_emit_finish_line_gas(env, node);
1283 /**********************************
1286 * | | ___ _ __ _ _| |_) |
1287 * | | / _ \| '_ \| | | | _ <
1288 * | |___| (_) | |_) | |_| | |_) |
1289 * \_____\___/| .__/ \__, |____/
1292 **********************************/
1295 * Emit movsb/w instructions to make mov count divideable by 4
1298 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1299 be_emit_cstring(env, "\tcld");
1300 be_emit_finish_line_gas(env, NULL);
1304 be_emit_cstring(env, "\tmovsb");
1305 be_emit_finish_line_gas(env, NULL);
1308 be_emit_cstring(env, "\tmovsw");
1309 be_emit_finish_line_gas(env, NULL);
1312 be_emit_cstring(env, "\tmovsb");
1313 be_emit_finish_line_gas(env, NULL);
1314 be_emit_cstring(env, "\tmovsw");
1315 be_emit_finish_line_gas(env, NULL);
1321 * Emit rep movsd instruction for memcopy.
1324 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1325 tarval *tv = get_ia32_Immop_tarval(node);
1326 int rem = get_tarval_long(tv);
1328 emit_CopyB_prolog(env, rem);
1330 be_emit_cstring(env, "\trep movsd");
1331 be_emit_finish_line_gas(env, node);
1335 * Emits unrolled memcopy.
1338 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1339 tarval *tv = get_ia32_Immop_tarval(node);
1340 int size = get_tarval_long(tv);
1342 emit_CopyB_prolog(env, size & 0x3);
1346 be_emit_cstring(env, "\tmovsd");
1347 be_emit_finish_line_gas(env, NULL);
1353 /***************************
1357 * | | / _ \| '_ \ \ / /
1358 * | |___| (_) | | | \ V /
1359 * \_____\___/|_| |_|\_/
1361 ***************************/
1364 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1367 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1368 ir_mode *ls_mode = get_ia32_ls_mode(node);
1369 int ls_bits = get_mode_size_bits(ls_mode);
1371 be_emit_cstring(env, "\tcvt");
1373 if(is_ia32_Conv_I2FP(node)) {
1375 be_emit_cstring(env, "si2ss");
1377 be_emit_cstring(env, "si2sd");
1379 } else if(is_ia32_Conv_FP2I(node)) {
1381 be_emit_cstring(env, "ss2si");
1383 be_emit_cstring(env, "sd2si");
1386 assert(is_ia32_Conv_FP2FP(node));
1388 be_emit_cstring(env, "sd2ss");
1390 be_emit_cstring(env, "ss2sd");
1393 be_emit_char(env, ' ');
1395 switch(get_ia32_op_type(node)) {
1397 ia32_emit_source_register(env, node, 2);
1398 be_emit_cstring(env, ", ");
1399 ia32_emit_dest_register(env, node, 0);
1401 case ia32_AddrModeS:
1402 ia32_emit_dest_register(env, node, 0);
1403 be_emit_cstring(env, ", ");
1404 ia32_emit_am(env, node);
1407 assert(0 && "unsupported op type for Conv");
1409 be_emit_finish_line_gas(env, node);
1413 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1414 emit_ia32_Conv_with_FP(env, node);
1418 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1419 emit_ia32_Conv_with_FP(env, node);
1423 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1424 emit_ia32_Conv_with_FP(env, node);
1428 * Emits code for an Int conversion.
1431 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1432 const char *sign_suffix;
1433 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1434 int smaller_bits = get_mode_size_bits(smaller_mode);
1436 const arch_register_t *in_reg, *out_reg;
1438 assert(!mode_is_float(smaller_mode));
1439 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1441 signed_mode = mode_is_signed(smaller_mode);
1442 if(smaller_bits == 32) {
1443 // this should not happen as it's no convert
1447 sign_suffix = signed_mode ? "s" : "z";
1450 switch(get_ia32_op_type(node)) {
1452 in_reg = get_in_reg(env, node, 2);
1453 out_reg = get_out_reg(env, node, 0);
1455 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1456 REGS_ARE_EQUAL(out_reg, in_reg) &&
1459 /* argument and result are both in EAX and */
1460 /* signedness is ok: -> use converts */
1461 if (smaller_bits == 8) {
1462 be_emit_cstring(env, "\tcbtw");
1463 } else if (smaller_bits == 16) {
1464 be_emit_cstring(env, "\tcwtl");
1468 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1469 /* argument and result are in the same register */
1470 /* and signedness is ok: -> use and with mask */
1471 int mask = (1 << smaller_bits) - 1;
1472 be_emit_cstring(env, "\tandl $0x");
1473 be_emit_irprintf(env->emit, "%x, ", mask);
1474 ia32_emit_dest_register(env, node, 0);
1476 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1478 be_emit_cstring(env, "\tmov");
1479 be_emit_string(env, sign_suffix);
1480 ia32_emit_mode_suffix(env, smaller_mode);
1481 be_emit_cstring(env, "l %");
1482 be_emit_string(env, sreg);
1483 be_emit_cstring(env, ", ");
1484 ia32_emit_dest_register(env, node, 0);
1487 case ia32_AddrModeS: {
1488 be_emit_cstring(env, "\tmov");
1489 be_emit_string(env, sign_suffix);
1490 ia32_emit_mode_suffix(env, smaller_mode);
1491 be_emit_cstring(env, "l %");
1492 ia32_emit_am(env, node);
1493 be_emit_cstring(env, ", ");
1494 ia32_emit_dest_register(env, node, 0);
1498 assert(0 && "unsupported op type for Conv");
1500 be_emit_finish_line_gas(env, node);
1504 * Emits code for an 8Bit Int conversion.
1506 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1507 emit_ia32_Conv_I2I(env, node);
1511 /*******************************************
1514 * | |__ ___ _ __ ___ __| | ___ ___
1515 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1516 * | |_) | __/ | | | (_) | (_| | __/\__ \
1517 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1519 *******************************************/
1522 * Emits a backend call
1525 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1526 ir_entity *ent = be_Call_get_entity(node);
1528 be_emit_cstring(env, "\tcall ");
1530 mark_entity_visited(ent);
1531 be_emit_string(env, get_entity_ld_name(ent));
1533 be_emit_char(env, '*');
1534 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1536 be_emit_finish_line_gas(env, node);
1540 * Emits code to increase stack pointer.
1543 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1544 int offs = be_get_IncSP_offset(node);
1550 be_emit_cstring(env, "\tsubl $");
1551 be_emit_irprintf(env->emit, "%u, ", offs);
1552 ia32_emit_source_register(env, node, 0);
1554 be_emit_cstring(env, "\taddl $");
1555 be_emit_irprintf(env->emit, "%u, ", -offs);
1556 ia32_emit_source_register(env, node, 0);
1558 be_emit_finish_line_gas(env, node);
1562 * Emits code to set stack pointer.
1565 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1566 be_emit_cstring(env, "\tmovl ");
1567 ia32_emit_source_register(env, node, 2);
1568 be_emit_cstring(env, ", ");
1569 ia32_emit_dest_register(env, node, 0);
1570 be_emit_finish_line_gas(env, node);
1574 * Emits code for Copy/CopyKeep.
1577 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1579 const arch_env_t *aenv = env->arch_env;
1582 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1583 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1586 mode = get_irn_mode(node);
1587 if (mode == mode_E) {
1588 be_emit_cstring(env, "\tmovsd ");
1589 ia32_emit_source_register(env, node, 0);
1590 be_emit_cstring(env, ", ");
1591 ia32_emit_dest_register(env, node, 0);
1593 be_emit_cstring(env, "\tmovl ");
1594 ia32_emit_source_register(env, node, 0);
1595 be_emit_cstring(env, ", ");
1596 ia32_emit_dest_register(env, node, 0);
1598 be_emit_finish_line_gas(env, node);
1602 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1603 Copy_emitter(env, node, be_get_Copy_op(node));
1607 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1608 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1612 * Emits code for exchange.
1615 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1616 const arch_register_t *in1, *in2;
1617 const arch_register_class_t *cls1, *cls2;
1619 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1620 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1622 cls1 = arch_register_get_class(in1);
1623 cls2 = arch_register_get_class(in2);
1625 assert(cls1 == cls2 && "Register class mismatch at Perm");
1627 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1628 be_emit_cstring(env, "\txchg ");
1629 ia32_emit_source_register(env, node, 1);
1630 be_emit_cstring(env, ", ");
1631 ia32_emit_source_register(env, node, 0);
1632 be_emit_finish_line_gas(env, node);
1633 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1634 be_emit_cstring(env, "\txorpd ");
1635 ia32_emit_source_register(env, node, 1);
1636 be_emit_cstring(env, ", ");
1637 ia32_emit_source_register(env, node, 0);
1638 be_emit_finish_line_gas(env, NULL);
1640 be_emit_cstring(env, "\txorpd ");
1641 ia32_emit_source_register(env, node, 0);
1642 be_emit_cstring(env, ", ");
1643 ia32_emit_source_register(env, node, 1);
1644 be_emit_finish_line_gas(env, NULL);
1646 be_emit_cstring(env, "\txorpd ");
1647 ia32_emit_source_register(env, node, 1);
1648 be_emit_cstring(env, ", ");
1649 ia32_emit_source_register(env, node, 0);
1650 be_emit_finish_line_gas(env, node);
1651 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1653 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1659 * Emits code for Constant loading.
1662 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1663 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1665 if (imm_tp == ia32_ImmSymConst) {
1666 be_emit_cstring(env, "\tmovl ");
1667 ia32_emit_immediate(env, node);
1668 be_emit_cstring(env, ", ");
1669 ia32_emit_dest_register(env, node, 0);
1671 tarval *tv = get_ia32_Immop_tarval(node);
1672 assert(get_irn_mode(node) == mode_Iu);
1673 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1674 if (tarval_is_null(tv)) {
1675 if (env->isa->opt_arch == arch_pentium_4) {
1676 /* P4 prefers sub r, r, others xor r, r */
1677 be_emit_cstring(env, "\tsubl ");
1679 be_emit_cstring(env, "\txorl ");
1681 ia32_emit_dest_register(env, node, 0);
1682 be_emit_cstring(env, ", ");
1683 ia32_emit_dest_register(env, node, 0);
1685 be_emit_cstring(env, "\tmovl ");
1686 ia32_emit_immediate(env, node);
1687 be_emit_cstring(env, ", ");
1688 ia32_emit_dest_register(env, node, 0);
1691 be_emit_finish_line_gas(env, node);
1695 * Emits code to load the TLS base
1698 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1699 be_emit_cstring(env, "\tmovl %gs:0, ");
1700 ia32_emit_dest_register(env, node, 0);
1701 be_emit_finish_line_gas(env, node);
1705 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1706 be_emit_cstring(env, "\tret");
1707 be_emit_finish_line_gas(env, node);
1711 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1715 /***********************************************************************************
1718 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1719 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1720 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1721 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1723 ***********************************************************************************/
1726 * Enters the emitter functions for handled nodes into the generic
1727 * pointer of an opcode.
1730 void ia32_register_emitters(void) {
1732 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1733 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1734 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1735 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1736 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1737 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1739 /* first clear the generic function pointer for all ops */
1740 clear_irp_opcodes_generic_func();
1742 /* register all emitter functions defined in spec */
1743 ia32_register_spec_emitters();
1745 /* other ia32 emitter functions */
1751 IA32_EMIT(PsiCondCMov);
1753 IA32_EMIT(PsiCondSet);
1754 IA32_EMIT(SwitchJmp);
1757 IA32_EMIT(Conv_I2FP);
1758 IA32_EMIT(Conv_FP2I);
1759 IA32_EMIT(Conv_FP2FP);
1760 IA32_EMIT(Conv_I2I);
1761 IA32_EMIT(Conv_I2I8Bit);
1766 IA32_EMIT(xCmpCMov);
1767 IA32_EMIT(xCondJmp);
1768 IA32_EMIT2(fcomJmp, x87CondJmp);
1769 IA32_EMIT2(fcompJmp, x87CondJmp);
1770 IA32_EMIT2(fcomppJmp, x87CondJmp);
1771 IA32_EMIT2(fcomrJmp, x87CondJmp);
1772 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1773 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1775 /* benode emitter */
1801 static const char *last_name = NULL;
1802 static unsigned last_line = -1;
1803 static unsigned num = -1;
1806 * Emit the debug support for node node.
1809 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1810 dbg_info *db = get_irn_dbg_info(node);
1812 const char *fname = be_retrieve_dbg_info(db, &lineno);
1814 if (! env->cg->birg->main_env->options->stabs_debug_support)
1818 if (last_name != fname) {
1820 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1823 if (last_line != lineno) {
1826 snprintf(name, sizeof(name), ".LM%u", ++num);
1828 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1829 be_emit_string(env, name);
1830 be_emit_cstring(env, ":\n");
1831 be_emit_write_line(env);
1836 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1839 * Emits code for a node.
1842 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1843 ir_op *op = get_irn_op(node);
1845 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
1847 if (op->ops.generic) {
1848 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1849 ia32_emit_dbg(env, node);
1850 (*func) (env, node);
1852 emit_Nothing(env, node);
1853 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1858 * Emits gas alignment directives
1861 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1862 be_emit_cstring(env, "\t.p2align ");
1863 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
1864 be_emit_write_line(env);
1868 * Emits gas alignment directives for Functions depended on cpu architecture.
1871 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1873 unsigned maximum_skip;
1888 maximum_skip = (1 << align) - 1;
1889 ia32_emit_alignment(env, align, maximum_skip);
1893 * Emits gas alignment directives for Labels depended on cpu architecture.
1896 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1897 unsigned align; unsigned maximum_skip;
1912 maximum_skip = (1 << align) - 1;
1913 ia32_emit_alignment(env, align, maximum_skip);
1917 int is_first_loop_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev_block) {
1918 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1919 double block_freq, prev_freq;
1920 static const double DELTA = .0001;
1921 cpu_support cpu = env->isa->opt_arch;
1923 if(exec_freq == NULL)
1925 if(cpu == arch_i386 || cpu == arch_i486)
1928 block_freq = get_block_execfreq(exec_freq, block);
1929 prev_freq = get_block_execfreq(exec_freq, prev_block);
1931 if(block_freq < DELTA || prev_freq < DELTA)
1934 block_freq /= prev_freq;
1938 case arch_athlon_64:
1940 return block_freq > 3;
1945 return block_freq > 2;
1949 * Walks over the nodes in a block connected by scheduling edges
1950 * and emits code for each node.
1953 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block) {
1954 ir_graph *irg = get_irn_irg(block);
1955 ir_node *start_block = get_irg_start_block(irg);
1957 const ir_node *node;
1960 assert(is_Block(block));
1962 if (block == start_block)
1965 if (need_label && get_irn_arity(block) == 1) {
1966 ir_node *pred_block = get_Block_cfgpred_block(block, 0);
1968 if (pred_block == last_block && get_irn_n_edges_kind(pred_block, EDGE_KIND_BLOCK) <= 2)
1972 /* special case: if one of our cfg preds is a switch-jmp we need a label, */
1973 /* otherwise there might be jump table entries jumping to */
1974 /* non-existent (omitted) labels */
1975 for (i = get_Block_n_cfgpreds(block) - 1; i >= 0; --i) {
1976 ir_node *pred = get_Block_cfgpred(block, i);
1978 if (is_Proj(pred)) {
1979 assert(get_irn_mode(pred) == mode_X);
1980 if (is_ia32_SwitchJmp(get_Proj_pred(pred))) {
1990 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1992 /* align the loop headers */
1993 if (! is_first_loop_block(env, block, last_block)) {
1994 /* align blocks where the previous block has no fallthrough */
1995 arity = get_irn_arity(block);
1997 for (i = 0; i < arity; ++i) {
1998 ir_node *predblock = get_Block_cfgpred_block(block, i);
2000 if (predblock == last_block) {
2008 ia32_emit_align_label(env, env->isa->opt_arch);
2010 be_emit_cstring(env, BLOCK_PREFIX);
2011 be_emit_irprintf(env->emit, "%d:", get_irn_node_nr(block));
2012 be_emit_pad_comment(env);
2013 be_emit_cstring(env, " /* preds:");
2015 /* emit list of pred blocks in comment */
2016 arity = get_irn_arity(block);
2017 for (i = 0; i < arity; ++i) {
2018 ir_node *predblock = get_Block_cfgpred_block(block, i);
2019 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2022 if (exec_freq != NULL) {
2023 be_emit_irprintf(env->emit, " freq: %f", get_block_execfreq(exec_freq, block));
2025 be_emit_cstring(env, " */\n");
2026 be_emit_write_line(env);
2029 /* emit the contents of the block */
2030 ia32_emit_dbg(env, block);
2031 sched_foreach(block, node) {
2032 ia32_emit_node(env, node);
2037 * Emits code for function start.
2040 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2041 ir_entity *irg_ent = get_irg_entity(irg);
2042 const char *irg_name = get_entity_ld_name(irg_ent);
2043 cpu_support cpu = env->isa->opt_arch;
2044 const be_irg_t *birg = env->cg->birg;
2046 be_emit_write_line(env);
2047 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2048 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2049 ia32_emit_align_func(env, cpu);
2050 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2051 be_emit_cstring(env, ".global ");
2052 be_emit_string(env, irg_name);
2053 be_emit_char(env, '\n');
2054 be_emit_write_line(env);
2056 ia32_emit_function_object(env, irg_name);
2057 be_emit_string(env, irg_name);
2058 be_emit_cstring(env, ":\n");
2059 be_emit_write_line(env);
2063 * Emits code for function end
2066 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2067 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2068 const be_irg_t *birg = env->cg->birg;
2070 ia32_emit_function_size(env, irg_name);
2071 be_dbg_method_end(birg->main_env->db_handle);
2072 be_emit_char(env, '\n');
2073 be_emit_write_line(env);
2078 * Sets labels for control flow nodes (jump target)
2081 void ia32_gen_labels(ir_node *block, void *data) {
2083 int n = get_Block_n_cfgpreds(block);
2085 for (n--; n >= 0; n--) {
2086 pred = get_Block_cfgpred(block, n);
2087 set_irn_link(pred, block);
2092 * Main driver. Emits the code for one routine.
2094 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2095 ia32_emit_env_t env;
2097 ir_node *last_block = NULL;
2100 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2101 env.emit = &env.isa->emit;
2102 env.arch_env = cg->arch_env;
2105 ia32_register_emitters();
2107 ia32_emit_func_prolog(&env, irg);
2108 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2110 n = ARR_LEN(cg->blk_sched);
2111 for (i = 0; i < n;) {
2114 block = cg->blk_sched[i];
2116 next_bl = i < n ? cg->blk_sched[i] : NULL;
2118 /* set here the link. the emitter expects to find the next block here */
2119 set_irn_link(block, next_bl);
2120 ia32_gen_block(&env, block, last_block);
2124 ia32_emit_func_epilog(&env, irg);
2127 void ia32_init_emitter(void)
2129 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");