2 * This file implements the node emitter.
22 #include "iredges_t.h"
24 #include "../besched_t.h"
25 #include "../benode_t.h"
27 #include "ia32_emitter.h"
28 #include "gen_ia32_emitter.h"
29 #include "gen_ia32_regalloc_if.h"
30 #include "ia32_nodes_attr.h"
31 #include "ia32_new_nodes.h"
32 #include "ia32_map_regs.h"
34 #define BLOCK_PREFIX(x) ".L" x
36 #define SNPRINTF_BUF_LEN 128
38 /* global arch_env for lc_printf functions */
39 static const arch_env_t *arch_env = NULL;
41 /*************************************************************
43 * (_) | | / _| | | | |
44 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
45 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
46 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
47 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
50 *************************************************************/
53 * returns true if a node has x87 registers
55 static int has_x87_register(const ir_node *n) {
56 return is_irn_machine_user(n, 0);
59 /* We always pass the ir_node which is a pointer. */
60 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
61 return lc_arg_type_ptr;
66 * Returns the register at in position pos.
68 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
70 const arch_register_t *reg = NULL;
72 assert(get_irn_arity(irn) > pos && "Invalid IN position");
74 /* The out register of the operator at position pos is the
75 in register we need. */
76 op = get_irn_n(irn, pos);
78 reg = arch_get_irn_register(arch_env, op);
80 assert(reg && "no in register found");
85 * Returns the register at out position pos.
87 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
89 const arch_register_t *reg = NULL;
91 /* 1st case: irn is not of mode_T, so it has only */
92 /* one OUT register -> good */
93 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
94 /* Proj with the corresponding projnum for the register */
96 if (get_irn_mode(irn) != mode_T) {
97 reg = arch_get_irn_register(arch_env, irn);
99 else if (is_ia32_irn(irn)) {
100 reg = get_ia32_out_reg(irn, pos);
103 const ir_edge_t *edge;
105 foreach_out_edge(irn, edge) {
106 proj = get_edge_src_irn(edge);
107 assert(is_Proj(proj) && "non-Proj from mode_T node");
108 if (get_Proj_proj(proj) == pos) {
109 reg = arch_get_irn_register(arch_env, proj);
115 assert(reg && "no out register found");
125 * Returns the name of the in register at position pos.
127 static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
128 const arch_register_t *reg;
130 if (in_out == IN_REG) {
131 reg = get_in_reg(irn, pos);
133 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
134 /* FIXME: works for binop only */
135 assert(2 <= pos && pos <= 3);
136 reg = get_ia32_attr(irn)->x87[pos - 2];
140 /* destination address mode nodes don't have outputs */
141 if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
145 reg = get_out_reg(irn, pos);
146 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
147 reg = get_ia32_attr(irn)->x87[pos + 2];
149 return arch_register_get_name(reg);
153 * Get the register name for a node.
155 static int ia32_get_reg_name(lc_appendable_t *app,
156 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
159 ir_node *X = arg->v_ptr;
160 int nr = occ->width - 1;
163 return lc_appendable_snadd(app, "(null)", 6);
165 buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
167 /* append the stupid % to register names */
168 lc_appendable_chadd(app, '%');
169 return lc_appendable_snadd(app, buf, strlen(buf));
173 * Get the x87 register name for a node.
175 static int ia32_get_x87_name(lc_appendable_t *app,
176 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
179 ir_node *X = arg->v_ptr;
180 int nr = occ->width - 1;
184 return lc_appendable_snadd(app, "(null)", 6);
186 attr = get_ia32_attr(X);
187 buf = attr->x87[nr]->name;
188 lc_appendable_chadd(app, '%');
189 return lc_appendable_snadd(app, buf, strlen(buf));
193 * Returns the tarval, offset or scale of an ia32 as a string.
195 static int ia32_const_to_str(lc_appendable_t *app,
196 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
199 ir_node *X = arg->v_ptr;
202 return lc_arg_append(app, occ, "(null)", 6);
204 if (occ->conversion == 'C') {
205 buf = get_ia32_cnst(X);
208 buf = get_ia32_am_offs(X);
211 return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
215 * Determines the SSE suffix depending on the mode.
217 static int ia32_get_mode_suffix(lc_appendable_t *app,
218 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
220 ir_node *X = arg->v_ptr;
221 ir_mode *mode = get_irn_mode(X);
223 if (mode == mode_T) {
224 mode = is_ia32_AddrModeS(X) || is_ia32_AddrModeD(X) ? get_ia32_ls_mode(X) : get_ia32_res_mode(X);
228 return lc_arg_append(app, occ, "(null)", 6);
230 if (mode_is_float(mode)) {
231 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
234 return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
239 * Return the ia32 printf arg environment.
240 * We use the firm environment with some additional handlers.
242 const lc_arg_env_t *ia32_get_arg_env(void) {
243 static lc_arg_env_t *env = NULL;
245 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
246 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
247 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
248 static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
251 /* extend the firm printer */
252 env = firm_get_arg_env();
254 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
255 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
256 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
257 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
258 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
259 lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
265 static char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
266 switch(get_mode_size_bits(mode)) {
268 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
270 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
272 return (char *)arch_register_get_name(reg);
277 * Emits registers and/or address mode of a binary operation.
279 char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
280 static char *buf = NULL;
282 /* verify that this function is never called on non-AM supporting operations */
283 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
285 #define PRODUCES_RESULT(n) \
286 (!(is_ia32_St(n) || \
287 is_ia32_Store8Bit(n) || \
288 is_ia32_CondJmp(n) || \
289 is_ia32_fCondJmp(n) || \
290 is_ia32_SwitchJmp(n)))
293 buf = xcalloc(1, SNPRINTF_BUF_LEN);
296 memset(buf, 0, SNPRINTF_BUF_LEN);
299 switch(get_ia32_op_type(n)) {
301 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
302 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
305 const arch_register_t *in1 = get_in_reg(n, 2);
306 const arch_register_t *in2 = get_in_reg(n, 3);
307 const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
308 const arch_register_t *in;
311 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
312 out = out ? out : in1;
313 in_name = arch_register_get_name(in);
315 if (is_ia32_emit_cl(n)) {
316 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
320 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
324 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
325 assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
326 snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
329 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S, %s", n, ia32_emit_am(n, env));
333 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
334 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
335 ia32_emit_am(n, env),
336 is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
337 get_ia32_cnst(n)); /* tell the assembler to store it's address. */
340 const arch_register_t *in1 = get_in_reg(n, 2);
341 ir_mode *mode = get_ia32_res_mode(n);
344 mode = mode ? mode : get_ia32_ls_mode(n);
345 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
347 if (is_ia32_emit_cl(n)) {
348 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
352 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
356 assert(0 && "unsupported op type");
359 #undef PRODUCES_RESULT
365 * Emits registers and/or address mode of a binary operation.
367 char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
368 static char *buf = NULL;
370 /* verify that this function is never called on non-AM supporting operations */
371 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
374 buf = xcalloc(1, SNPRINTF_BUF_LEN);
377 memset(buf, 0, SNPRINTF_BUF_LEN);
380 switch(get_ia32_op_type(n)) {
382 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
383 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
386 ia32_attr_t *attr = get_ia32_attr(n);
387 const arch_register_t *in1 = attr->x87[0];
388 const arch_register_t *in2 = attr->x87[1];
389 const arch_register_t *out = attr->x87[2];
390 const arch_register_t *in;
393 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
394 out = out ? out : in1;
395 in_name = arch_register_get_name(in);
397 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
402 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
405 assert(0 && "unsupported op type");
408 #undef PRODUCES_RESULT
414 * Emits registers and/or address mode of a unary operation.
416 char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
417 static char *buf = NULL;
420 buf = xcalloc(1, SNPRINTF_BUF_LEN);
423 memset(buf, 0, SNPRINTF_BUF_LEN);
426 switch(get_ia32_op_type(n)) {
428 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
429 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
432 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
436 snprintf(buf, SNPRINTF_BUF_LEN, ia32_emit_am(n, env));
439 assert(0 && "unsupported op type");
446 * Emits address mode.
448 char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
449 ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
453 static struct obstack *obst = NULL;
454 ir_mode *mode = get_ia32_ls_mode(n);
456 if (! is_ia32_Lea(n))
457 assert(mode && "AM node must have ls_mode attribute set.");
460 obst = xcalloc(1, sizeof(*obst));
463 obstack_free(obst, NULL);
466 /* obstack_free with NULL results in an uninitialized obstack */
470 switch (get_mode_size_bits(mode)) {
472 obstack_printf(obst, "BYTE PTR ");
475 obstack_printf(obst, "WORD PTR ");
478 obstack_printf(obst, "DWORD PTR ");
481 if (has_x87_register(n))
482 /* ARGHHH: stupid gas x87 wants QWORD PTR but SSE must be WITHOUT */
483 obstack_printf(obst, "QWORD PTR ");
487 obstack_printf(obst, "XWORD PTR ");
494 /* emit address mode symconst */
495 if (get_ia32_am_sc(n)) {
496 if (is_ia32_am_sc_sign(n))
497 obstack_printf(obst, "-");
498 obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
501 if (am_flav & ia32_B) {
502 obstack_printf(obst, "[");
503 lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
507 if (am_flav & ia32_I) {
509 obstack_printf(obst, "+");
512 obstack_printf(obst, "[");
515 lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
517 if (am_flav & ia32_S) {
518 obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
524 if (am_flav & ia32_O) {
525 s = get_ia32_am_offs(n);
528 /* omit explicit + if there was no base or index */
530 obstack_printf(obst, "[");
535 obstack_printf(obst, s);
541 obstack_printf(obst, "] ");
543 size = obstack_object_size(obst);
544 s = obstack_finish(obst);
553 * Formated print of commands and comments.
555 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
557 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
560 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
562 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
568 * Add a number to a prefix. This number will not be used a second time.
570 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
571 static unsigned long id = 0;
572 snprintf(buf, buflen, "%s%lu", prefix, ++id);
578 /*************************************************
581 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
582 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
583 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
584 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
586 *************************************************/
589 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
592 * coding of conditions
594 struct cmp2conditon_t {
600 * positive conditions for signed compares
602 static const struct cmp2conditon_t cmp2condition_s[] = {
603 { NULL, pn_Cmp_False }, /* always false */
604 { "e", pn_Cmp_Eq }, /* == */
605 { "l", pn_Cmp_Lt }, /* < */
606 { "le", pn_Cmp_Le }, /* <= */
607 { "g", pn_Cmp_Gt }, /* > */
608 { "ge", pn_Cmp_Ge }, /* >= */
609 { "ne", pn_Cmp_Lg }, /* != */
610 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
611 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
612 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
613 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
614 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
615 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
616 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
617 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
618 { NULL, pn_Cmp_True }, /* always true */
622 * positive conditions for unsigned compares
624 static const struct cmp2conditon_t cmp2condition_u[] = {
625 { NULL, pn_Cmp_False }, /* always false */
626 { "e", pn_Cmp_Eq }, /* == */
627 { "b", pn_Cmp_Lt }, /* < */
628 { "be", pn_Cmp_Le }, /* <= */
629 { "a", pn_Cmp_Gt }, /* > */
630 { "ae", pn_Cmp_Ge }, /* >= */
631 { "ne", pn_Cmp_Lg }, /* != */
632 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
633 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
634 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
635 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
636 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
637 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
638 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
639 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
640 { NULL, pn_Cmp_True }, /* always true */
644 * returns the condition code
646 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
648 assert(cmp2condition_s[cmp_code].num == cmp_code);
649 assert(cmp2condition_u[cmp_code].num == cmp_code);
651 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
655 * Returns the target block for a control flow node.
657 static ir_node *get_cfop_target_block(const ir_node *irn) {
658 return get_irn_link(irn);
662 * Returns the target label for a control flow node.
664 static char *get_cfop_target(const ir_node *irn, char *buf) {
665 ir_node *bl = get_cfop_target_block(irn);
667 snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
671 /** Return the next block in Block schedule */
672 static ir_node *next_blk_sched(const ir_node *block) {
673 return get_irn_link(block);
677 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
679 static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
680 const ir_node *proj1, *proj2 = NULL;
681 const ir_node *block, *next_bl = NULL;
682 const ir_edge_t *edge;
683 char buf[SNPRINTF_BUF_LEN];
684 char cmd_buf[SNPRINTF_BUF_LEN];
685 char cmnt_buf[SNPRINTF_BUF_LEN];
687 /* get both Proj's */
688 edge = get_irn_out_edge_first(irn);
689 proj1 = get_edge_src_irn(edge);
690 assert(is_Proj(proj1) && "CondJmp with a non-Proj");
692 edge = get_irn_out_edge_next(irn, edge);
694 proj2 = get_edge_src_irn(edge);
695 assert(is_Proj(proj2) && "CondJmp with a non-Proj");
698 /* for now, the code works for scheduled and non-schedules blocks */
699 block = get_nodes_block(irn);
701 /* we have a block schedule */
702 next_bl = next_blk_sched(block);
704 if (get_cfop_target_block(proj1) == next_bl) {
705 /* exchange both proj's so the second one can be omitted */
706 const ir_node *t = proj1;
712 /* the first Proj must always be created */
713 if (get_Proj_proj(proj1) == pn_Cond_true) {
714 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
715 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
716 get_cfop_target(proj1, buf));
717 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
720 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
721 get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
722 !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
723 get_cfop_target(proj1, buf));
724 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
728 /* the second Proj might be a fallthrough */
730 if (get_cfop_target_block(proj2) != next_bl) {
731 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
732 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
736 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrogh %s */", get_cfop_target(proj2, buf));
743 * Emits code for conditional jump.
745 static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
747 char cmd_buf[SNPRINTF_BUF_LEN];
748 char cmnt_buf[SNPRINTF_BUF_LEN];
750 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
751 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
753 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
757 * Emits code for conditional jump with two variables.
759 static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
760 CondJmp_emitter(irn, env);
764 * Emits code for conditional test and jump.
766 static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
768 #define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
771 const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
772 const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
773 char cmd_buf[SNPRINTF_BUF_LEN];
774 char cmnt_buf[SNPRINTF_BUF_LEN];
777 op2 = arch_register_get_name(get_in_reg(irn, 1));
779 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
780 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
783 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
789 * Emits code for conditional test and jump with two variables.
791 static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
792 TestJmp_emitter(irn, env);
795 static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
797 char cmd_buf[SNPRINTF_BUF_LEN];
798 char cmnt_buf[SNPRINTF_BUF_LEN];
800 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
801 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
803 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
806 static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
808 char cmd_buf[SNPRINTF_BUF_LEN];
809 char cmnt_buf[SNPRINTF_BUF_LEN];
811 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
812 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
814 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
817 /*********************************************************
820 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
821 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
822 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
823 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
826 *********************************************************/
828 /* jump table entry (target and corresponding number) */
829 typedef struct _branch_t {
834 /* jump table for switch generation */
835 typedef struct _jmp_tbl_t {
836 ir_node *defProj; /**< default target */
837 int min_value; /**< smallest switch case */
838 int max_value; /**< largest switch case */
839 int num_branches; /**< number of jumps */
840 char *label; /**< label of the jump table */
841 branch_t *branches; /**< jump array */
845 * Compare two variables of type branch_t. Used to sort all switch cases
847 static int ia32_cmp_branch_t(const void *a, const void *b) {
848 branch_t *b1 = (branch_t *)a;
849 branch_t *b2 = (branch_t *)b;
851 if (b1->value <= b2->value)
858 * Emits code for a SwitchJmp (creates a jump table if
859 * possible otherwise a cmp-jmp cascade). Port from
862 static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
863 unsigned long interval;
864 char buf[SNPRINTF_BUF_LEN];
865 int last_value, i, pn;
868 const ir_edge_t *edge;
869 const lc_arg_env_t *env = ia32_get_arg_env();
870 FILE *F = emit_env->out;
871 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
873 /* fill the table structure */
874 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
875 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
877 tbl.num_branches = get_irn_n_edges(irn);
878 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
879 tbl.min_value = INT_MAX;
880 tbl.max_value = INT_MIN;
883 /* go over all proj's and collect them */
884 foreach_out_edge(irn, edge) {
885 proj = get_edge_src_irn(edge);
886 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
888 pn = get_Proj_proj(proj);
890 /* create branch entry */
891 tbl.branches[i].target = proj;
892 tbl.branches[i].value = pn;
894 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
895 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
897 /* check for default proj */
898 if (pn == get_ia32_pncode(irn)) {
899 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
906 /* sort the branches by their number */
907 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
909 /* two-complement's magic make this work without overflow */
910 interval = tbl.max_value - tbl.min_value;
913 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
914 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
917 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
918 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
921 if (tbl.num_branches > 1) {
924 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
925 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
928 fprintf(F, "\t.section\t.rodata\n");
929 fprintf(F, "\t.align 4\n");
931 fprintf(F, "%s:\n", tbl.label);
933 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
934 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
937 last_value = tbl.branches[0].value;
938 for (i = 1; i < tbl.num_branches; ++i) {
939 while (++last_value < tbl.branches[i].value) {
940 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
941 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
944 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
945 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
949 fprintf(F, "\n\t.text\n\n");
952 /* one jump is enough */
953 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
954 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
965 * Emits code for a unconditional jump.
967 static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
968 ir_node *block, *next_bl;
970 char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
972 /* for now, the code works for scheduled and non-schedules blocks */
973 block = get_nodes_block(irn);
975 /* we have a block schedule */
976 next_bl = next_blk_sched(block);
977 if (get_cfop_target_block(irn) != next_bl) {
978 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
979 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
983 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
988 /****************************
991 * _ __ _ __ ___ _ ___
992 * | '_ \| '__/ _ \| |/ __|
993 * | |_) | | | (_) | |\__ \
994 * | .__/|_| \___/| ||___/
997 ****************************/
1000 * Emits code for a proj -> node
1002 static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
1003 ir_node *pred = get_Proj_pred(irn);
1005 if (get_irn_op(pred) == op_Start) {
1006 switch(get_Proj_proj(irn)) {
1007 case pn_Start_X_initial_exec:
1016 /**********************************
1019 * | | ___ _ __ _ _| |_) |
1020 * | | / _ \| '_ \| | | | _ <
1021 * | |___| (_) | |_) | |_| | |_) |
1022 * \_____\___/| .__/ \__, |____/
1025 **********************************/
1028 * Emit movsb/w instructions to make mov count divideable by 4
1030 static void emit_CopyB_prolog(FILE *F, int rem, int size) {
1031 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1033 fprintf(F, "\t/* memcopy %d bytes*/\n", size);
1035 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
1036 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
1041 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1042 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
1045 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1046 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
1049 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1050 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1052 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1053 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1061 * Emit rep movsd instruction for memcopy.
1063 static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
1064 FILE *F = emit_env->out;
1065 tarval *tv = get_ia32_Immop_tarval(irn);
1066 int rem = get_tarval_long(tv);
1067 int size = get_tarval_long(get_ia32_Immop_tarval(get_irn_n(irn, 2)));
1068 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1070 emit_CopyB_prolog(F, rem, size);
1072 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
1073 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
1078 * Emits unrolled memcopy.
1080 static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
1081 tarval *tv = get_ia32_Immop_tarval(irn);
1082 int size = get_tarval_long(tv);
1083 FILE *F = emit_env->out;
1084 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1086 emit_CopyB_prolog(F, size & 0x3, size);
1090 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
1091 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
1098 /***************************
1102 * | | / _ \| '_ \ \ / /
1103 * | |___| (_) | | | \ V /
1104 * \_____\___/|_| |_|\_/
1106 ***************************/
1109 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1111 static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1112 FILE *F = emit_env->out;
1113 const lc_arg_env_t *env = ia32_get_arg_env();
1114 ir_mode *src_mode = get_ia32_src_mode(irn);
1115 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1116 char *from, *to, buf[64];
1117 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1119 from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
1120 to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
1122 switch(get_ia32_op_type(irn)) {
1124 lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
1126 case ia32_AddrModeS:
1127 lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
1130 assert(0 && "unsupported op type for Conv");
1133 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
1134 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
1138 static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1139 emit_ia32_Conv_with_FP(irn, emit_env);
1142 static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1143 emit_ia32_Conv_with_FP(irn, emit_env);
1146 static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1147 emit_ia32_Conv_with_FP(irn, emit_env);
1151 * Emits code for an Int conversion.
1153 static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1154 FILE *F = emit_env->out;
1155 const lc_arg_env_t *env = ia32_get_arg_env();
1156 char *move_cmd = "movzx";
1157 char *conv_cmd = NULL;
1158 ir_mode *src_mode = get_ia32_src_mode(irn);
1159 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1161 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1162 const arch_register_t *in_reg, *out_reg;
1164 n = get_mode_size_bits(src_mode);
1165 m = get_mode_size_bits(tgt_mode);
1167 if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
1169 if (n == 8 || m == 8)
1171 else if (n == 16 || m == 16)
1174 assert(0 && "unsupported Conv_I2I");
1177 switch(get_ia32_op_type(irn)) {
1179 in_reg = get_in_reg(irn, 2);
1180 out_reg = get_out_reg(irn, 0);
1182 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1183 REGS_ARE_EQUAL(out_reg, in_reg) &&
1184 mode_is_signed(n < m ? src_mode : tgt_mode))
1186 /* argument and result are both in EAX and */
1187 /* signedness is ok: -> use converts */
1188 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
1190 else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
1191 ! mode_is_signed(n < m ? src_mode : tgt_mode))
1193 /* argument and result are in the same register */
1194 /* and signedness is ok: -> use and with mask */
1195 int mask = (1 << (n < m ? n : m)) - 1;
1196 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
1199 /* use move w/o sign extension */
1200 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
1201 move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
1205 case ia32_AddrModeS:
1206 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
1207 move_cmd, irn, ia32_emit_am(irn, emit_env));
1210 assert(0 && "unsupported op type for Conv");
1213 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
1214 irn, n, src_mode, m, tgt_mode);
1220 * Emits code for an 8Bit Int conversion.
1222 void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
1223 emit_ia32_Conv_I2I(irn, emit_env);
1227 /*******************************************
1230 * | |__ ___ _ __ ___ __| | ___ ___
1231 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1232 * | |_) | __/ | | | (_) | (_| | __/\__ \
1233 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1235 *******************************************/
1238 * Emits a backend call
1240 static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
1241 FILE *F = emit_env->out;
1242 entity *ent = be_Call_get_entity(irn);
1243 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1246 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
1249 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
1252 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
1258 * Emits code to increase stack pointer.
1260 static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1261 FILE *F = emit_env->out;
1262 unsigned offs = be_get_IncSP_offset(irn);
1263 be_stack_dir_t dir = be_get_IncSP_direction(irn);
1264 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1267 if (dir == be_stack_dir_expand)
1268 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
1270 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
1271 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
1274 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
1275 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
1282 * Emits code to set stack pointer.
1284 static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1285 FILE *F = emit_env->out;
1286 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1288 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1289 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
1294 * Emits code for Copy.
1296 static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
1297 FILE *F = emit_env->out;
1298 const arch_env_t *aenv = emit_env->arch_env;
1299 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1301 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))))
1304 if (mode_is_float(get_irn_mode(irn)))
1305 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
1307 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
1308 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1313 * Emits code for exchange.
1315 static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
1316 FILE *F = emit_env->out;
1317 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1319 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
1320 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
1326 /***********************************************************************************
1329 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1330 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1331 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1332 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1334 ***********************************************************************************/
1337 * Enters the emitter functions for handled nodes into the generic
1338 * pointer of an opcode.
1340 static void ia32_register_emitters(void) {
1342 #define IA32_EMIT(a) op_ia32_##a->ops.generic = (op_func)emit_ia32_##a
1343 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1344 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1346 /* first clear the generic function pointer for all ops */
1347 clear_irp_opcodes_generic_func();
1349 /* register all emitter functions defined in spec */
1350 ia32_register_spec_emitters();
1352 /* other ia32 emitter functions */
1357 IA32_EMIT(SwitchJmp);
1360 IA32_EMIT(Conv_I2FP);
1361 IA32_EMIT(Conv_FP2I);
1362 IA32_EMIT(Conv_FP2FP);
1363 IA32_EMIT(Conv_I2I);
1364 IA32_EMIT(Conv_I2I8Bit);
1366 /* benode emitter */
1383 * Emits code for a node.
1385 static void ia32_emit_node(const ir_node *irn, void *env) {
1386 ia32_emit_env_t *emit_env = env;
1387 FILE *F = emit_env->out;
1388 ir_op *op = get_irn_op(irn);
1389 DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
1391 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
1393 if (op->ops.generic) {
1394 void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
1398 ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
1403 * Walks over the nodes in a block connected by scheduling edges
1404 * and emits code for each node.
1406 static void ia32_gen_block(ir_node *block, void *env) {
1409 if (! is_Block(block))
1412 fprintf(((ia32_emit_env_t *)env)->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
1413 sched_foreach(block, irn) {
1414 ia32_emit_node(irn, env);
1419 * Emits code for function start.
1421 static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
1422 entity *irg_ent = get_irg_entity(irg);
1423 const char *irg_name = get_entity_name(irg_ent);
1425 fprintf(F, "\t.section\t.text\n");
1426 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1427 fprintf(F, ".globl %s\n", irg_name);
1429 fprintf(F, "\t.type\t%s, @function\n", irg_name);
1430 fprintf(F, "%s:\n", irg_name);
1434 * Emits code for function end
1436 static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
1437 const char *irg_name = get_entity_name(get_irg_entity(irg));
1439 fprintf(F, "\tret\n");
1440 fprintf(F, "\t.size\t%s, .-%s\n\n", irg_name, irg_name);
1445 * Sets labels for control flow nodes (jump target)
1446 * TODO: Jump optimization
1448 static void ia32_gen_labels(ir_node *block, void *env) {
1450 int n = get_Block_n_cfgpreds(block);
1452 for (n--; n >= 0; n--) {
1453 pred = get_Block_cfgpred(block, n);
1454 set_irn_link(pred, block);
1459 * Main driver. Emits the code for one routine.
1461 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
1462 ia32_emit_env_t emit_env;
1466 emit_env.arch_env = cg->arch_env;
1468 emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
1469 FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
1471 /* set the global arch_env (needed by print hooks) */
1472 arch_env = cg->arch_env;
1474 ia32_register_emitters();
1476 ia32_emit_func_prolog(F, irg);
1477 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
1479 if ((cg->opt & IA32_OPT_EXTBB) && cg->blk_sched) {
1480 int i, n = ARR_LEN(cg->blk_sched);
1482 for (i = 0; i < n;) {
1485 block = cg->blk_sched[i];
1487 next_bl = i < n ? cg->blk_sched[i] : NULL;
1489 /* set here the link. the emitter expects to find the next block here */
1490 set_irn_link(block, next_bl);
1491 ia32_gen_block(block, &emit_env);
1495 /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
1496 in the block schedule. As this number should NEVER be equal the next block,
1497 we does not need a clear block link here. */
1498 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
1501 ia32_emit_func_epilog(F, irg);