2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 /* in case of a joker register: just return a valid register */
90 if (arch_register_type_is(reg, joker)) {
91 const arch_register_req_t *req;
93 /* ask for the requirements */
94 req = arch_get_register_req(arch_env, irn, pos);
96 if (arch_register_req_is(req, limited)) {
97 /* in case of limited requirements: get the first allowed register */
98 unsigned idx = rbitset_next(req->limited, 0, 1);
99 reg = arch_register_for_index(req->cls, idx);
101 /* otherwise get first register in class */
102 reg = arch_register_for_index(req->cls, 0);
110 * Returns the register at out position pos.
113 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
116 const arch_env_t *arch_env = env->arch_env;
118 const arch_register_t *reg = NULL;
120 /* 1st case: irn is not of mode_T, so it has only */
121 /* one OUT register -> good */
122 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
123 /* Proj with the corresponding projnum for the register */
125 if (get_irn_mode(irn) != mode_T) {
126 reg = arch_get_irn_register(arch_env, irn);
127 } else if (is_ia32_irn(irn)) {
128 reg = get_ia32_out_reg(irn, pos);
130 const ir_edge_t *edge;
132 foreach_out_edge(irn, edge) {
133 proj = get_edge_src_irn(edge);
134 assert(is_Proj(proj) && "non-Proj from mode_T node");
135 if (get_Proj_proj(proj) == pos) {
136 reg = arch_get_irn_register(arch_env, proj);
142 assert(reg && "no out register found");
147 * Determine the gnu assembler suffix that indicates a mode
150 char get_mode_suffix(const ir_mode *mode) {
151 if(mode_is_float(mode)) {
152 switch(get_mode_size_bits(mode)) {
161 assert(mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode));
162 switch(get_mode_size_bits(mode)) {
173 panic("Can't output mode_suffix for %+F\n", mode);
177 int produces_result(const ir_node *node) {
178 return !(is_ia32_St(node) ||
179 is_ia32_Store8Bit(node) ||
180 is_ia32_CondJmp(node) ||
181 is_ia32_xCondJmp(node) ||
182 is_ia32_CmpSet(node) ||
183 is_ia32_xCmpSet(node) ||
184 is_ia32_SwitchJmp(node));
188 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
189 const arch_register_t *reg) {
190 switch(get_mode_size_bits(mode)) {
192 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
194 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
196 return (char *)arch_register_get_name(reg);
201 * Add a number to a prefix. This number will not be used a second time.
204 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
205 static unsigned long id = 0;
206 snprintf(buf, buflen, "%s%lu", prefix, ++id);
210 /*************************************************************
212 * (_) | | / _| | | | |
213 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
214 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
215 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
216 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
219 *************************************************************/
221 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
222 // be_emit_env_t* so we cheat a bit...
223 #define be_emit_char(env,c) be_emit_char(env->emit,c)
224 #define be_emit_string(env,s) be_emit_string(env->emit,s)
225 #undef be_emit_cstring
226 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
227 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
228 #define be_emit_write_line(env) be_emit_write_line(env->emit)
229 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
230 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
232 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
234 const arch_register_t *reg = get_in_reg(env, node, pos);
235 const char *reg_name = arch_register_get_name(reg);
237 assert(pos < get_irn_arity(node));
239 be_emit_char(env, '%');
240 be_emit_string(env, reg_name);
243 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
244 const arch_register_t *reg = get_out_reg(env, node, pos);
245 const char *reg_name = arch_register_get_name(reg);
247 be_emit_char(env, '%');
248 be_emit_string(env, reg_name);
251 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
253 ia32_attr_t *attr = get_ia32_attr(node);
256 be_emit_char(env, '%');
257 be_emit_string(env, attr->x87[pos]->name);
260 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
266 be_emit_char(env, '$');
268 switch(get_ia32_immop_type(node)) {
270 tv = get_ia32_Immop_tarval(node);
271 be_emit_tarval(env->emit, tv);
273 case ia32_ImmSymConst:
274 ent = get_ia32_Immop_symconst(node);
275 mark_entity_visited(ent);
276 id = get_entity_ld_ident(ent);
277 be_emit_ident(env, id);
284 be_emit_string(env, "BAD");
289 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
291 be_emit_char(env, get_mode_suffix(mode));
294 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
296 ir_mode *mode = get_ia32_ls_mode(node);
300 ia32_emit_mode_suffix_mode(env, mode);
303 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
305 ir_mode *mode = get_ia32_ls_mode(node);
307 ia32_emit_mode_suffix_mode(env, mode);
311 char get_xmm_mode_suffix(ir_mode *mode)
313 assert(mode_is_float(mode));
314 switch(get_mode_size_bits(mode)) {
325 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
327 ir_mode *mode = get_ia32_ls_mode(node);
328 assert(mode != NULL);
329 be_emit_char(env, 's');
330 be_emit_char(env, get_xmm_mode_suffix(mode));
333 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
335 ir_mode *mode = get_ia32_ls_mode(node);
336 assert(mode != NULL);
337 be_emit_char(env, get_xmm_mode_suffix(mode));
340 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
342 if(get_mode_size_bits(mode) == 32)
344 if(mode_is_signed(mode)) {
345 be_emit_char(env, 's');
347 be_emit_char(env, 'z');
352 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
354 switch (be_gas_flavour) {
355 case GAS_FLAVOUR_NORMAL:
356 be_emit_cstring(env, "\t.type\t");
357 be_emit_string(env, name);
358 be_emit_cstring(env, ", @function\n");
359 be_emit_write_line(env);
361 case GAS_FLAVOUR_MINGW:
362 be_emit_cstring(env, "\t.def\t");
363 be_emit_string(env, name);
364 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
365 be_emit_write_line(env);
373 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
375 switch (be_gas_flavour) {
376 case GAS_FLAVOUR_NORMAL:
377 be_emit_cstring(env, "\t.size\t");
378 be_emit_string(env, name);
379 be_emit_cstring(env, ", .-");
380 be_emit_string(env, name);
381 be_emit_char(env, '\n');
382 be_emit_write_line(env);
392 * Emits registers and/or address mode of a binary operation.
394 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
395 switch(get_ia32_op_type(node)) {
397 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
398 ia32_emit_immediate(env, node);
399 be_emit_cstring(env, ", ");
400 ia32_emit_source_register(env, node, 2);
402 const arch_register_t *in1 = get_in_reg(env, node, 2);
403 const arch_register_t *in2 = get_in_reg(env, node, 3);
404 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
405 const arch_register_t *in;
408 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
409 out = out ? out : in1;
410 in_name = arch_register_get_name(in);
412 if (is_ia32_emit_cl(node)) {
413 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
417 be_emit_char(env, '%');
418 be_emit_string(env, in_name);
419 be_emit_cstring(env, ", %");
420 be_emit_string(env, arch_register_get_name(out));
424 ia32_emit_am(env, node);
425 be_emit_cstring(env, ", ");
426 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
427 assert(!produces_result(node) && "Source AM with Const must not produce result");
428 ia32_emit_immediate(env, node);
429 } else if (produces_result(node)) {
430 ia32_emit_dest_register(env, node, 0);
432 ia32_emit_source_register(env, node, 2);
436 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
437 ia32_emit_immediate(env, node);
438 be_emit_cstring(env, ", ");
439 ia32_emit_am(env, node);
441 const arch_register_t *in1 = get_in_reg(env, node,
442 get_irn_arity(node) == 5 ? 3 : 2);
443 ir_mode *mode = get_ia32_ls_mode(node);
446 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
448 if (is_ia32_emit_cl(node)) {
449 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
453 be_emit_char(env, '%');
454 be_emit_string(env, in_name);
455 be_emit_cstring(env, ", ");
456 ia32_emit_am(env, node);
460 assert(0 && "unsupported op type");
465 * Emits registers and/or address mode of a binary operation.
467 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
468 switch(get_ia32_op_type(node)) {
470 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
471 // should not happen...
474 ia32_attr_t *attr = get_ia32_attr(node);
475 const arch_register_t *in1 = attr->x87[0];
476 const arch_register_t *in2 = attr->x87[1];
477 const arch_register_t *out = attr->x87[2];
478 const arch_register_t *in;
480 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
481 out = out ? out : in1;
483 be_emit_char(env, '%');
484 be_emit_string(env, arch_register_get_name(in));
485 be_emit_cstring(env, ", %");
486 be_emit_string(env, arch_register_get_name(out));
491 ia32_emit_am(env, node);
494 assert(0 && "unsupported op type");
499 * Emits registers and/or address mode of a unary operation.
501 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
502 switch(get_ia32_op_type(node)) {
504 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
505 ia32_emit_immediate(env, node);
507 if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
508 ia32_emit_source_register(env, node, 3);
509 } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
510 ia32_emit_source_register(env, node, 4);
511 } else if(is_ia32_Push(node)) {
512 ia32_emit_source_register(env, node, 2);
513 } else if(is_ia32_Pop(node)) {
514 ia32_emit_dest_register(env, node, 1);
516 ia32_emit_dest_register(env, node, 0);
522 ia32_emit_am(env, node);
525 assert(0 && "unsupported op type");
530 * Emits address mode.
532 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
533 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
534 ir_entity *ent = get_ia32_am_sc(node);
535 int offs = get_ia32_am_offs_int(node);
537 /* just to be sure... */
538 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
544 mark_entity_visited(ent);
545 id = get_entity_ld_ident(ent);
546 if (is_ia32_am_sc_sign(node))
547 be_emit_char(env, '-');
548 be_emit_ident(env, id);
550 if(get_entity_owner(ent) == get_tls_type()) {
551 if (get_entity_visibility(ent) == visibility_external_allocated) {
552 be_emit_cstring(env, "@INDNTPOFF");
554 be_emit_cstring(env, "@NTPOFF");
561 be_emit_irprintf(env->emit, "%+d", offs);
563 be_emit_irprintf(env->emit, "%d", offs);
567 if (am_flav & (ia32_B | ia32_I)) {
568 be_emit_char(env, '(');
571 if (am_flav & ia32_B) {
572 ia32_emit_source_register(env, node, 0);
575 /* emit index + scale */
576 if (am_flav & ia32_I) {
577 be_emit_char(env, ',');
578 ia32_emit_source_register(env, node, 1);
580 if (am_flav & ia32_S) {
581 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
584 be_emit_char(env, ')');
588 /*************************************************
591 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
592 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
593 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
594 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
596 *************************************************/
599 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
602 * coding of conditions
604 struct cmp2conditon_t {
610 * positive conditions for signed compares
613 const struct cmp2conditon_t cmp2condition_s[] = {
614 { NULL, pn_Cmp_False }, /* always false */
615 { "e", pn_Cmp_Eq }, /* == */
616 { "l", pn_Cmp_Lt }, /* < */
617 { "le", pn_Cmp_Le }, /* <= */
618 { "g", pn_Cmp_Gt }, /* > */
619 { "ge", pn_Cmp_Ge }, /* >= */
620 { "ne", pn_Cmp_Lg }, /* != */
621 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
622 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
623 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
624 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
625 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
626 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
627 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
628 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
629 { NULL, pn_Cmp_True }, /* always true */
633 * positive conditions for unsigned compares
636 const struct cmp2conditon_t cmp2condition_u[] = {
637 { NULL, pn_Cmp_False }, /* always false */
638 { "e", pn_Cmp_Eq }, /* == */
639 { "b", pn_Cmp_Lt }, /* < */
640 { "be", pn_Cmp_Le }, /* <= */
641 { "a", pn_Cmp_Gt }, /* > */
642 { "ae", pn_Cmp_Ge }, /* >= */
643 { "ne", pn_Cmp_Lg }, /* != */
644 { NULL, pn_Cmp_True }, /* always true */
648 * returns the condition code
651 const char *get_cmp_suffix(int cmp_code)
653 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
654 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
656 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
657 return cmp2condition_u[cmp_code & 7].name;
659 return cmp2condition_s[cmp_code & 15].name;
663 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
665 be_emit_string(env, get_cmp_suffix(pnc));
670 * Returns the target block for a control flow node.
673 ir_node *get_cfop_target_block(const ir_node *irn) {
674 return get_irn_link(irn);
678 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
680 be_emit_cstring(env, BLOCK_PREFIX);
681 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
685 * Returns the target label for a control flow node.
688 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
689 ir_node *block = get_cfop_target_block(node);
691 ia32_emit_block_name(env, block);
694 /** Return the next block in Block schedule */
695 static ir_node *next_blk_sched(const ir_node *block) {
696 return get_irn_link(block);
700 * Returns the Proj with projection number proj and NOT mode_M
703 ir_node *get_proj(const ir_node *node, long proj) {
704 const ir_edge_t *edge;
707 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
709 foreach_out_edge(node, edge) {
710 src = get_edge_src_irn(edge);
712 assert(is_Proj(src) && "Proj expected");
713 if (get_irn_mode(src) == mode_M)
716 if (get_Proj_proj(src) == proj)
723 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
726 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
728 const ir_node *proj_true;
729 const ir_node *proj_false;
730 const ir_node *block;
731 const ir_node *next_block;
734 /* get both Proj's */
735 proj_true = get_proj(node, pn_Cond_true);
736 assert(proj_true && "CondJmp without true Proj");
738 proj_false = get_proj(node, pn_Cond_false);
739 assert(proj_false && "CondJmp without false Proj");
741 /* for now, the code works for scheduled and non-schedules blocks */
742 block = get_nodes_block(node);
744 /* we have a block schedule */
745 next_block = next_blk_sched(block);
747 if (get_cfop_target_block(proj_true) == next_block) {
748 /* exchange both proj's so the second one can be omitted */
749 const ir_node *t = proj_true;
751 proj_true = proj_false;
754 pnc = get_negated_pnc(pnc, mode);
757 /* in case of unordered compare, check for parity */
758 if (pnc & pn_Cmp_Uo) {
759 be_emit_cstring(env, "\tjp ");
760 ia32_emit_cfop_target(env, proj_true);
761 be_emit_finish_line_gas(env, proj_true);
764 be_emit_cstring(env, "\tj");
765 ia32_emit_cmp_suffix(env, pnc);
766 be_emit_char(env, ' ');
767 ia32_emit_cfop_target(env, proj_true);
768 be_emit_finish_line_gas(env, proj_true);
770 /* the second Proj might be a fallthrough */
771 if (get_cfop_target_block(proj_false) != next_block) {
772 be_emit_cstring(env, "\tjmp ");
773 ia32_emit_cfop_target(env, proj_false);
774 be_emit_finish_line_gas(env, proj_false);
776 be_emit_cstring(env, "\t/* fallthrough to ");
777 ia32_emit_cfop_target(env, proj_false);
778 be_emit_cstring(env, " */");
779 be_emit_finish_line_gas(env, proj_false);
784 * Emits code for conditional jump.
787 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
788 be_emit_cstring(env, "\tcmp ");
789 ia32_emit_binop(env, node);
790 be_emit_finish_line_gas(env, node);
792 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
796 * Emits code for conditional jump with two variables.
799 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
800 CondJmp_emitter(env, node);
804 * Emits code for conditional test and jump.
807 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
808 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
809 be_emit_cstring(env, "\ttest ");
810 ia32_emit_immediate(env, node);
811 be_emit_cstring(env, ", ");
812 ia32_emit_source_register(env, node, 0);
813 be_emit_finish_line_gas(env, node);
815 be_emit_cstring(env, "\ttest ");
816 ia32_emit_source_register(env, node, 1);
817 be_emit_cstring(env, ", ");
818 ia32_emit_source_register(env, node, 0);
819 be_emit_finish_line_gas(env, node);
821 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
825 * Emits code for conditional test and jump with two variables.
828 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
829 TestJmp_emitter(env, node);
833 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
834 be_emit_cstring(env, "/* omitted redundant test */");
835 be_emit_finish_line_gas(env, node);
837 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
841 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
842 be_emit_cstring(env, "/* omitted redundant test/cmp */");
843 be_emit_finish_line_gas(env, node);
845 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
849 * Emits code for conditional SSE floating point jump with two variables.
852 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
853 be_emit_cstring(env, "\tucomi");
854 ia32_emit_xmm_mode_suffix(env, node);
855 be_emit_char(env, ' ');
856 ia32_emit_binop(env, node);
857 be_emit_finish_line_gas(env, node);
859 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
863 * Emits code for conditional x87 floating point jump with two variables.
866 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
867 ia32_attr_t *attr = get_ia32_attr(node);
868 const char *reg = attr->x87[1]->name;
869 long pnc = get_ia32_pncode(node);
871 switch (get_ia32_irn_opcode(node)) {
872 case iro_ia32_fcomrJmp:
873 pnc = get_inversed_pnc(pnc);
874 reg = attr->x87[0]->name;
875 case iro_ia32_fcomJmp:
877 be_emit_cstring(env, "\tfucom ");
879 case iro_ia32_fcomrpJmp:
880 pnc = get_inversed_pnc(pnc);
881 reg = attr->x87[0]->name;
882 case iro_ia32_fcompJmp:
883 be_emit_cstring(env, "\tfucomp ");
885 case iro_ia32_fcomrppJmp:
886 pnc = get_inversed_pnc(pnc);
887 case iro_ia32_fcomppJmp:
888 be_emit_cstring(env, "\tfucompp ");
894 be_emit_char(env, '%');
895 be_emit_string(env, reg);
897 be_emit_finish_line_gas(env, node);
899 be_emit_cstring(env, "\tfnstsw %ax");
900 be_emit_finish_line_gas(env, node);
901 be_emit_cstring(env, "\tsahf");
902 be_emit_finish_line_gas(env, node);
904 finish_CondJmp(env, node, mode_E, pnc);
908 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
909 long pnc = get_ia32_pncode(node);
910 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
911 int idx_left = 2 - is_PsiCondCMov;
912 int idx_right = 3 - is_PsiCondCMov;
913 const arch_register_t *in1, *in2, *out;
915 out = arch_get_irn_register(env->arch_env, node);
916 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
917 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
919 /* we have to emit the cmp first, because the destination register */
920 /* could be one of the compare registers */
921 if (is_ia32_CmpCMov(node)) {
922 be_emit_cstring(env, "\tcmp ");
923 ia32_emit_source_register(env, node, 1);
924 be_emit_cstring(env, ", ");
925 ia32_emit_source_register(env, node, 0);
926 } else if (is_ia32_xCmpCMov(node)) {
927 be_emit_cstring(env, "\tucomis");
928 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
929 be_emit_char(env, ' ');
930 ia32_emit_source_register(env, node, 1);
931 be_emit_cstring(env, ", ");
932 ia32_emit_source_register(env, node, 0);
933 } else if (is_PsiCondCMov) {
934 /* omit compare because flags are already set by And/Or */
935 be_emit_cstring(env, "\ttest ");
936 ia32_emit_source_register(env, node, 0);
937 be_emit_cstring(env, ", ");
938 ia32_emit_source_register(env, node, 0);
940 assert(0 && "unsupported CMov");
942 be_emit_finish_line_gas(env, node);
944 if (REGS_ARE_EQUAL(out, in2)) {
945 /* best case: default in == out -> do nothing */
946 } else if (REGS_ARE_EQUAL(out, in1)) {
947 ir_node *n = (ir_node*) node;
948 /* true in == out -> need complement compare and exchange true and default in */
949 ir_node *t = get_irn_n(n, idx_left);
950 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
951 set_irn_n(n, idx_right, t);
953 pnc = get_negated_pnc(pnc, get_irn_mode(node));
955 /* out is different from in: need copy default -> out */
956 if (is_PsiCondCMov) {
957 be_emit_cstring(env, "\tmovl ");
958 ia32_emit_dest_register(env, node, 2);
959 be_emit_cstring(env, ", ");
960 ia32_emit_dest_register(env, node, 0);
962 be_emit_cstring(env, "\tmovl ");
963 ia32_emit_source_register(env, node, 3);
964 be_emit_cstring(env, ", ");
965 ia32_emit_dest_register(env, node, 0);
967 be_emit_finish_line_gas(env, node);
970 if (is_PsiCondCMov) {
971 be_emit_cstring(env, "\tcmov");
972 ia32_emit_cmp_suffix(env, pnc);
973 be_emit_cstring(env, "l ");
974 ia32_emit_source_register(env, node, 1);
975 be_emit_cstring(env, ", ");
976 ia32_emit_dest_register(env, node, 0);
978 be_emit_cstring(env, "\tcmov");
979 ia32_emit_cmp_suffix(env, pnc);
980 be_emit_cstring(env, "l ");
981 ia32_emit_source_register(env, node, 2);
982 be_emit_cstring(env, ", ");
983 ia32_emit_dest_register(env, node, 0);
985 be_emit_finish_line_gas(env, node);
989 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
990 CMov_emitter(env, node);
994 void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
995 CMov_emitter(env, node);
999 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
1000 CMov_emitter(env, node);
1004 void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
1005 int pnc = get_ia32_pncode(node);
1006 const char *reg8bit;
1007 const arch_register_t *out;
1009 out = arch_get_irn_register(env->arch_env, node);
1010 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1012 if (is_ia32_CmpSet(node)) {
1013 be_emit_cstring(env, "\tcmp ");
1014 ia32_emit_binop(env, node);
1015 } else if (is_ia32_xCmpSet(node)) {
1016 be_emit_cstring(env, "\tucomis");
1017 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1018 be_emit_char(env, ' ');
1019 ia32_emit_binop(env, node);
1020 } else if (is_ia32_PsiCondSet(node)) {
1021 be_emit_cstring(env, "\tcmp $0, ");
1022 ia32_emit_source_register(env, node, 0);
1024 assert(0 && "unsupported Set");
1026 be_emit_finish_line_gas(env, node);
1028 /* use mov to clear target because it doesn't affect the eflags */
1029 be_emit_cstring(env, "\tmovl $0, %");
1030 be_emit_string(env, arch_register_get_name(out));
1031 be_emit_finish_line_gas(env, node);
1033 be_emit_cstring(env, "\tset");
1034 ia32_emit_cmp_suffix(env, pnc);
1035 be_emit_cstring(env, " %");
1036 be_emit_string(env, reg8bit);
1037 be_emit_finish_line_gas(env, node);
1041 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1042 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1046 void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
1047 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
1051 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1052 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1056 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1058 long pnc = get_ia32_pncode(node);
1059 long unord = pnc & pn_Cmp_Uo;
1061 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1064 case pn_Cmp_Leg: /* odered */
1067 case pn_Cmp_Uo: /* unordered */
1071 case pn_Cmp_Eq: /* == */
1075 case pn_Cmp_Lt: /* < */
1079 case pn_Cmp_Le: /* <= */
1083 case pn_Cmp_Gt: /* > */
1087 case pn_Cmp_Ge: /* >= */
1091 case pn_Cmp_Lg: /* != */
1096 assert(sse_pnc >= 0 && "unsupported compare");
1098 if (unord && sse_pnc != 3) {
1100 We need a separate compare against unordered.
1101 Quick and Dirty solution:
1102 - get some memory on stack
1106 - and result and stored result
1109 be_emit_cstring(env, "\tsubl $8, %esp");
1110 be_emit_finish_line_gas(env, node);
1112 be_emit_cstring(env, "\tcmpsd $3, ");
1113 ia32_emit_binop(env, node);
1114 be_emit_finish_line_gas(env, node);
1116 be_emit_cstring(env, "\tmovsd ");
1117 ia32_emit_dest_register(env, node, 0);
1118 be_emit_cstring(env, ", (%esp)");
1119 be_emit_finish_line_gas(env, node);
1122 be_emit_cstring(env, "\tcmpsd ");
1123 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1124 ia32_emit_binop(env, node);
1125 be_emit_finish_line_gas(env, node);
1127 if (unord && sse_pnc != 3) {
1128 be_emit_cstring(env, "\tandpd (%esp), ");
1129 ia32_emit_dest_register(env, node, 0);
1130 be_emit_finish_line_gas(env, node);
1132 be_emit_cstring(env, "\taddl $8, %esp");
1133 be_emit_finish_line_gas(env, node);
1137 /*********************************************************
1140 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1141 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1142 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1143 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1146 *********************************************************/
1148 /* jump table entry (target and corresponding number) */
1149 typedef struct _branch_t {
1154 /* jump table for switch generation */
1155 typedef struct _jmp_tbl_t {
1156 ir_node *defProj; /**< default target */
1157 int min_value; /**< smallest switch case */
1158 int max_value; /**< largest switch case */
1159 int num_branches; /**< number of jumps */
1160 char *label; /**< label of the jump table */
1161 branch_t *branches; /**< jump array */
1165 * Compare two variables of type branch_t. Used to sort all switch cases
1168 int ia32_cmp_branch_t(const void *a, const void *b) {
1169 branch_t *b1 = (branch_t *)a;
1170 branch_t *b2 = (branch_t *)b;
1172 if (b1->value <= b2->value)
1179 * Emits code for a SwitchJmp (creates a jump table if
1180 * possible otherwise a cmp-jmp cascade). Port from
1184 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1185 unsigned long interval;
1190 const ir_edge_t *edge;
1192 /* fill the table structure */
1193 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1194 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1196 tbl.num_branches = get_irn_n_edges(node);
1197 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1198 tbl.min_value = INT_MAX;
1199 tbl.max_value = INT_MIN;
1202 /* go over all proj's and collect them */
1203 foreach_out_edge(node, edge) {
1204 proj = get_edge_src_irn(edge);
1205 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1207 pnc = get_Proj_proj(proj);
1209 /* create branch entry */
1210 tbl.branches[i].target = proj;
1211 tbl.branches[i].value = pnc;
1213 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1214 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1216 /* check for default proj */
1217 if (pnc == get_ia32_pncode(node)) {
1218 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1225 /* sort the branches by their number */
1226 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1228 /* two-complement's magic make this work without overflow */
1229 interval = tbl.max_value - tbl.min_value;
1231 /* emit the table */
1232 be_emit_cstring(env, "\tcmpl $");
1233 be_emit_irprintf(env->emit, "%u, ", interval);
1234 ia32_emit_source_register(env, node, 0);
1235 be_emit_finish_line_gas(env, node);
1237 be_emit_cstring(env, "\tja ");
1238 ia32_emit_cfop_target(env, tbl.defProj);
1239 be_emit_finish_line_gas(env, node);
1241 if (tbl.num_branches > 1) {
1243 be_emit_cstring(env, "\tjmp *");
1244 be_emit_string(env, tbl.label);
1245 be_emit_cstring(env, "(,");
1246 ia32_emit_source_register(env, node, 0);
1247 be_emit_cstring(env, ",4)");
1248 be_emit_finish_line_gas(env, node);
1250 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1251 be_emit_cstring(env, "\t.align 4\n");
1252 be_emit_write_line(env);
1254 be_emit_string(env, tbl.label);
1255 be_emit_cstring(env, ":\n");
1256 be_emit_write_line(env);
1258 be_emit_cstring(env, ".long ");
1259 ia32_emit_cfop_target(env, tbl.branches[0].target);
1260 be_emit_finish_line_gas(env, NULL);
1262 last_value = tbl.branches[0].value;
1263 for (i = 1; i < tbl.num_branches; ++i) {
1264 while (++last_value < tbl.branches[i].value) {
1265 be_emit_cstring(env, ".long ");
1266 ia32_emit_cfop_target(env, tbl.defProj);
1267 be_emit_finish_line_gas(env, NULL);
1269 be_emit_cstring(env, ".long ");
1270 ia32_emit_cfop_target(env, tbl.branches[i].target);
1271 be_emit_finish_line_gas(env, NULL);
1273 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1275 /* one jump is enough */
1276 be_emit_cstring(env, "\tjmp ");
1277 ia32_emit_cfop_target(env, tbl.branches[0].target);
1278 be_emit_finish_line_gas(env, node);
1288 * Emits code for a unconditional jump.
1291 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1292 ir_node *block, *next_block;
1294 /* for now, the code works for scheduled and non-schedules blocks */
1295 block = get_nodes_block(node);
1297 /* we have a block schedule */
1298 next_block = next_blk_sched(block);
1299 if (get_cfop_target_block(node) != next_block) {
1300 be_emit_cstring(env, "\tjmp ");
1301 ia32_emit_cfop_target(env, node);
1303 be_emit_cstring(env, "\t/* fallthrough to ");
1304 ia32_emit_cfop_target(env, node);
1305 be_emit_cstring(env, " */");
1307 be_emit_finish_line_gas(env, node);
1310 /**********************************
1313 * | | ___ _ __ _ _| |_) |
1314 * | | / _ \| '_ \| | | | _ <
1315 * | |___| (_) | |_) | |_| | |_) |
1316 * \_____\___/| .__/ \__, |____/
1319 **********************************/
1322 * Emit movsb/w instructions to make mov count divideable by 4
1325 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1326 be_emit_cstring(env, "\tcld");
1327 be_emit_finish_line_gas(env, NULL);
1331 be_emit_cstring(env, "\tmovsb");
1332 be_emit_finish_line_gas(env, NULL);
1335 be_emit_cstring(env, "\tmovsw");
1336 be_emit_finish_line_gas(env, NULL);
1339 be_emit_cstring(env, "\tmovsb");
1340 be_emit_finish_line_gas(env, NULL);
1341 be_emit_cstring(env, "\tmovsw");
1342 be_emit_finish_line_gas(env, NULL);
1348 * Emit rep movsd instruction for memcopy.
1351 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1352 tarval *tv = get_ia32_Immop_tarval(node);
1353 int rem = get_tarval_long(tv);
1355 emit_CopyB_prolog(env, rem);
1357 be_emit_cstring(env, "\trep movsd");
1358 be_emit_finish_line_gas(env, node);
1362 * Emits unrolled memcopy.
1365 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1366 tarval *tv = get_ia32_Immop_tarval(node);
1367 int size = get_tarval_long(tv);
1369 emit_CopyB_prolog(env, size & 0x3);
1373 be_emit_cstring(env, "\tmovsd");
1374 be_emit_finish_line_gas(env, NULL);
1380 /***************************
1384 * | | / _ \| '_ \ \ / /
1385 * | |___| (_) | | | \ V /
1386 * \_____\___/|_| |_|\_/
1388 ***************************/
1391 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1394 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1395 ir_mode *ls_mode = get_ia32_ls_mode(node);
1396 int ls_bits = get_mode_size_bits(ls_mode);
1398 be_emit_cstring(env, "\tcvt");
1400 if(is_ia32_Conv_I2FP(node)) {
1402 be_emit_cstring(env, "si2ss");
1404 be_emit_cstring(env, "si2sd");
1406 } else if(is_ia32_Conv_FP2I(node)) {
1408 be_emit_cstring(env, "ss2si");
1410 be_emit_cstring(env, "sd2si");
1413 assert(is_ia32_Conv_FP2FP(node));
1415 be_emit_cstring(env, "sd2ss");
1417 be_emit_cstring(env, "ss2sd");
1420 be_emit_char(env, ' ');
1422 switch(get_ia32_op_type(node)) {
1424 ia32_emit_source_register(env, node, 2);
1425 be_emit_cstring(env, ", ");
1426 ia32_emit_dest_register(env, node, 0);
1428 case ia32_AddrModeS:
1429 ia32_emit_dest_register(env, node, 0);
1430 be_emit_cstring(env, ", ");
1431 ia32_emit_am(env, node);
1434 assert(0 && "unsupported op type for Conv");
1436 be_emit_finish_line_gas(env, node);
1440 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1441 emit_ia32_Conv_with_FP(env, node);
1445 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1446 emit_ia32_Conv_with_FP(env, node);
1450 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1451 emit_ia32_Conv_with_FP(env, node);
1455 * Emits code for an Int conversion.
1458 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1459 const char *sign_suffix;
1460 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1461 int smaller_bits = get_mode_size_bits(smaller_mode);
1463 const arch_register_t *in_reg, *out_reg;
1465 assert(!mode_is_float(smaller_mode));
1466 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1468 signed_mode = mode_is_signed(smaller_mode);
1469 if(smaller_bits == 32) {
1470 // this should not happen as it's no convert
1474 sign_suffix = signed_mode ? "s" : "z";
1477 switch(get_ia32_op_type(node)) {
1479 in_reg = get_in_reg(env, node, 2);
1480 out_reg = get_out_reg(env, node, 0);
1482 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1483 REGS_ARE_EQUAL(out_reg, in_reg) &&
1486 /* argument and result are both in EAX and */
1487 /* signedness is ok: -> use converts */
1488 if (smaller_bits == 8) {
1489 be_emit_cstring(env, "\tcbtw");
1490 } else if (smaller_bits == 16) {
1491 be_emit_cstring(env, "\tcwtl");
1495 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1496 /* argument and result are in the same register */
1497 /* and signedness is ok: -> use and with mask */
1498 int mask = (1 << smaller_bits) - 1;
1499 be_emit_cstring(env, "\tandl $0x");
1500 be_emit_irprintf(env->emit, "%x, ", mask);
1501 ia32_emit_dest_register(env, node, 0);
1503 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1505 be_emit_cstring(env, "\tmov");
1506 be_emit_string(env, sign_suffix);
1507 ia32_emit_mode_suffix_mode(env, smaller_mode);
1508 be_emit_cstring(env, "l %");
1509 be_emit_string(env, sreg);
1510 be_emit_cstring(env, ", ");
1511 ia32_emit_dest_register(env, node, 0);
1514 case ia32_AddrModeS: {
1515 be_emit_cstring(env, "\tmov");
1516 be_emit_string(env, sign_suffix);
1517 ia32_emit_mode_suffix_mode(env, smaller_mode);
1518 be_emit_cstring(env, "l %");
1519 ia32_emit_am(env, node);
1520 be_emit_cstring(env, ", ");
1521 ia32_emit_dest_register(env, node, 0);
1525 assert(0 && "unsupported op type for Conv");
1527 be_emit_finish_line_gas(env, node);
1531 * Emits code for an 8Bit Int conversion.
1533 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1534 emit_ia32_Conv_I2I(env, node);
1538 /*******************************************
1541 * | |__ ___ _ __ ___ __| | ___ ___
1542 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1543 * | |_) | __/ | | | (_) | (_| | __/\__ \
1544 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1546 *******************************************/
1549 * Emits a backend call
1552 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1553 ir_entity *ent = be_Call_get_entity(node);
1555 be_emit_cstring(env, "\tcall ");
1557 mark_entity_visited(ent);
1558 be_emit_string(env, get_entity_ld_name(ent));
1560 be_emit_char(env, '*');
1561 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1563 be_emit_finish_line_gas(env, node);
1567 * Emits code to increase stack pointer.
1570 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1571 int offs = be_get_IncSP_offset(node);
1577 be_emit_cstring(env, "\tsubl $");
1578 be_emit_irprintf(env->emit, "%u, ", offs);
1579 ia32_emit_source_register(env, node, 0);
1581 be_emit_cstring(env, "\taddl $");
1582 be_emit_irprintf(env->emit, "%u, ", -offs);
1583 ia32_emit_source_register(env, node, 0);
1585 be_emit_finish_line_gas(env, node);
1589 * Emits code to set stack pointer.
1592 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1593 be_emit_cstring(env, "\tmovl ");
1594 ia32_emit_source_register(env, node, 2);
1595 be_emit_cstring(env, ", ");
1596 ia32_emit_dest_register(env, node, 0);
1597 be_emit_finish_line_gas(env, node);
1601 * Emits code for Copy/CopyKeep.
1604 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1606 const arch_env_t *aenv = env->arch_env;
1609 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1610 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1613 mode = get_irn_mode(node);
1614 if (mode == mode_E) {
1615 be_emit_cstring(env, "\tmovsd ");
1616 ia32_emit_source_register(env, node, 0);
1617 be_emit_cstring(env, ", ");
1618 ia32_emit_dest_register(env, node, 0);
1620 be_emit_cstring(env, "\tmovl ");
1621 ia32_emit_source_register(env, node, 0);
1622 be_emit_cstring(env, ", ");
1623 ia32_emit_dest_register(env, node, 0);
1625 be_emit_finish_line_gas(env, node);
1629 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1630 Copy_emitter(env, node, be_get_Copy_op(node));
1634 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1635 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1639 * Emits code for exchange.
1642 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1643 const arch_register_t *in1, *in2;
1644 const arch_register_class_t *cls1, *cls2;
1646 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1647 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1649 cls1 = arch_register_get_class(in1);
1650 cls2 = arch_register_get_class(in2);
1652 assert(cls1 == cls2 && "Register class mismatch at Perm");
1654 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1655 be_emit_cstring(env, "\txchg ");
1656 ia32_emit_source_register(env, node, 1);
1657 be_emit_cstring(env, ", ");
1658 ia32_emit_source_register(env, node, 0);
1659 be_emit_finish_line_gas(env, node);
1660 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1661 be_emit_cstring(env, "\txorpd ");
1662 ia32_emit_source_register(env, node, 1);
1663 be_emit_cstring(env, ", ");
1664 ia32_emit_source_register(env, node, 0);
1665 be_emit_finish_line_gas(env, NULL);
1667 be_emit_cstring(env, "\txorpd ");
1668 ia32_emit_source_register(env, node, 0);
1669 be_emit_cstring(env, ", ");
1670 ia32_emit_source_register(env, node, 1);
1671 be_emit_finish_line_gas(env, NULL);
1673 be_emit_cstring(env, "\txorpd ");
1674 ia32_emit_source_register(env, node, 1);
1675 be_emit_cstring(env, ", ");
1676 ia32_emit_source_register(env, node, 0);
1677 be_emit_finish_line_gas(env, node);
1678 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1680 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1686 * Emits code for Constant loading.
1689 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1690 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1692 if (imm_tp == ia32_ImmSymConst) {
1693 be_emit_cstring(env, "\tmovl ");
1694 ia32_emit_immediate(env, node);
1695 be_emit_cstring(env, ", ");
1696 ia32_emit_dest_register(env, node, 0);
1698 tarval *tv = get_ia32_Immop_tarval(node);
1699 assert(get_irn_mode(node) == mode_Iu);
1700 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1701 if (tarval_is_null(tv)) {
1702 if (env->isa->opt_arch == arch_pentium_4) {
1703 /* P4 prefers sub r, r, others xor r, r */
1704 be_emit_cstring(env, "\tsubl ");
1706 be_emit_cstring(env, "\txorl ");
1708 ia32_emit_dest_register(env, node, 0);
1709 be_emit_cstring(env, ", ");
1710 ia32_emit_dest_register(env, node, 0);
1712 be_emit_cstring(env, "\tmovl ");
1713 ia32_emit_immediate(env, node);
1714 be_emit_cstring(env, ", ");
1715 ia32_emit_dest_register(env, node, 0);
1718 be_emit_finish_line_gas(env, node);
1722 * Emits code to load the TLS base
1725 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1726 be_emit_cstring(env, "\tmovl %gs:0, ");
1727 ia32_emit_dest_register(env, node, 0);
1728 be_emit_finish_line_gas(env, node);
1732 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1733 be_emit_cstring(env, "\tret");
1734 be_emit_finish_line_gas(env, node);
1738 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1742 /***********************************************************************************
1745 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1746 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1747 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1748 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1750 ***********************************************************************************/
1753 * Enters the emitter functions for handled nodes into the generic
1754 * pointer of an opcode.
1757 void ia32_register_emitters(void) {
1759 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1760 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1761 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1762 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1763 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1764 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1766 /* first clear the generic function pointer for all ops */
1767 clear_irp_opcodes_generic_func();
1769 /* register all emitter functions defined in spec */
1770 ia32_register_spec_emitters();
1772 /* other ia32 emitter functions */
1778 IA32_EMIT(PsiCondCMov);
1780 IA32_EMIT(PsiCondSet);
1781 IA32_EMIT(SwitchJmp);
1784 IA32_EMIT(Conv_I2FP);
1785 IA32_EMIT(Conv_FP2I);
1786 IA32_EMIT(Conv_FP2FP);
1787 IA32_EMIT(Conv_I2I);
1788 IA32_EMIT(Conv_I2I8Bit);
1793 IA32_EMIT(xCmpCMov);
1794 IA32_EMIT(xCondJmp);
1795 IA32_EMIT2(fcomJmp, x87CondJmp);
1796 IA32_EMIT2(fcompJmp, x87CondJmp);
1797 IA32_EMIT2(fcomppJmp, x87CondJmp);
1798 IA32_EMIT2(fcomrJmp, x87CondJmp);
1799 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1800 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1802 /* benode emitter */
1828 static const char *last_name = NULL;
1829 static unsigned last_line = -1;
1830 static unsigned num = -1;
1833 * Emit the debug support for node node.
1836 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1837 dbg_info *db = get_irn_dbg_info(node);
1839 const char *fname = be_retrieve_dbg_info(db, &lineno);
1841 if (! env->cg->birg->main_env->options->stabs_debug_support)
1845 if (last_name != fname) {
1847 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1850 if (last_line != lineno) {
1853 snprintf(name, sizeof(name), ".LM%u", ++num);
1855 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1856 be_emit_string(env, name);
1857 be_emit_cstring(env, ":\n");
1858 be_emit_write_line(env);
1863 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1866 * Emits code for a node.
1869 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1870 ir_op *op = get_irn_op(node);
1872 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
1874 if (op->ops.generic) {
1875 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1876 ia32_emit_dbg(env, node);
1877 (*func) (env, node);
1879 emit_Nothing(env, node);
1880 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1885 * Emits gas alignment directives
1888 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1889 be_emit_cstring(env, "\t.p2align ");
1890 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
1891 be_emit_write_line(env);
1895 * Emits gas alignment directives for Functions depended on cpu architecture.
1898 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1900 unsigned maximum_skip;
1915 maximum_skip = (1 << align) - 1;
1916 ia32_emit_alignment(env, align, maximum_skip);
1920 * Emits gas alignment directives for Labels depended on cpu architecture.
1923 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1924 unsigned align; unsigned maximum_skip;
1939 maximum_skip = (1 << align) - 1;
1940 ia32_emit_alignment(env, align, maximum_skip);
1944 * Test wether a block should be aligned.
1945 * For cpus in the P4/Athlon class it is usefull to align jump labels to
1946 * 16 bytes. However we should only do that if the alignment nops before the
1947 * label aren't executed more often than we have jumps to the label.
1950 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
1951 static const double DELTA = .0001;
1952 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1954 double prev_freq = 0; /**< execfreq of the fallthrough block */
1955 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
1956 cpu_support cpu = env->isa->opt_arch;
1959 if(exec_freq == NULL)
1961 if(cpu == arch_i386 || cpu == arch_i486)
1964 block_freq = get_block_execfreq(exec_freq, block);
1965 if(block_freq < DELTA)
1968 n_cfgpreds = get_Block_n_cfgpreds(block);
1969 for(i = 0; i < n_cfgpreds; ++i) {
1970 ir_node *pred = get_Block_cfgpred_block(block, i);
1971 double pred_freq = get_block_execfreq(exec_freq, pred);
1974 prev_freq += pred_freq;
1976 jmp_freq += pred_freq;
1980 if(prev_freq < DELTA && !(jmp_freq < DELTA))
1983 jmp_freq /= prev_freq;
1987 case arch_athlon_64:
1989 return jmp_freq > 3;
1991 return jmp_freq > 2;
1996 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
2001 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2004 n_cfgpreds = get_Block_n_cfgpreds(block);
2005 if (n_cfgpreds == 0) {
2007 } else if (n_cfgpreds == 1) {
2008 ir_node *pred = get_Block_cfgpred(block, 0);
2009 ir_node *pred_block = get_nodes_block(pred);
2011 /* we don't need labels for fallthrough blocks, however switch-jmps
2012 * are no fallthoughs */
2013 if(pred_block == prev &&
2014 !(is_Proj(pred) && is_ia32_SwitchJmp(get_Proj_pred(pred)))) {
2023 if (should_align_block(env, block, prev)) {
2025 ia32_emit_align_label(env, env->isa->opt_arch);
2029 ia32_emit_block_name(env, block);
2030 be_emit_char(env, ':');
2032 be_emit_pad_comment(env);
2033 be_emit_cstring(env, " /* preds:");
2035 /* emit list of pred blocks in comment */
2036 arity = get_irn_arity(block);
2037 for (i = 0; i < arity; ++i) {
2038 ir_node *predblock = get_Block_cfgpred_block(block, i);
2039 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2042 if (exec_freq != NULL) {
2043 be_emit_irprintf(env->emit, " freq: %f",
2044 get_block_execfreq(exec_freq, block));
2046 be_emit_cstring(env, " */\n");
2048 be_emit_cstring(env, "\t/* ");
2049 ia32_emit_block_name(env, block);
2050 be_emit_cstring(env, ": */\n");
2052 be_emit_write_line(env);
2056 * Walks over the nodes in a block connected by scheduling edges
2057 * and emits code for each node.
2060 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2062 const ir_node *node;
2064 ia32_emit_block_header(env, block, last_block);
2066 /* emit the contents of the block */
2067 ia32_emit_dbg(env, block);
2068 sched_foreach(block, node) {
2069 ia32_emit_node(env, node);
2074 * Emits code for function start.
2077 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2078 ir_entity *irg_ent = get_irg_entity(irg);
2079 const char *irg_name = get_entity_ld_name(irg_ent);
2080 cpu_support cpu = env->isa->opt_arch;
2081 const be_irg_t *birg = env->cg->birg;
2083 be_emit_write_line(env);
2084 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2085 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2086 ia32_emit_align_func(env, cpu);
2087 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2088 be_emit_cstring(env, ".global ");
2089 be_emit_string(env, irg_name);
2090 be_emit_char(env, '\n');
2091 be_emit_write_line(env);
2093 ia32_emit_function_object(env, irg_name);
2094 be_emit_string(env, irg_name);
2095 be_emit_cstring(env, ":\n");
2096 be_emit_write_line(env);
2100 * Emits code for function end
2103 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2104 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2105 const be_irg_t *birg = env->cg->birg;
2107 ia32_emit_function_size(env, irg_name);
2108 be_dbg_method_end(birg->main_env->db_handle);
2109 be_emit_char(env, '\n');
2110 be_emit_write_line(env);
2115 * Sets labels for control flow nodes (jump target)
2118 void ia32_gen_labels(ir_node *block, void *data) {
2120 int n = get_Block_n_cfgpreds(block);
2122 for (n--; n >= 0; n--) {
2123 pred = get_Block_cfgpred(block, n);
2124 set_irn_link(pred, block);
2129 * Main driver. Emits the code for one routine.
2131 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2132 ia32_emit_env_t env;
2134 ir_node *last_block = NULL;
2137 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2138 env.emit = &env.isa->emit;
2139 env.arch_env = cg->arch_env;
2142 ia32_register_emitters();
2144 ia32_emit_func_prolog(&env, irg);
2145 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2147 n = ARR_LEN(cg->blk_sched);
2148 for (i = 0; i < n;) {
2151 block = cg->blk_sched[i];
2153 next_bl = i < n ? cg->blk_sched[i] : NULL;
2155 /* set here the link. the emitter expects to find the next block here */
2156 set_irn_link(block, next_bl);
2157 ia32_gen_block(&env, block, last_block);
2161 ia32_emit_func_epilog(&env, irg);
2164 void ia32_init_emitter(void)
2166 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");