2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 /* in case of a joker register: just return a valid register */
90 if (arch_register_type_is(reg, joker)) {
91 const arch_register_req_t *req;
93 /* ask for the requirements */
94 req = arch_get_register_req(arch_env, irn, pos);
96 if (arch_register_req_is(req, limited)) {
97 /* in case of limited requirements: get the first allowed register */
98 unsigned idx = rbitset_next(req->limited, 0, 1);
99 reg = arch_register_for_index(req->cls, idx);
101 /* otherwise get first register in class */
102 reg = arch_register_for_index(req->cls, 0);
110 * Returns the register at out position pos.
113 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
116 const arch_env_t *arch_env = env->arch_env;
118 const arch_register_t *reg = NULL;
120 /* 1st case: irn is not of mode_T, so it has only */
121 /* one OUT register -> good */
122 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
123 /* Proj with the corresponding projnum for the register */
125 if (get_irn_mode(irn) != mode_T) {
126 reg = arch_get_irn_register(arch_env, irn);
127 } else if (is_ia32_irn(irn)) {
128 reg = get_ia32_out_reg(irn, pos);
130 const ir_edge_t *edge;
132 foreach_out_edge(irn, edge) {
133 proj = get_edge_src_irn(edge);
134 assert(is_Proj(proj) && "non-Proj from mode_T node");
135 if (get_Proj_proj(proj) == pos) {
136 reg = arch_get_irn_register(arch_env, proj);
142 assert(reg && "no out register found");
147 * Determine the gnu assembler suffix that indicates a mode
150 char get_mode_suffix(const ir_mode *mode) {
151 if(mode_is_float(mode)) {
152 switch(get_mode_size_bits(mode)) {
162 assert(mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode));
163 switch(get_mode_size_bits(mode)) {
174 panic("Can't output mode_suffix for %+F\n", mode);
178 int produces_result(const ir_node *node) {
179 return !(is_ia32_St(node) ||
180 is_ia32_CondJmp(node) ||
181 is_ia32_xCondJmp(node) ||
182 is_ia32_CmpSet(node) ||
183 is_ia32_xCmpSet(node) ||
184 is_ia32_SwitchJmp(node));
188 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
189 const arch_register_t *reg) {
190 switch(get_mode_size_bits(mode)) {
192 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
194 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
196 return (char *)arch_register_get_name(reg);
201 * Add a number to a prefix. This number will not be used a second time.
204 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
205 static unsigned long id = 0;
206 snprintf(buf, buflen, "%s%lu", prefix, ++id);
210 /*************************************************************
212 * (_) | | / _| | | | |
213 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
214 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
215 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
216 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
219 *************************************************************/
221 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
222 // be_emit_env_t* so we cheat a bit...
223 #define be_emit_char(env,c) be_emit_char(env->emit,c)
224 #define be_emit_string(env,s) be_emit_string(env->emit,s)
225 #undef be_emit_cstring
226 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
227 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
228 #define be_emit_tarval(env,tv) be_emit_tarval(env->emit,tv)
229 #define be_emit_write_line(env) be_emit_write_line(env->emit)
230 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
231 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
233 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
235 const arch_register_t *reg = get_in_reg(env, node, pos);
236 const char *reg_name = arch_register_get_name(reg);
238 assert(pos < get_irn_arity(node));
240 be_emit_char(env, '%');
241 be_emit_string(env, reg_name);
244 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
245 const arch_register_t *reg = get_out_reg(env, node, pos);
246 const char *reg_name = arch_register_get_name(reg);
248 be_emit_char(env, '%');
249 be_emit_string(env, reg_name);
252 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
254 const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
257 be_emit_char(env, '%');
258 be_emit_string(env, attr->x87[pos]->name);
261 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
267 be_emit_char(env, '$');
269 switch(get_ia32_immop_type(node)) {
271 tv = get_ia32_Immop_tarval(node);
272 be_emit_tarval(env, tv);
274 case ia32_ImmSymConst:
275 ent = get_ia32_Immop_symconst(node);
276 set_entity_backend_marked(ent, 1);
277 id = get_entity_ld_ident(ent);
278 be_emit_ident(env, id);
285 be_emit_string(env, "BAD");
290 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
292 be_emit_char(env, get_mode_suffix(mode));
295 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
297 ir_mode *mode = get_ia32_ls_mode(node);
301 ia32_emit_mode_suffix_mode(env, mode);
304 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
306 ir_mode *mode = get_ia32_ls_mode(node);
308 ia32_emit_mode_suffix_mode(env, mode);
312 char get_xmm_mode_suffix(ir_mode *mode)
314 assert(mode_is_float(mode));
315 switch(get_mode_size_bits(mode)) {
326 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
328 ir_mode *mode = get_ia32_ls_mode(node);
329 assert(mode != NULL);
330 be_emit_char(env, 's');
331 be_emit_char(env, get_xmm_mode_suffix(mode));
334 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
336 ir_mode *mode = get_ia32_ls_mode(node);
337 assert(mode != NULL);
338 be_emit_char(env, get_xmm_mode_suffix(mode));
341 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
343 if(get_mode_size_bits(mode) == 32)
345 if(mode_is_signed(mode)) {
346 be_emit_char(env, 's');
348 be_emit_char(env, 'z');
353 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
355 switch (be_gas_flavour) {
356 case GAS_FLAVOUR_NORMAL:
357 be_emit_cstring(env, "\t.type\t");
358 be_emit_string(env, name);
359 be_emit_cstring(env, ", @function\n");
360 be_emit_write_line(env);
362 case GAS_FLAVOUR_MINGW:
363 be_emit_cstring(env, "\t.def\t");
364 be_emit_string(env, name);
365 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
366 be_emit_write_line(env);
374 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
376 switch (be_gas_flavour) {
377 case GAS_FLAVOUR_NORMAL:
378 be_emit_cstring(env, "\t.size\t");
379 be_emit_string(env, name);
380 be_emit_cstring(env, ", .-");
381 be_emit_string(env, name);
382 be_emit_char(env, '\n');
383 be_emit_write_line(env);
392 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node);
395 * Emits registers and/or address mode of a binary operation.
397 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
399 const ir_node *right_op;
401 switch(get_ia32_op_type(node)) {
403 right_op = get_irn_n(node, 3);
404 if(is_ia32_Immediate(right_op)) {
405 emit_ia32_Immediate(env, right_op);
406 be_emit_cstring(env, ", ");
407 ia32_emit_source_register(env, node, 2);
409 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
410 ia32_emit_immediate(env, node);
411 be_emit_cstring(env, ", ");
412 ia32_emit_source_register(env, node, 2);
414 const arch_register_t *in1 = get_in_reg(env, node, 2);
415 const arch_register_t *in2 = get_in_reg(env, node, 3);
416 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
417 const arch_register_t *in;
420 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
421 out = out ? out : in1;
422 in_name = arch_register_get_name(in);
424 if (is_ia32_emit_cl(node)) {
425 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
429 be_emit_char(env, '%');
430 be_emit_string(env, in_name);
431 be_emit_cstring(env, ", %");
432 be_emit_string(env, arch_register_get_name(out));
436 ia32_emit_am(env, node);
437 be_emit_cstring(env, ", ");
438 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
439 assert(!produces_result(node) && "Source AM with Const must not produce result");
440 ia32_emit_immediate(env, node);
441 } else if (produces_result(node)) {
442 ia32_emit_dest_register(env, node, 0);
444 ia32_emit_source_register(env, node, 2);
448 right_pos = get_irn_arity(node) == 5 ? 3 : 2;
449 right_op = get_irn_n(node, right_pos);
450 if(is_ia32_Immediate(right_op)) {
451 emit_ia32_Immediate(env, right_op);
452 be_emit_cstring(env, ", ");
453 ia32_emit_am(env, node);
455 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
456 ia32_emit_immediate(env, node);
457 be_emit_cstring(env, ", ");
458 ia32_emit_am(env, node);
460 const arch_register_t *in1 = get_in_reg(env, node, right_pos);
461 ir_mode *mode = get_ia32_ls_mode(node);
464 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
466 if (is_ia32_emit_cl(node)) {
467 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
471 be_emit_char(env, '%');
472 be_emit_string(env, in_name);
473 be_emit_cstring(env, ", ");
474 ia32_emit_am(env, node);
478 assert(0 && "unsupported op type");
483 * Emits registers and/or address mode of a binary operation.
485 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
486 switch(get_ia32_op_type(node)) {
488 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
489 // should not happen...
492 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
493 const arch_register_t *in1 = x87_attr->x87[0];
494 const arch_register_t *in2 = x87_attr->x87[1];
495 const arch_register_t *out = x87_attr->x87[2];
496 const arch_register_t *in;
498 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
499 out = out ? out : in1;
501 be_emit_char(env, '%');
502 be_emit_string(env, arch_register_get_name(in));
503 be_emit_cstring(env, ", %");
504 be_emit_string(env, arch_register_get_name(out));
509 ia32_emit_am(env, node);
512 assert(0 && "unsupported op type");
516 void ia32_emit_am_or_dest_register(ia32_emit_env_t *env, const ir_node *node,
518 if(get_ia32_op_type(node) == ia32_Normal) {
519 ia32_emit_dest_register(env, node, pos);
521 assert(get_ia32_op_type(node) == ia32_AddrModeD);
522 ia32_emit_am(env, node);
527 * Emits registers and/or address mode of a unary operation.
529 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node, int pos) {
532 switch(get_ia32_op_type(node)) {
534 op = get_irn_n(node, pos);
535 if (is_ia32_Immediate(op)) {
536 emit_ia32_Immediate(env, op);
537 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
538 ia32_emit_immediate(env, node);
540 ia32_emit_source_register(env, node, pos);
545 ia32_emit_am(env, node);
548 assert(0 && "unsupported op type");
553 * Emits address mode.
555 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
556 ir_entity *ent = get_ia32_am_sc(node);
557 int offs = get_ia32_am_offs_int(node);
558 ir_node *base = get_irn_n(node, 0);
559 int has_base = !is_ia32_NoReg_GP(base);
560 ir_node *index = get_irn_n(node, 1);
561 int has_index = !is_ia32_NoReg_GP(index);
563 /* just to be sure... */
564 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
570 set_entity_backend_marked(ent, 1);
571 id = get_entity_ld_ident(ent);
572 if (is_ia32_am_sc_sign(node))
573 be_emit_char(env, '-');
574 be_emit_ident(env, id);
576 if(get_entity_owner(ent) == get_tls_type()) {
577 if (get_entity_visibility(ent) == visibility_external_allocated) {
578 be_emit_cstring(env, "@INDNTPOFF");
580 be_emit_cstring(env, "@NTPOFF");
587 be_emit_irprintf(env->emit, "%+d", offs);
589 be_emit_irprintf(env->emit, "%d", offs);
593 if (has_base || has_index) {
594 be_emit_char(env, '(');
598 ia32_emit_source_register(env, node, 0);
601 /* emit index + scale */
604 be_emit_char(env, ',');
605 ia32_emit_source_register(env, node, 1);
607 scale = get_ia32_am_scale(node);
609 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
612 be_emit_char(env, ')');
616 /*************************************************
619 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
620 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
621 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
622 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
624 *************************************************/
627 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
630 * coding of conditions
632 struct cmp2conditon_t {
638 * positive conditions for signed compares
641 const struct cmp2conditon_t cmp2condition_s[] = {
642 { NULL, pn_Cmp_False }, /* always false */
643 { "e", pn_Cmp_Eq }, /* == */
644 { "l", pn_Cmp_Lt }, /* < */
645 { "le", pn_Cmp_Le }, /* <= */
646 { "g", pn_Cmp_Gt }, /* > */
647 { "ge", pn_Cmp_Ge }, /* >= */
648 { "ne", pn_Cmp_Lg }, /* != */
649 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
650 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
651 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
652 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
653 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
654 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
655 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
656 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
657 { NULL, pn_Cmp_True }, /* always true */
661 * positive conditions for unsigned compares
664 const struct cmp2conditon_t cmp2condition_u[] = {
665 { NULL, pn_Cmp_False }, /* always false */
666 { "e", pn_Cmp_Eq }, /* == */
667 { "b", pn_Cmp_Lt }, /* < */
668 { "be", pn_Cmp_Le }, /* <= */
669 { "a", pn_Cmp_Gt }, /* > */
670 { "ae", pn_Cmp_Ge }, /* >= */
671 { "ne", pn_Cmp_Lg }, /* != */
672 { NULL, pn_Cmp_True }, /* always true */
676 * returns the condition code
679 const char *get_cmp_suffix(pn_Cmp cmp_code)
681 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
682 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
684 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
685 return cmp2condition_u[cmp_code & 7].name;
687 return cmp2condition_s[cmp_code & 15].name;
691 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
693 be_emit_string(env, get_cmp_suffix(pnc));
698 * Returns the target block for a control flow node.
701 ir_node *get_cfop_target_block(const ir_node *irn) {
702 return get_irn_link(irn);
706 * Emits a block label for the given block.
709 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
711 be_emit_cstring(env, BLOCK_PREFIX);
712 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
716 * Emits the target label for a control flow node.
719 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
720 ir_node *block = get_cfop_target_block(node);
722 ia32_emit_block_name(env, block);
725 /** Return the next block in Block schedule */
726 static ir_node *next_blk_sched(const ir_node *block) {
727 return get_irn_link(block);
731 * Returns the Proj with projection number proj and NOT mode_M
734 ir_node *get_proj(const ir_node *node, long proj) {
735 const ir_edge_t *edge;
738 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
740 foreach_out_edge(node, edge) {
741 src = get_edge_src_irn(edge);
743 assert(is_Proj(src) && "Proj expected");
744 if (get_irn_mode(src) == mode_M)
747 if (get_Proj_proj(src) == proj)
754 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
757 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
759 const ir_node *proj_true;
760 const ir_node *proj_false;
761 const ir_node *block;
762 const ir_node *next_block;
765 /* get both Proj's */
766 proj_true = get_proj(node, pn_Cond_true);
767 assert(proj_true && "CondJmp without true Proj");
769 proj_false = get_proj(node, pn_Cond_false);
770 assert(proj_false && "CondJmp without false Proj");
772 /* for now, the code works for scheduled and non-schedules blocks */
773 block = get_nodes_block(node);
775 /* we have a block schedule */
776 next_block = next_blk_sched(block);
778 if (get_cfop_target_block(proj_true) == next_block) {
779 /* exchange both proj's so the second one can be omitted */
780 const ir_node *t = proj_true;
782 proj_true = proj_false;
785 pnc = get_negated_pnc(pnc, mode);
788 /* in case of unordered compare, check for parity */
789 if (pnc & pn_Cmp_Uo) {
790 be_emit_cstring(env, "\tjp ");
791 ia32_emit_cfop_target(env, proj_true);
792 be_emit_finish_line_gas(env, proj_true);
795 be_emit_cstring(env, "\tj");
796 ia32_emit_cmp_suffix(env, pnc);
797 be_emit_char(env, ' ');
798 ia32_emit_cfop_target(env, proj_true);
799 be_emit_finish_line_gas(env, proj_true);
801 /* the second Proj might be a fallthrough */
802 if (get_cfop_target_block(proj_false) != next_block) {
803 be_emit_cstring(env, "\tjmp ");
804 ia32_emit_cfop_target(env, proj_false);
805 be_emit_finish_line_gas(env, proj_false);
807 be_emit_cstring(env, "\t/* fallthrough to ");
808 ia32_emit_cfop_target(env, proj_false);
809 be_emit_cstring(env, " */");
810 be_emit_finish_line_gas(env, proj_false);
815 * Emits code for conditional jump.
818 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
819 be_emit_cstring(env, "\tcmp ");
820 ia32_emit_binop(env, node);
821 be_emit_finish_line_gas(env, node);
823 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
827 * Emits code for conditional jump with two variables.
830 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
831 CondJmp_emitter(env, node);
835 * Emits code for conditional test and jump.
838 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
839 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
840 be_emit_cstring(env, "\ttest ");
841 ia32_emit_immediate(env, node);
842 be_emit_cstring(env, ", ");
843 ia32_emit_source_register(env, node, 0);
844 be_emit_finish_line_gas(env, node);
846 be_emit_cstring(env, "\ttest ");
847 ia32_emit_source_register(env, node, 1);
848 be_emit_cstring(env, ", ");
849 ia32_emit_source_register(env, node, 0);
850 be_emit_finish_line_gas(env, node);
852 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
856 * Emits code for conditional test and jump with two variables.
859 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
860 TestJmp_emitter(env, node);
864 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
865 be_emit_cstring(env, "/* omitted redundant test */");
866 be_emit_finish_line_gas(env, node);
868 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
872 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
873 be_emit_cstring(env, "/* omitted redundant test/cmp */");
874 be_emit_finish_line_gas(env, node);
876 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
880 * Emits code for conditional SSE floating point jump with two variables.
883 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
884 be_emit_cstring(env, "\tucomi");
885 ia32_emit_xmm_mode_suffix(env, node);
886 be_emit_char(env, ' ');
887 ia32_emit_binop(env, node);
888 be_emit_finish_line_gas(env, node);
890 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
894 * Emits code for conditional x87 floating point jump with two variables.
897 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
898 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
899 const char *reg = x87_attr->x87[1]->name;
900 long pnc = get_ia32_pncode(node);
902 switch (get_ia32_irn_opcode(node)) {
903 case iro_ia32_fcomrJmp:
904 pnc = get_inversed_pnc(pnc);
905 reg = x87_attr->x87[0]->name;
906 case iro_ia32_fcomJmp:
908 be_emit_cstring(env, "\tfucom ");
910 case iro_ia32_fcomrpJmp:
911 pnc = get_inversed_pnc(pnc);
912 reg = x87_attr->x87[0]->name;
913 case iro_ia32_fcompJmp:
914 be_emit_cstring(env, "\tfucomp ");
916 case iro_ia32_fcomrppJmp:
917 pnc = get_inversed_pnc(pnc);
918 case iro_ia32_fcomppJmp:
919 be_emit_cstring(env, "\tfucompp ");
925 be_emit_char(env, '%');
926 be_emit_string(env, reg);
928 be_emit_finish_line_gas(env, node);
930 be_emit_cstring(env, "\tfnstsw %ax");
931 be_emit_finish_line_gas(env, node);
932 be_emit_cstring(env, "\tsahf");
933 be_emit_finish_line_gas(env, node);
935 finish_CondJmp(env, node, mode_E, pnc);
939 void emit_register_or_immediate(ia32_emit_env_t *env, const ir_node *node,
942 ir_node *op = get_irn_n(node, pos);
943 if(is_ia32_Immediate(op)) {
944 emit_ia32_Immediate(env, op);
946 ia32_emit_source_register(env, node, pos);
951 int is_ia32_Immediate_0(const ir_node *node)
953 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
955 return attr->offset == 0 && attr->symconst == NULL;
959 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node)
961 long pnc = get_ia32_pncode(node);
962 const arch_register_t *in1, *in2, *out;
964 out = arch_get_irn_register(env->arch_env, node);
965 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 2));
966 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 3));
968 /* we have to emit the cmp first, because the destination register */
969 /* could be one of the compare registers */
970 if (is_ia32_CmpCMov(node)) {
971 long pncr = pnc & ~ia32_pn_Cmp_Unsigned;
972 ir_node *cmp_right = get_irn_n(node, 1);
974 if( (pncr == pn_Cmp_Eq || pncr == pn_Cmp_Lg)
975 && is_ia32_Immediate(cmp_right)
976 && is_ia32_Immediate_0(cmp_right)) {
977 be_emit_cstring(env, "\ttest ");
978 ia32_emit_source_register(env, node, 0);
979 be_emit_cstring(env, ", ");
980 ia32_emit_source_register(env, node, 0);
982 be_emit_cstring(env, "\tcmp ");
983 emit_register_or_immediate(env, node, 1);
984 be_emit_cstring(env, ", ");
985 ia32_emit_source_register(env, node, 0);
987 } else if (is_ia32_xCmpCMov(node)) {
988 be_emit_cstring(env, "\tucomis");
989 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
990 be_emit_char(env, ' ');
991 ia32_emit_source_register(env, node, 1);
992 be_emit_cstring(env, ", ");
993 ia32_emit_source_register(env, node, 0);
995 assert(0 && "unsupported CMov");
997 be_emit_finish_line_gas(env, node);
999 if (REGS_ARE_EQUAL(out, in2)) {
1000 /* best case: default in == out -> do nothing */
1001 } else if (REGS_ARE_EQUAL(out, in1)) {
1002 ir_node *n = (ir_node*) node;
1003 /* true in == out -> need complement compare and exchange true and default in */
1004 ir_node *t = get_irn_n(n, 2);
1005 set_irn_n(n, 2, get_irn_n(n, 3));
1008 pnc = get_negated_pnc(pnc, get_irn_mode(node));
1010 /* out is different from in: need copy default -> out */
1011 be_emit_cstring(env, "\tmovl ");
1012 ia32_emit_source_register(env, node, n_ia32_CmpCMov_val_false);
1013 be_emit_cstring(env, ", ");
1014 ia32_emit_dest_register(env, node, 0);
1015 be_emit_finish_line_gas(env, node);
1018 be_emit_cstring(env, "\tcmov");
1019 ia32_emit_cmp_suffix(env, pnc);
1020 be_emit_cstring(env, "l ");
1021 ia32_emit_source_register(env, node, n_ia32_CmpCMov_val_true);
1022 be_emit_cstring(env, ", ");
1023 ia32_emit_dest_register(env, node, 0);
1024 be_emit_finish_line_gas(env, node);
1028 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node)
1030 CMov_emitter(env, node);
1034 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node)
1036 CMov_emitter(env, node);
1040 void Set_emitter(ia32_emit_env_t *env, const ir_node *node)
1042 long pnc = get_ia32_pncode(node);
1043 const char *reg8bit;
1044 const arch_register_t *out;
1046 out = arch_get_irn_register(env->arch_env, node);
1047 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1049 if (is_ia32_CmpSet(node)) {
1050 long pncr = pnc & ~ia32_pn_Cmp_Unsigned;
1051 ir_node *cmp_right = get_irn_n(node, n_ia32_CmpSet_cmp_right);
1053 if( (pncr == pn_Cmp_Eq || pncr == pn_Cmp_Lg)
1054 && is_ia32_Immediate(cmp_right)
1055 && is_ia32_Immediate_0(cmp_right)) {
1056 be_emit_cstring(env, "\ttest ");
1057 ia32_emit_source_register(env, node, n_ia32_CmpSet_cmp_left);
1058 be_emit_cstring(env, ", ");
1059 ia32_emit_source_register(env, node, n_ia32_CmpSet_cmp_left);
1061 be_emit_cstring(env, "\tcmp ");
1062 ia32_emit_binop(env, node);
1064 } else if (is_ia32_xCmpSet(node)) {
1065 be_emit_cstring(env, "\tucomis");
1066 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1067 be_emit_char(env, ' ');
1068 ia32_emit_binop(env, node);
1070 assert(0 && "unsupported Set");
1072 be_emit_finish_line_gas(env, node);
1074 /* use mov to clear target because it doesn't affect the eflags */
1075 be_emit_cstring(env, "\tmovl $0, %");
1076 be_emit_string(env, arch_register_get_name(out));
1077 be_emit_finish_line_gas(env, node);
1079 be_emit_cstring(env, "\tset");
1080 ia32_emit_cmp_suffix(env, pnc);
1081 be_emit_cstring(env, " %");
1082 be_emit_string(env, reg8bit);
1083 be_emit_finish_line_gas(env, node);
1087 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1088 Set_emitter(env, node);
1092 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1093 Set_emitter(env, node);
1097 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1099 long pnc = get_ia32_pncode(node);
1100 long unord = pnc & pn_Cmp_Uo;
1102 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1105 case pn_Cmp_Leg: /* odered */
1108 case pn_Cmp_Uo: /* unordered */
1112 case pn_Cmp_Eq: /* == */
1116 case pn_Cmp_Lt: /* < */
1120 case pn_Cmp_Le: /* <= */
1124 case pn_Cmp_Gt: /* > */
1128 case pn_Cmp_Ge: /* >= */
1132 case pn_Cmp_Lg: /* != */
1137 assert(sse_pnc >= 0 && "unsupported compare");
1139 if (unord && sse_pnc != 3) {
1141 We need a separate compare against unordered.
1142 Quick and Dirty solution:
1143 - get some memory on stack
1147 - and result and stored result
1150 be_emit_cstring(env, "\tsubl $8, %esp");
1151 be_emit_finish_line_gas(env, node);
1153 be_emit_cstring(env, "\tcmpsd $3, ");
1154 ia32_emit_binop(env, node);
1155 be_emit_finish_line_gas(env, node);
1157 be_emit_cstring(env, "\tmovsd ");
1158 ia32_emit_dest_register(env, node, 0);
1159 be_emit_cstring(env, ", (%esp)");
1160 be_emit_finish_line_gas(env, node);
1163 be_emit_cstring(env, "\tcmpsd ");
1164 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1165 ia32_emit_binop(env, node);
1166 be_emit_finish_line_gas(env, node);
1168 if (unord && sse_pnc != 3) {
1169 be_emit_cstring(env, "\tandpd (%esp), ");
1170 ia32_emit_dest_register(env, node, 0);
1171 be_emit_finish_line_gas(env, node);
1173 be_emit_cstring(env, "\taddl $8, %esp");
1174 be_emit_finish_line_gas(env, node);
1178 /*********************************************************
1181 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1182 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1183 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1184 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1187 *********************************************************/
1189 /* jump table entry (target and corresponding number) */
1190 typedef struct _branch_t {
1195 /* jump table for switch generation */
1196 typedef struct _jmp_tbl_t {
1197 ir_node *defProj; /**< default target */
1198 long min_value; /**< smallest switch case */
1199 long max_value; /**< largest switch case */
1200 long num_branches; /**< number of jumps */
1201 char *label; /**< label of the jump table */
1202 branch_t *branches; /**< jump array */
1206 * Compare two variables of type branch_t. Used to sort all switch cases
1209 int ia32_cmp_branch_t(const void *a, const void *b) {
1210 branch_t *b1 = (branch_t *)a;
1211 branch_t *b2 = (branch_t *)b;
1213 if (b1->value <= b2->value)
1220 * Emits code for a SwitchJmp (creates a jump table if
1221 * possible otherwise a cmp-jmp cascade). Port from
1225 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1226 unsigned long interval;
1231 const ir_edge_t *edge;
1233 /* fill the table structure */
1234 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1235 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1237 tbl.num_branches = get_irn_n_edges(node);
1238 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1239 tbl.min_value = INT_MAX;
1240 tbl.max_value = INT_MIN;
1243 /* go over all proj's and collect them */
1244 foreach_out_edge(node, edge) {
1245 proj = get_edge_src_irn(edge);
1246 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1248 pnc = get_Proj_proj(proj);
1250 /* create branch entry */
1251 tbl.branches[i].target = proj;
1252 tbl.branches[i].value = pnc;
1254 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1255 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1257 /* check for default proj */
1258 if (pnc == get_ia32_pncode(node)) {
1259 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1266 /* sort the branches by their number */
1267 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1269 /* two-complement's magic make this work without overflow */
1270 interval = tbl.max_value - tbl.min_value;
1272 /* emit the table */
1273 be_emit_cstring(env, "\tcmpl $");
1274 be_emit_irprintf(env->emit, "%u, ", interval);
1275 ia32_emit_source_register(env, node, 0);
1276 be_emit_finish_line_gas(env, node);
1278 be_emit_cstring(env, "\tja ");
1279 ia32_emit_cfop_target(env, tbl.defProj);
1280 be_emit_finish_line_gas(env, node);
1282 if (tbl.num_branches > 1) {
1284 be_emit_cstring(env, "\tjmp *");
1285 be_emit_string(env, tbl.label);
1286 be_emit_cstring(env, "(,");
1287 ia32_emit_source_register(env, node, 0);
1288 be_emit_cstring(env, ",4)");
1289 be_emit_finish_line_gas(env, node);
1291 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1292 be_emit_cstring(env, "\t.align 4\n");
1293 be_emit_write_line(env);
1295 be_emit_string(env, tbl.label);
1296 be_emit_cstring(env, ":\n");
1297 be_emit_write_line(env);
1299 be_emit_cstring(env, ".long ");
1300 ia32_emit_cfop_target(env, tbl.branches[0].target);
1301 be_emit_finish_line_gas(env, NULL);
1303 last_value = tbl.branches[0].value;
1304 for (i = 1; i < tbl.num_branches; ++i) {
1305 while (++last_value < tbl.branches[i].value) {
1306 be_emit_cstring(env, ".long ");
1307 ia32_emit_cfop_target(env, tbl.defProj);
1308 be_emit_finish_line_gas(env, NULL);
1310 be_emit_cstring(env, ".long ");
1311 ia32_emit_cfop_target(env, tbl.branches[i].target);
1312 be_emit_finish_line_gas(env, NULL);
1314 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1316 /* one jump is enough */
1317 be_emit_cstring(env, "\tjmp ");
1318 ia32_emit_cfop_target(env, tbl.branches[0].target);
1319 be_emit_finish_line_gas(env, node);
1329 * Emits code for a unconditional jump.
1332 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1333 ir_node *block, *next_block;
1335 /* for now, the code works for scheduled and non-schedules blocks */
1336 block = get_nodes_block(node);
1338 /* we have a block schedule */
1339 next_block = next_blk_sched(block);
1340 if (get_cfop_target_block(node) != next_block) {
1341 be_emit_cstring(env, "\tjmp ");
1342 ia32_emit_cfop_target(env, node);
1344 be_emit_cstring(env, "\t/* fallthrough to ");
1345 ia32_emit_cfop_target(env, node);
1346 be_emit_cstring(env, " */");
1348 be_emit_finish_line_gas(env, node);
1352 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node)
1354 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
1356 be_emit_char(env, '$');
1357 if(attr->symconst != NULL) {
1358 ident *id = get_entity_ld_ident(attr->symconst);
1360 if(attr->attr.data.am_sc_sign)
1361 be_emit_char(env, '-');
1362 be_emit_ident(env, id);
1364 if(attr->symconst == NULL || attr->offset != 0) {
1365 if(attr->symconst != NULL)
1366 be_emit_char(env, '+');
1367 be_emit_irprintf(env->emit, "%d", attr->offset);
1372 const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
1375 const arch_register_t *reg;
1376 const char *reg_name;
1380 const ia32_attr_t *attr;
1387 /* parse modifiers */
1390 ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node);
1391 be_emit_char(env, '%');
1394 be_emit_char(env, '%');
1414 ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier "
1415 "'%c' for asm op\n", node, c);
1421 sscanf(s, "%d%n", &num, &p);
1423 ir_fprintf(stderr, "Warning: Couldn't parse assembler operand (%+F)\n",
1431 attr = get_ia32_attr_const(node);
1432 n_outs = ARR_LEN(attr->slots);
1434 reg = get_out_reg(env, node, num);
1437 int in = num - n_outs;
1438 if(in >= get_irn_arity(node)) {
1439 ir_fprintf(stderr, "Warning: Invalid input %d specified in asm "
1440 "op (%+F)\n", num, node);
1443 pred = get_irn_n(node, in);
1444 /* might be an immediate value */
1445 if(is_ia32_Immediate(pred)) {
1446 emit_ia32_Immediate(env, pred);
1449 reg = get_in_reg(env, node, in);
1452 ir_fprintf(stderr, "Warning: no register assigned for %d asm op "
1453 "(%+F)\n", num, node);
1458 be_emit_char(env, '%');
1461 reg_name = arch_register_get_name(reg);
1464 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
1467 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit_high, reg);
1470 reg_name = ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
1473 panic("Invalid asm op modifier");
1475 be_emit_string(env, reg_name);
1481 * Emits code for an ASM pseudo op.
1484 void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node)
1486 const void *gen_attr = get_irn_generic_attr_const(node);
1487 const ia32_asm_attr_t *attr
1488 = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, gen_attr);
1489 ident *asm_text = attr->asm_text;
1490 const char *s = get_id_str(asm_text);
1492 be_emit_cstring(env, "# Begin ASM \t");
1493 be_emit_finish_line_gas(env, node);
1496 be_emit_char(env, '\t');
1500 s = emit_asm_operand(env, node, s);
1503 be_emit_char(env, *s);
1508 be_emit_char(env, '\n');
1509 be_emit_write_line(env);
1511 be_emit_cstring(env, "# End ASM\n");
1512 be_emit_write_line(env);
1515 /**********************************
1518 * | | ___ _ __ _ _| |_) |
1519 * | | / _ \| '_ \| | | | _ <
1520 * | |___| (_) | |_) | |_| | |_) |
1521 * \_____\___/| .__/ \__, |____/
1524 **********************************/
1527 * Emit movsb/w instructions to make mov count divideable by 4
1530 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1531 be_emit_cstring(env, "\tcld");
1532 be_emit_finish_line_gas(env, NULL);
1536 be_emit_cstring(env, "\tmovsb");
1537 be_emit_finish_line_gas(env, NULL);
1540 be_emit_cstring(env, "\tmovsw");
1541 be_emit_finish_line_gas(env, NULL);
1544 be_emit_cstring(env, "\tmovsb");
1545 be_emit_finish_line_gas(env, NULL);
1546 be_emit_cstring(env, "\tmovsw");
1547 be_emit_finish_line_gas(env, NULL);
1553 * Emit rep movsd instruction for memcopy.
1556 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1557 tarval *tv = get_ia32_Immop_tarval(node);
1558 int rem = get_tarval_long(tv);
1560 emit_CopyB_prolog(env, rem);
1562 be_emit_cstring(env, "\trep movsd");
1563 be_emit_finish_line_gas(env, node);
1567 * Emits unrolled memcopy.
1570 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1571 tarval *tv = get_ia32_Immop_tarval(node);
1572 int size = get_tarval_long(tv);
1574 emit_CopyB_prolog(env, size & 0x3);
1578 be_emit_cstring(env, "\tmovsd");
1579 be_emit_finish_line_gas(env, NULL);
1585 /***************************
1589 * | | / _ \| '_ \ \ / /
1590 * | |___| (_) | | | \ V /
1591 * \_____\___/|_| |_|\_/
1593 ***************************/
1596 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1599 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1600 ir_mode *ls_mode = get_ia32_ls_mode(node);
1601 int ls_bits = get_mode_size_bits(ls_mode);
1603 be_emit_cstring(env, "\tcvt");
1605 if(is_ia32_Conv_I2FP(node)) {
1607 be_emit_cstring(env, "si2ss");
1609 be_emit_cstring(env, "si2sd");
1611 } else if(is_ia32_Conv_FP2I(node)) {
1613 be_emit_cstring(env, "ss2si");
1615 be_emit_cstring(env, "sd2si");
1618 assert(is_ia32_Conv_FP2FP(node));
1620 be_emit_cstring(env, "sd2ss");
1622 be_emit_cstring(env, "ss2sd");
1625 be_emit_char(env, ' ');
1627 switch(get_ia32_op_type(node)) {
1629 ia32_emit_source_register(env, node, 2);
1630 be_emit_cstring(env, ", ");
1631 ia32_emit_dest_register(env, node, 0);
1633 case ia32_AddrModeS:
1634 ia32_emit_dest_register(env, node, 0);
1635 be_emit_cstring(env, ", ");
1636 ia32_emit_am(env, node);
1639 assert(0 && "unsupported op type for Conv");
1641 be_emit_finish_line_gas(env, node);
1645 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1646 emit_ia32_Conv_with_FP(env, node);
1650 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1651 emit_ia32_Conv_with_FP(env, node);
1655 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1656 emit_ia32_Conv_with_FP(env, node);
1660 * Emits code for an Int conversion.
1663 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1664 const char *sign_suffix;
1665 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1666 int smaller_bits = get_mode_size_bits(smaller_mode);
1668 const arch_register_t *in_reg, *out_reg;
1670 assert(!mode_is_float(smaller_mode));
1671 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1673 signed_mode = mode_is_signed(smaller_mode);
1674 if(smaller_bits == 32) {
1675 // this should not happen as it's no convert
1679 sign_suffix = signed_mode ? "s" : "z";
1682 switch(get_ia32_op_type(node)) {
1684 in_reg = get_in_reg(env, node, 2);
1685 out_reg = get_out_reg(env, node, 0);
1687 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1688 REGS_ARE_EQUAL(out_reg, in_reg) &&
1692 /* argument and result are both in EAX and */
1693 /* signedness is ok: -> use the smaller cwtl opcode */
1694 be_emit_cstring(env, "\tcwtl");
1696 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1698 be_emit_cstring(env, "\tmov");
1699 be_emit_string(env, sign_suffix);
1700 ia32_emit_mode_suffix_mode(env, smaller_mode);
1701 be_emit_cstring(env, "l %");
1702 be_emit_string(env, sreg);
1703 be_emit_cstring(env, ", ");
1704 ia32_emit_dest_register(env, node, 0);
1707 case ia32_AddrModeS: {
1708 be_emit_cstring(env, "\tmov");
1709 be_emit_string(env, sign_suffix);
1710 ia32_emit_mode_suffix_mode(env, smaller_mode);
1711 be_emit_cstring(env, "l %");
1712 ia32_emit_am(env, node);
1713 be_emit_cstring(env, ", ");
1714 ia32_emit_dest_register(env, node, 0);
1718 assert(0 && "unsupported op type for Conv");
1720 be_emit_finish_line_gas(env, node);
1724 * Emits code for an 8Bit Int conversion.
1726 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1727 emit_ia32_Conv_I2I(env, node);
1731 /*******************************************
1734 * | |__ ___ _ __ ___ __| | ___ ___
1735 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1736 * | |_) | __/ | | | (_) | (_| | __/\__ \
1737 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1739 *******************************************/
1742 * Emits a backend call
1745 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1746 ir_entity *ent = be_Call_get_entity(node);
1748 be_emit_cstring(env, "\tcall ");
1750 set_entity_backend_marked(ent, 1);
1751 be_emit_string(env, get_entity_ld_name(ent));
1753 be_emit_char(env, '*');
1754 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1756 be_emit_finish_line_gas(env, node);
1760 * Emits code to increase stack pointer.
1763 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1764 int offs = be_get_IncSP_offset(node);
1770 be_emit_cstring(env, "\tsubl $");
1771 be_emit_irprintf(env->emit, "%u, ", offs);
1772 ia32_emit_source_register(env, node, 0);
1774 be_emit_cstring(env, "\taddl $");
1775 be_emit_irprintf(env->emit, "%u, ", -offs);
1776 ia32_emit_source_register(env, node, 0);
1778 be_emit_finish_line_gas(env, node);
1782 * Emits code to set stack pointer.
1785 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1786 be_emit_cstring(env, "\tmovl ");
1787 ia32_emit_source_register(env, node, 2);
1788 be_emit_cstring(env, ", ");
1789 ia32_emit_dest_register(env, node, 0);
1790 be_emit_finish_line_gas(env, node);
1794 * Emits code for Copy/CopyKeep.
1797 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1799 const arch_env_t *aenv = env->arch_env;
1802 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1803 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1806 mode = get_irn_mode(node);
1807 if (mode == mode_E) {
1808 be_emit_cstring(env, "\tmovsd ");
1809 ia32_emit_source_register(env, node, 0);
1810 be_emit_cstring(env, ", ");
1811 ia32_emit_dest_register(env, node, 0);
1813 be_emit_cstring(env, "\tmovl ");
1814 ia32_emit_source_register(env, node, 0);
1815 be_emit_cstring(env, ", ");
1816 ia32_emit_dest_register(env, node, 0);
1818 be_emit_finish_line_gas(env, node);
1822 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1823 Copy_emitter(env, node, be_get_Copy_op(node));
1827 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1828 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1832 * Emits code for exchange.
1835 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1836 const arch_register_t *in1, *in2;
1837 const arch_register_class_t *cls1, *cls2;
1839 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1840 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1842 cls1 = arch_register_get_class(in1);
1843 cls2 = arch_register_get_class(in2);
1845 assert(cls1 == cls2 && "Register class mismatch at Perm");
1847 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1848 be_emit_cstring(env, "\txchg ");
1849 ia32_emit_source_register(env, node, 1);
1850 be_emit_cstring(env, ", ");
1851 ia32_emit_source_register(env, node, 0);
1852 be_emit_finish_line_gas(env, node);
1853 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1854 be_emit_cstring(env, "\txorpd ");
1855 ia32_emit_source_register(env, node, 1);
1856 be_emit_cstring(env, ", ");
1857 ia32_emit_source_register(env, node, 0);
1858 be_emit_finish_line_gas(env, NULL);
1860 be_emit_cstring(env, "\txorpd ");
1861 ia32_emit_source_register(env, node, 0);
1862 be_emit_cstring(env, ", ");
1863 ia32_emit_source_register(env, node, 1);
1864 be_emit_finish_line_gas(env, NULL);
1866 be_emit_cstring(env, "\txorpd ");
1867 ia32_emit_source_register(env, node, 1);
1868 be_emit_cstring(env, ", ");
1869 ia32_emit_source_register(env, node, 0);
1870 be_emit_finish_line_gas(env, node);
1871 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1873 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1879 * Emits code for Constant loading.
1882 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1883 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1885 if (imm_tp == ia32_ImmSymConst) {
1886 be_emit_cstring(env, "\tmovl ");
1887 ia32_emit_immediate(env, node);
1888 be_emit_cstring(env, ", ");
1889 ia32_emit_dest_register(env, node, 0);
1891 tarval *tv = get_ia32_Immop_tarval(node);
1892 assert(get_irn_mode(node) == mode_Iu);
1893 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1894 if (tarval_is_null(tv)) {
1895 if (env->isa->opt_arch == arch_pentium_4) {
1896 /* P4 prefers sub r, r, others xor r, r */
1897 be_emit_cstring(env, "\tsubl ");
1899 be_emit_cstring(env, "\txorl ");
1901 ia32_emit_dest_register(env, node, 0);
1902 be_emit_cstring(env, ", ");
1903 ia32_emit_dest_register(env, node, 0);
1905 be_emit_cstring(env, "\tmovl ");
1906 ia32_emit_immediate(env, node);
1907 be_emit_cstring(env, ", ");
1908 ia32_emit_dest_register(env, node, 0);
1911 be_emit_finish_line_gas(env, node);
1915 * Emits code to load the TLS base
1918 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1919 be_emit_cstring(env, "\tmovl %gs:0, ");
1920 ia32_emit_dest_register(env, node, 0);
1921 be_emit_finish_line_gas(env, node);
1925 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node)
1927 be_emit_cstring(env, "\tret");
1928 be_emit_finish_line_gas(env, node);
1932 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node)
1939 /***********************************************************************************
1942 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1943 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1944 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1945 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1947 ***********************************************************************************/
1950 * Enters the emitter functions for handled nodes into the generic
1951 * pointer of an opcode.
1954 void ia32_register_emitters(void) {
1956 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1957 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1958 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1959 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1960 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1961 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1963 /* first clear the generic function pointer for all ops */
1964 clear_irp_opcodes_generic_func();
1966 /* register all emitter functions defined in spec */
1967 ia32_register_spec_emitters();
1969 /* other ia32 emitter functions */
1977 IA32_EMIT(SwitchJmp);
1980 IA32_EMIT(Conv_I2FP);
1981 IA32_EMIT(Conv_FP2I);
1982 IA32_EMIT(Conv_FP2FP);
1983 IA32_EMIT(Conv_I2I);
1984 IA32_EMIT(Conv_I2I8Bit);
1989 IA32_EMIT(xCmpCMov);
1990 IA32_EMIT(xCondJmp);
1991 IA32_EMIT2(fcomJmp, x87CondJmp);
1992 IA32_EMIT2(fcompJmp, x87CondJmp);
1993 IA32_EMIT2(fcomppJmp, x87CondJmp);
1994 IA32_EMIT2(fcomrJmp, x87CondJmp);
1995 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1996 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1998 /* benode emitter */
2024 static const char *last_name = NULL;
2025 static unsigned last_line = -1;
2026 static unsigned num = -1;
2029 * Emit the debug support for node node.
2032 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
2033 dbg_info *db = get_irn_dbg_info(node);
2035 const char *fname = be_retrieve_dbg_info(db, &lineno);
2037 if (! env->cg->birg->main_env->options->stabs_debug_support)
2041 if (last_name != fname) {
2043 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
2046 if (last_line != lineno) {
2049 snprintf(name, sizeof(name), ".LM%u", ++num);
2051 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
2052 be_emit_string(env, name);
2053 be_emit_cstring(env, ":\n");
2054 be_emit_write_line(env);
2059 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
2062 * Emits code for a node.
2065 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
2066 ir_op *op = get_irn_op(node);
2068 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
2070 if (op->ops.generic) {
2071 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
2072 ia32_emit_dbg(env, node);
2073 (*func) (env, node);
2075 emit_Nothing(env, node);
2076 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
2081 * Emits gas alignment directives
2084 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
2085 be_emit_cstring(env, "\t.p2align ");
2086 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
2087 be_emit_write_line(env);
2091 * Emits gas alignment directives for Functions depended on cpu architecture.
2094 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
2096 unsigned maximum_skip;
2111 maximum_skip = (1 << align) - 1;
2112 ia32_emit_alignment(env, align, maximum_skip);
2116 * Emits gas alignment directives for Labels depended on cpu architecture.
2119 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
2120 unsigned align; unsigned maximum_skip;
2135 maximum_skip = (1 << align) - 1;
2136 ia32_emit_alignment(env, align, maximum_skip);
2140 * Test wether a block should be aligned.
2141 * For cpus in the P4/Athlon class it is usefull to align jump labels to
2142 * 16 bytes. However we should only do that if the alignment nops before the
2143 * label aren't executed more often than we have jumps to the label.
2146 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
2147 static const double DELTA = .0001;
2148 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2150 double prev_freq = 0; /**< execfreq of the fallthrough block */
2151 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
2152 cpu_support cpu = env->isa->opt_arch;
2155 if(exec_freq == NULL)
2157 if(cpu == arch_i386 || cpu == arch_i486)
2160 block_freq = get_block_execfreq(exec_freq, block);
2161 if(block_freq < DELTA)
2164 n_cfgpreds = get_Block_n_cfgpreds(block);
2165 for(i = 0; i < n_cfgpreds; ++i) {
2166 ir_node *pred = get_Block_cfgpred_block(block, i);
2167 double pred_freq = get_block_execfreq(exec_freq, pred);
2170 prev_freq += pred_freq;
2172 jmp_freq += pred_freq;
2176 if(prev_freq < DELTA && !(jmp_freq < DELTA))
2179 jmp_freq /= prev_freq;
2183 case arch_athlon_64:
2185 return jmp_freq > 3;
2187 return jmp_freq > 2;
2192 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
2197 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2200 n_cfgpreds = get_Block_n_cfgpreds(block);
2201 if (n_cfgpreds == 0) {
2203 } else if (n_cfgpreds == 1) {
2204 ir_node *pred = get_Block_cfgpred(block, 0);
2205 ir_node *pred_block = get_nodes_block(pred);
2207 /* we don't need labels for fallthrough blocks, however switch-jmps
2208 * are no fallthroughs */
2209 if(pred_block == prev &&
2210 !(is_Proj(pred) && is_ia32_SwitchJmp(get_Proj_pred(pred)))) {
2219 if (should_align_block(env, block, prev)) {
2221 ia32_emit_align_label(env, env->isa->opt_arch);
2225 ia32_emit_block_name(env, block);
2226 be_emit_char(env, ':');
2228 be_emit_pad_comment(env);
2229 be_emit_cstring(env, " /* preds:");
2231 /* emit list of pred blocks in comment */
2232 arity = get_irn_arity(block);
2233 for (i = 0; i < arity; ++i) {
2234 ir_node *predblock = get_Block_cfgpred_block(block, i);
2235 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2238 be_emit_cstring(env, "\t/* ");
2239 ia32_emit_block_name(env, block);
2240 be_emit_cstring(env, ": ");
2242 if (exec_freq != NULL) {
2243 be_emit_irprintf(env->emit, " freq: %f",
2244 get_block_execfreq(exec_freq, block));
2246 be_emit_cstring(env, " */\n");
2247 be_emit_write_line(env);
2251 * Walks over the nodes in a block connected by scheduling edges
2252 * and emits code for each node.
2255 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2257 const ir_node *node;
2259 ia32_emit_block_header(env, block, last_block);
2261 /* emit the contents of the block */
2262 ia32_emit_dbg(env, block);
2263 sched_foreach(block, node) {
2264 ia32_emit_node(env, node);
2269 * Emits code for function start.
2272 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2273 ir_entity *irg_ent = get_irg_entity(irg);
2274 const char *irg_name = get_entity_ld_name(irg_ent);
2275 cpu_support cpu = env->isa->opt_arch;
2276 const be_irg_t *birg = env->cg->birg;
2278 be_emit_write_line(env);
2279 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2280 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2281 ia32_emit_align_func(env, cpu);
2282 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2283 be_emit_cstring(env, ".global ");
2284 be_emit_string(env, irg_name);
2285 be_emit_char(env, '\n');
2286 be_emit_write_line(env);
2288 ia32_emit_function_object(env, irg_name);
2289 be_emit_string(env, irg_name);
2290 be_emit_cstring(env, ":\n");
2291 be_emit_write_line(env);
2295 * Emits code for function end
2298 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2299 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2300 const be_irg_t *birg = env->cg->birg;
2302 ia32_emit_function_size(env, irg_name);
2303 be_dbg_method_end(birg->main_env->db_handle);
2304 be_emit_char(env, '\n');
2305 be_emit_write_line(env);
2310 * Sets labels for control flow nodes (jump target)
2313 void ia32_gen_labels(ir_node *block, void *data)
2316 int n = get_Block_n_cfgpreds(block);
2319 for (n--; n >= 0; n--) {
2320 pred = get_Block_cfgpred(block, n);
2321 set_irn_link(pred, block);
2326 * Emit an exception label if the current instruction can fail.
2328 void ia32_emit_exc_label(ia32_emit_env_t *env, const ir_node *node) {
2329 if (get_ia32_exc_label(node)) {
2330 be_emit_irprintf(env->emit, ".EXL%u\n", 0);
2331 be_emit_write_line(env);
2336 * Main driver. Emits the code for one routine.
2338 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2339 ia32_emit_env_t env;
2341 ir_node *last_block = NULL;
2344 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2345 env.emit = &env.isa->emit;
2346 env.arch_env = cg->arch_env;
2349 ia32_register_emitters();
2351 ia32_emit_func_prolog(&env, irg);
2352 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2354 n = ARR_LEN(cg->blk_sched);
2355 for (i = 0; i < n;) {
2358 block = cg->blk_sched[i];
2360 next_bl = i < n ? cg->blk_sched[i] : NULL;
2362 /* set here the link. the emitter expects to find the next block here */
2363 set_irn_link(block, next_bl);
2364 ia32_gen_block(&env, block, last_block);
2368 ia32_emit_func_epilog(&env, irg);
2371 void ia32_init_emitter(void)
2373 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");