2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 /* in case of a joker register: just return a valid register */
90 if (arch_register_type_is(reg, joker)) {
91 const arch_register_req_t *req;
93 /* ask for the requirements */
94 req = arch_get_register_req(arch_env, irn, pos);
96 if (arch_register_req_is(req, limited)) {
97 /* in case of limited requirements: get the first allowed register */
98 unsigned idx = rbitset_next(req->limited, 0, 1);
99 reg = arch_register_for_index(req->cls, idx);
101 /* otherwise get first register in class */
102 reg = arch_register_for_index(req->cls, 0);
110 * Returns the register at out position pos.
113 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
116 const arch_env_t *arch_env = env->arch_env;
118 const arch_register_t *reg = NULL;
120 /* 1st case: irn is not of mode_T, so it has only */
121 /* one OUT register -> good */
122 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
123 /* Proj with the corresponding projnum for the register */
125 if (get_irn_mode(irn) != mode_T) {
126 reg = arch_get_irn_register(arch_env, irn);
127 } else if (is_ia32_irn(irn)) {
128 reg = get_ia32_out_reg(irn, pos);
130 const ir_edge_t *edge;
132 foreach_out_edge(irn, edge) {
133 proj = get_edge_src_irn(edge);
134 assert(is_Proj(proj) && "non-Proj from mode_T node");
135 if (get_Proj_proj(proj) == pos) {
136 reg = arch_get_irn_register(arch_env, proj);
142 assert(reg && "no out register found");
147 * Determine the gnu assembler suffix that indicates a mode
150 char get_mode_suffix(const ir_mode *mode) {
151 if(mode_is_float(mode)) {
152 switch(get_mode_size_bits(mode)) {
161 assert(mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode));
162 switch(get_mode_size_bits(mode)) {
173 panic("Can't output mode_suffix for %+F\n", mode);
177 int produces_result(const ir_node *node) {
178 return !(is_ia32_St(node) ||
179 is_ia32_CondJmp(node) ||
180 is_ia32_xCondJmp(node) ||
181 is_ia32_CmpSet(node) ||
182 is_ia32_xCmpSet(node) ||
183 is_ia32_SwitchJmp(node));
187 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
188 const arch_register_t *reg) {
189 switch(get_mode_size_bits(mode)) {
191 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
193 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
195 return (char *)arch_register_get_name(reg);
200 * Add a number to a prefix. This number will not be used a second time.
203 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
204 static unsigned long id = 0;
205 snprintf(buf, buflen, "%s%lu", prefix, ++id);
209 /*************************************************************
211 * (_) | | / _| | | | |
212 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
213 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
214 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
215 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
218 *************************************************************/
220 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
221 // be_emit_env_t* so we cheat a bit...
222 #define be_emit_char(env,c) be_emit_char(env->emit,c)
223 #define be_emit_string(env,s) be_emit_string(env->emit,s)
224 #undef be_emit_cstring
225 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
226 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
227 #define be_emit_write_line(env) be_emit_write_line(env->emit)
228 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
229 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
231 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
233 const arch_register_t *reg = get_in_reg(env, node, pos);
234 const char *reg_name = arch_register_get_name(reg);
236 assert(pos < get_irn_arity(node));
238 be_emit_char(env, '%');
239 be_emit_string(env, reg_name);
242 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
243 const arch_register_t *reg = get_out_reg(env, node, pos);
244 const char *reg_name = arch_register_get_name(reg);
246 be_emit_char(env, '%');
247 be_emit_string(env, reg_name);
250 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
252 ia32_attr_t *attr = get_ia32_attr(node);
255 be_emit_char(env, '%');
256 be_emit_string(env, attr->x87[pos]->name);
259 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
265 be_emit_char(env, '$');
267 switch(get_ia32_immop_type(node)) {
269 tv = get_ia32_Immop_tarval(node);
270 be_emit_tarval(env->emit, tv);
272 case ia32_ImmSymConst:
273 ent = get_ia32_Immop_symconst(node);
274 mark_entity_visited(ent);
275 id = get_entity_ld_ident(ent);
276 be_emit_ident(env, id);
283 be_emit_string(env, "BAD");
288 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
290 be_emit_char(env, get_mode_suffix(mode));
293 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
295 ir_mode *mode = get_ia32_ls_mode(node);
299 ia32_emit_mode_suffix_mode(env, mode);
302 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
304 ir_mode *mode = get_ia32_ls_mode(node);
306 ia32_emit_mode_suffix_mode(env, mode);
310 char get_xmm_mode_suffix(ir_mode *mode)
312 assert(mode_is_float(mode));
313 switch(get_mode_size_bits(mode)) {
324 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
326 ir_mode *mode = get_ia32_ls_mode(node);
327 assert(mode != NULL);
328 be_emit_char(env, 's');
329 be_emit_char(env, get_xmm_mode_suffix(mode));
332 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
334 ir_mode *mode = get_ia32_ls_mode(node);
335 assert(mode != NULL);
336 be_emit_char(env, get_xmm_mode_suffix(mode));
339 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
341 if(get_mode_size_bits(mode) == 32)
343 if(mode_is_signed(mode)) {
344 be_emit_char(env, 's');
346 be_emit_char(env, 'z');
351 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
353 switch (be_gas_flavour) {
354 case GAS_FLAVOUR_NORMAL:
355 be_emit_cstring(env, "\t.type\t");
356 be_emit_string(env, name);
357 be_emit_cstring(env, ", @function\n");
358 be_emit_write_line(env);
360 case GAS_FLAVOUR_MINGW:
361 be_emit_cstring(env, "\t.def\t");
362 be_emit_string(env, name);
363 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
364 be_emit_write_line(env);
372 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
374 switch (be_gas_flavour) {
375 case GAS_FLAVOUR_NORMAL:
376 be_emit_cstring(env, "\t.size\t");
377 be_emit_string(env, name);
378 be_emit_cstring(env, ", .-");
379 be_emit_string(env, name);
380 be_emit_char(env, '\n');
381 be_emit_write_line(env);
391 * Emits registers and/or address mode of a binary operation.
393 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
394 switch(get_ia32_op_type(node)) {
396 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
397 ia32_emit_immediate(env, node);
398 be_emit_cstring(env, ", ");
399 ia32_emit_source_register(env, node, 2);
401 const arch_register_t *in1 = get_in_reg(env, node, 2);
402 const arch_register_t *in2 = get_in_reg(env, node, 3);
403 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
404 const arch_register_t *in;
407 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
408 out = out ? out : in1;
409 in_name = arch_register_get_name(in);
411 if (is_ia32_emit_cl(node)) {
412 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
416 be_emit_char(env, '%');
417 be_emit_string(env, in_name);
418 be_emit_cstring(env, ", %");
419 be_emit_string(env, arch_register_get_name(out));
423 ia32_emit_am(env, node);
424 be_emit_cstring(env, ", ");
425 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
426 assert(!produces_result(node) && "Source AM with Const must not produce result");
427 ia32_emit_immediate(env, node);
428 } else if (produces_result(node)) {
429 ia32_emit_dest_register(env, node, 0);
431 ia32_emit_source_register(env, node, 2);
435 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
436 ia32_emit_immediate(env, node);
437 be_emit_cstring(env, ", ");
438 ia32_emit_am(env, node);
440 const arch_register_t *in1 = get_in_reg(env, node,
441 get_irn_arity(node) == 5 ? 3 : 2);
442 ir_mode *mode = get_ia32_ls_mode(node);
445 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
447 if (is_ia32_emit_cl(node)) {
448 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
452 be_emit_char(env, '%');
453 be_emit_string(env, in_name);
454 be_emit_cstring(env, ", ");
455 ia32_emit_am(env, node);
459 assert(0 && "unsupported op type");
464 * Emits registers and/or address mode of a binary operation.
466 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
467 switch(get_ia32_op_type(node)) {
469 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
470 // should not happen...
473 ia32_attr_t *attr = get_ia32_attr(node);
474 const arch_register_t *in1 = attr->x87[0];
475 const arch_register_t *in2 = attr->x87[1];
476 const arch_register_t *out = attr->x87[2];
477 const arch_register_t *in;
479 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
480 out = out ? out : in1;
482 be_emit_char(env, '%');
483 be_emit_string(env, arch_register_get_name(in));
484 be_emit_cstring(env, ", %");
485 be_emit_string(env, arch_register_get_name(out));
490 ia32_emit_am(env, node);
493 assert(0 && "unsupported op type");
498 * Emits registers and/or address mode of a unary operation.
500 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
501 switch(get_ia32_op_type(node)) {
503 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
504 ia32_emit_immediate(env, node);
506 if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
507 ia32_emit_source_register(env, node, 3);
508 } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
509 ia32_emit_source_register(env, node, 4);
510 } else if(is_ia32_Push(node)) {
511 ia32_emit_source_register(env, node, 2);
512 } else if(is_ia32_Pop(node)) {
513 ia32_emit_dest_register(env, node, 1);
515 ia32_emit_dest_register(env, node, 0);
521 ia32_emit_am(env, node);
524 assert(0 && "unsupported op type");
529 * Emits address mode.
531 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
532 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
533 ir_entity *ent = get_ia32_am_sc(node);
534 int offs = get_ia32_am_offs_int(node);
536 /* just to be sure... */
537 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
543 mark_entity_visited(ent);
544 id = get_entity_ld_ident(ent);
545 if (is_ia32_am_sc_sign(node))
546 be_emit_char(env, '-');
547 be_emit_ident(env, id);
549 if(get_entity_owner(ent) == get_tls_type()) {
550 if (get_entity_visibility(ent) == visibility_external_allocated) {
551 be_emit_cstring(env, "@INDNTPOFF");
553 be_emit_cstring(env, "@NTPOFF");
560 be_emit_irprintf(env->emit, "%+d", offs);
562 be_emit_irprintf(env->emit, "%d", offs);
566 if (am_flav & (ia32_B | ia32_I)) {
567 be_emit_char(env, '(');
570 if (am_flav & ia32_B) {
571 ia32_emit_source_register(env, node, 0);
574 /* emit index + scale */
575 if (am_flav & ia32_I) {
576 be_emit_char(env, ',');
577 ia32_emit_source_register(env, node, 1);
579 if (am_flav & ia32_S) {
580 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
583 be_emit_char(env, ')');
587 /*************************************************
590 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
591 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
592 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
593 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
595 *************************************************/
598 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
601 * coding of conditions
603 struct cmp2conditon_t {
609 * positive conditions for signed compares
612 const struct cmp2conditon_t cmp2condition_s[] = {
613 { NULL, pn_Cmp_False }, /* always false */
614 { "e", pn_Cmp_Eq }, /* == */
615 { "l", pn_Cmp_Lt }, /* < */
616 { "le", pn_Cmp_Le }, /* <= */
617 { "g", pn_Cmp_Gt }, /* > */
618 { "ge", pn_Cmp_Ge }, /* >= */
619 { "ne", pn_Cmp_Lg }, /* != */
620 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
621 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
622 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
623 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
624 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
625 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
626 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
627 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
628 { NULL, pn_Cmp_True }, /* always true */
632 * positive conditions for unsigned compares
635 const struct cmp2conditon_t cmp2condition_u[] = {
636 { NULL, pn_Cmp_False }, /* always false */
637 { "e", pn_Cmp_Eq }, /* == */
638 { "b", pn_Cmp_Lt }, /* < */
639 { "be", pn_Cmp_Le }, /* <= */
640 { "a", pn_Cmp_Gt }, /* > */
641 { "ae", pn_Cmp_Ge }, /* >= */
642 { "ne", pn_Cmp_Lg }, /* != */
643 { NULL, pn_Cmp_True }, /* always true */
647 * returns the condition code
650 const char *get_cmp_suffix(int cmp_code)
652 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
653 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
655 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
656 return cmp2condition_u[cmp_code & 7].name;
658 return cmp2condition_s[cmp_code & 15].name;
662 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
664 be_emit_string(env, get_cmp_suffix(pnc));
669 * Returns the target block for a control flow node.
672 ir_node *get_cfop_target_block(const ir_node *irn) {
673 return get_irn_link(irn);
677 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
679 be_emit_cstring(env, BLOCK_PREFIX);
680 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
684 * Returns the target label for a control flow node.
687 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
688 ir_node *block = get_cfop_target_block(node);
690 ia32_emit_block_name(env, block);
693 /** Return the next block in Block schedule */
694 static ir_node *next_blk_sched(const ir_node *block) {
695 return get_irn_link(block);
699 * Returns the Proj with projection number proj and NOT mode_M
702 ir_node *get_proj(const ir_node *node, long proj) {
703 const ir_edge_t *edge;
706 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
708 foreach_out_edge(node, edge) {
709 src = get_edge_src_irn(edge);
711 assert(is_Proj(src) && "Proj expected");
712 if (get_irn_mode(src) == mode_M)
715 if (get_Proj_proj(src) == proj)
722 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
725 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
727 const ir_node *proj_true;
728 const ir_node *proj_false;
729 const ir_node *block;
730 const ir_node *next_block;
733 /* get both Proj's */
734 proj_true = get_proj(node, pn_Cond_true);
735 assert(proj_true && "CondJmp without true Proj");
737 proj_false = get_proj(node, pn_Cond_false);
738 assert(proj_false && "CondJmp without false Proj");
740 /* for now, the code works for scheduled and non-schedules blocks */
741 block = get_nodes_block(node);
743 /* we have a block schedule */
744 next_block = next_blk_sched(block);
746 if (get_cfop_target_block(proj_true) == next_block) {
747 /* exchange both proj's so the second one can be omitted */
748 const ir_node *t = proj_true;
750 proj_true = proj_false;
753 pnc = get_negated_pnc(pnc, mode);
756 /* in case of unordered compare, check for parity */
757 if (pnc & pn_Cmp_Uo) {
758 be_emit_cstring(env, "\tjp ");
759 ia32_emit_cfop_target(env, proj_true);
760 be_emit_finish_line_gas(env, proj_true);
763 be_emit_cstring(env, "\tj");
764 ia32_emit_cmp_suffix(env, pnc);
765 be_emit_char(env, ' ');
766 ia32_emit_cfop_target(env, proj_true);
767 be_emit_finish_line_gas(env, proj_true);
769 /* the second Proj might be a fallthrough */
770 if (get_cfop_target_block(proj_false) != next_block) {
771 be_emit_cstring(env, "\tjmp ");
772 ia32_emit_cfop_target(env, proj_false);
773 be_emit_finish_line_gas(env, proj_false);
775 be_emit_cstring(env, "\t/* fallthrough to ");
776 ia32_emit_cfop_target(env, proj_false);
777 be_emit_cstring(env, " */");
778 be_emit_finish_line_gas(env, proj_false);
783 * Emits code for conditional jump.
786 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
787 be_emit_cstring(env, "\tcmp ");
788 ia32_emit_binop(env, node);
789 be_emit_finish_line_gas(env, node);
791 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
795 * Emits code for conditional jump with two variables.
798 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
799 CondJmp_emitter(env, node);
803 * Emits code for conditional test and jump.
806 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
807 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
808 be_emit_cstring(env, "\ttest ");
809 ia32_emit_immediate(env, node);
810 be_emit_cstring(env, ", ");
811 ia32_emit_source_register(env, node, 0);
812 be_emit_finish_line_gas(env, node);
814 be_emit_cstring(env, "\ttest ");
815 ia32_emit_source_register(env, node, 1);
816 be_emit_cstring(env, ", ");
817 ia32_emit_source_register(env, node, 0);
818 be_emit_finish_line_gas(env, node);
820 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
824 * Emits code for conditional test and jump with two variables.
827 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
828 TestJmp_emitter(env, node);
832 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
833 be_emit_cstring(env, "/* omitted redundant test */");
834 be_emit_finish_line_gas(env, node);
836 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
840 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
841 be_emit_cstring(env, "/* omitted redundant test/cmp */");
842 be_emit_finish_line_gas(env, node);
844 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
848 * Emits code for conditional SSE floating point jump with two variables.
851 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
852 be_emit_cstring(env, "\tucomi");
853 ia32_emit_xmm_mode_suffix(env, node);
854 be_emit_char(env, ' ');
855 ia32_emit_binop(env, node);
856 be_emit_finish_line_gas(env, node);
858 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
862 * Emits code for conditional x87 floating point jump with two variables.
865 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
866 ia32_attr_t *attr = get_ia32_attr(node);
867 const char *reg = attr->x87[1]->name;
868 long pnc = get_ia32_pncode(node);
870 switch (get_ia32_irn_opcode(node)) {
871 case iro_ia32_fcomrJmp:
872 pnc = get_inversed_pnc(pnc);
873 reg = attr->x87[0]->name;
874 case iro_ia32_fcomJmp:
876 be_emit_cstring(env, "\tfucom ");
878 case iro_ia32_fcomrpJmp:
879 pnc = get_inversed_pnc(pnc);
880 reg = attr->x87[0]->name;
881 case iro_ia32_fcompJmp:
882 be_emit_cstring(env, "\tfucomp ");
884 case iro_ia32_fcomrppJmp:
885 pnc = get_inversed_pnc(pnc);
886 case iro_ia32_fcomppJmp:
887 be_emit_cstring(env, "\tfucompp ");
893 be_emit_char(env, '%');
894 be_emit_string(env, reg);
896 be_emit_finish_line_gas(env, node);
898 be_emit_cstring(env, "\tfnstsw %ax");
899 be_emit_finish_line_gas(env, node);
900 be_emit_cstring(env, "\tsahf");
901 be_emit_finish_line_gas(env, node);
903 finish_CondJmp(env, node, mode_E, pnc);
907 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
908 long pnc = get_ia32_pncode(node);
909 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
910 int idx_left = 2 - is_PsiCondCMov;
911 int idx_right = 3 - is_PsiCondCMov;
912 const arch_register_t *in1, *in2, *out;
914 out = arch_get_irn_register(env->arch_env, node);
915 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
916 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
918 /* we have to emit the cmp first, because the destination register */
919 /* could be one of the compare registers */
920 if (is_ia32_CmpCMov(node)) {
921 be_emit_cstring(env, "\tcmp ");
922 ia32_emit_source_register(env, node, 1);
923 be_emit_cstring(env, ", ");
924 ia32_emit_source_register(env, node, 0);
925 } else if (is_ia32_xCmpCMov(node)) {
926 be_emit_cstring(env, "\tucomis");
927 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
928 be_emit_char(env, ' ');
929 ia32_emit_source_register(env, node, 1);
930 be_emit_cstring(env, ", ");
931 ia32_emit_source_register(env, node, 0);
932 } else if (is_PsiCondCMov) {
933 /* omit compare because flags are already set by And/Or */
934 be_emit_cstring(env, "\ttest ");
935 ia32_emit_source_register(env, node, 0);
936 be_emit_cstring(env, ", ");
937 ia32_emit_source_register(env, node, 0);
939 assert(0 && "unsupported CMov");
941 be_emit_finish_line_gas(env, node);
943 if (REGS_ARE_EQUAL(out, in2)) {
944 /* best case: default in == out -> do nothing */
945 } else if (REGS_ARE_EQUAL(out, in1)) {
946 ir_node *n = (ir_node*) node;
947 /* true in == out -> need complement compare and exchange true and default in */
948 ir_node *t = get_irn_n(n, idx_left);
949 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
950 set_irn_n(n, idx_right, t);
952 pnc = get_negated_pnc(pnc, get_irn_mode(node));
954 /* out is different from in: need copy default -> out */
955 if (is_PsiCondCMov) {
956 be_emit_cstring(env, "\tmovl ");
957 ia32_emit_dest_register(env, node, 2);
958 be_emit_cstring(env, ", ");
959 ia32_emit_dest_register(env, node, 0);
961 be_emit_cstring(env, "\tmovl ");
962 ia32_emit_source_register(env, node, 3);
963 be_emit_cstring(env, ", ");
964 ia32_emit_dest_register(env, node, 0);
966 be_emit_finish_line_gas(env, node);
969 if (is_PsiCondCMov) {
970 be_emit_cstring(env, "\tcmov");
971 ia32_emit_cmp_suffix(env, pnc);
972 be_emit_cstring(env, "l ");
973 ia32_emit_source_register(env, node, 1);
974 be_emit_cstring(env, ", ");
975 ia32_emit_dest_register(env, node, 0);
977 be_emit_cstring(env, "\tcmov");
978 ia32_emit_cmp_suffix(env, pnc);
979 be_emit_cstring(env, "l ");
980 ia32_emit_source_register(env, node, 2);
981 be_emit_cstring(env, ", ");
982 ia32_emit_dest_register(env, node, 0);
984 be_emit_finish_line_gas(env, node);
988 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
989 CMov_emitter(env, node);
993 void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
994 CMov_emitter(env, node);
998 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
999 CMov_emitter(env, node);
1003 void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
1004 int pnc = get_ia32_pncode(node);
1005 const char *reg8bit;
1006 const arch_register_t *out;
1008 out = arch_get_irn_register(env->arch_env, node);
1009 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1011 if (is_ia32_CmpSet(node)) {
1012 be_emit_cstring(env, "\tcmp ");
1013 ia32_emit_binop(env, node);
1014 } else if (is_ia32_xCmpSet(node)) {
1015 be_emit_cstring(env, "\tucomis");
1016 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1017 be_emit_char(env, ' ');
1018 ia32_emit_binop(env, node);
1019 } else if (is_ia32_PsiCondSet(node)) {
1020 be_emit_cstring(env, "\tcmp $0, ");
1021 ia32_emit_source_register(env, node, 0);
1023 assert(0 && "unsupported Set");
1025 be_emit_finish_line_gas(env, node);
1027 /* use mov to clear target because it doesn't affect the eflags */
1028 be_emit_cstring(env, "\tmovl $0, %");
1029 be_emit_string(env, arch_register_get_name(out));
1030 be_emit_finish_line_gas(env, node);
1032 be_emit_cstring(env, "\tset");
1033 ia32_emit_cmp_suffix(env, pnc);
1034 be_emit_cstring(env, " %");
1035 be_emit_string(env, reg8bit);
1036 be_emit_finish_line_gas(env, node);
1040 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1041 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1045 void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
1046 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
1050 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1051 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1055 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1057 long pnc = get_ia32_pncode(node);
1058 long unord = pnc & pn_Cmp_Uo;
1060 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1063 case pn_Cmp_Leg: /* odered */
1066 case pn_Cmp_Uo: /* unordered */
1070 case pn_Cmp_Eq: /* == */
1074 case pn_Cmp_Lt: /* < */
1078 case pn_Cmp_Le: /* <= */
1082 case pn_Cmp_Gt: /* > */
1086 case pn_Cmp_Ge: /* >= */
1090 case pn_Cmp_Lg: /* != */
1095 assert(sse_pnc >= 0 && "unsupported compare");
1097 if (unord && sse_pnc != 3) {
1099 We need a separate compare against unordered.
1100 Quick and Dirty solution:
1101 - get some memory on stack
1105 - and result and stored result
1108 be_emit_cstring(env, "\tsubl $8, %esp");
1109 be_emit_finish_line_gas(env, node);
1111 be_emit_cstring(env, "\tcmpsd $3, ");
1112 ia32_emit_binop(env, node);
1113 be_emit_finish_line_gas(env, node);
1115 be_emit_cstring(env, "\tmovsd ");
1116 ia32_emit_dest_register(env, node, 0);
1117 be_emit_cstring(env, ", (%esp)");
1118 be_emit_finish_line_gas(env, node);
1121 be_emit_cstring(env, "\tcmpsd ");
1122 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1123 ia32_emit_binop(env, node);
1124 be_emit_finish_line_gas(env, node);
1126 if (unord && sse_pnc != 3) {
1127 be_emit_cstring(env, "\tandpd (%esp), ");
1128 ia32_emit_dest_register(env, node, 0);
1129 be_emit_finish_line_gas(env, node);
1131 be_emit_cstring(env, "\taddl $8, %esp");
1132 be_emit_finish_line_gas(env, node);
1136 /*********************************************************
1139 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1140 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1141 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1142 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1145 *********************************************************/
1147 /* jump table entry (target and corresponding number) */
1148 typedef struct _branch_t {
1153 /* jump table for switch generation */
1154 typedef struct _jmp_tbl_t {
1155 ir_node *defProj; /**< default target */
1156 int min_value; /**< smallest switch case */
1157 int max_value; /**< largest switch case */
1158 int num_branches; /**< number of jumps */
1159 char *label; /**< label of the jump table */
1160 branch_t *branches; /**< jump array */
1164 * Compare two variables of type branch_t. Used to sort all switch cases
1167 int ia32_cmp_branch_t(const void *a, const void *b) {
1168 branch_t *b1 = (branch_t *)a;
1169 branch_t *b2 = (branch_t *)b;
1171 if (b1->value <= b2->value)
1178 * Emits code for a SwitchJmp (creates a jump table if
1179 * possible otherwise a cmp-jmp cascade). Port from
1183 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1184 unsigned long interval;
1189 const ir_edge_t *edge;
1191 /* fill the table structure */
1192 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1193 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1195 tbl.num_branches = get_irn_n_edges(node);
1196 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1197 tbl.min_value = INT_MAX;
1198 tbl.max_value = INT_MIN;
1201 /* go over all proj's and collect them */
1202 foreach_out_edge(node, edge) {
1203 proj = get_edge_src_irn(edge);
1204 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1206 pnc = get_Proj_proj(proj);
1208 /* create branch entry */
1209 tbl.branches[i].target = proj;
1210 tbl.branches[i].value = pnc;
1212 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1213 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1215 /* check for default proj */
1216 if (pnc == get_ia32_pncode(node)) {
1217 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1224 /* sort the branches by their number */
1225 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1227 /* two-complement's magic make this work without overflow */
1228 interval = tbl.max_value - tbl.min_value;
1230 /* emit the table */
1231 be_emit_cstring(env, "\tcmpl $");
1232 be_emit_irprintf(env->emit, "%u, ", interval);
1233 ia32_emit_source_register(env, node, 0);
1234 be_emit_finish_line_gas(env, node);
1236 be_emit_cstring(env, "\tja ");
1237 ia32_emit_cfop_target(env, tbl.defProj);
1238 be_emit_finish_line_gas(env, node);
1240 if (tbl.num_branches > 1) {
1242 be_emit_cstring(env, "\tjmp *");
1243 be_emit_string(env, tbl.label);
1244 be_emit_cstring(env, "(,");
1245 ia32_emit_source_register(env, node, 0);
1246 be_emit_cstring(env, ",4)");
1247 be_emit_finish_line_gas(env, node);
1249 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1250 be_emit_cstring(env, "\t.align 4\n");
1251 be_emit_write_line(env);
1253 be_emit_string(env, tbl.label);
1254 be_emit_cstring(env, ":\n");
1255 be_emit_write_line(env);
1257 be_emit_cstring(env, ".long ");
1258 ia32_emit_cfop_target(env, tbl.branches[0].target);
1259 be_emit_finish_line_gas(env, NULL);
1261 last_value = tbl.branches[0].value;
1262 for (i = 1; i < tbl.num_branches; ++i) {
1263 while (++last_value < tbl.branches[i].value) {
1264 be_emit_cstring(env, ".long ");
1265 ia32_emit_cfop_target(env, tbl.defProj);
1266 be_emit_finish_line_gas(env, NULL);
1268 be_emit_cstring(env, ".long ");
1269 ia32_emit_cfop_target(env, tbl.branches[i].target);
1270 be_emit_finish_line_gas(env, NULL);
1272 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1274 /* one jump is enough */
1275 be_emit_cstring(env, "\tjmp ");
1276 ia32_emit_cfop_target(env, tbl.branches[0].target);
1277 be_emit_finish_line_gas(env, node);
1287 * Emits code for a unconditional jump.
1290 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1291 ir_node *block, *next_block;
1293 /* for now, the code works for scheduled and non-schedules blocks */
1294 block = get_nodes_block(node);
1296 /* we have a block schedule */
1297 next_block = next_blk_sched(block);
1298 if (get_cfop_target_block(node) != next_block) {
1299 be_emit_cstring(env, "\tjmp ");
1300 ia32_emit_cfop_target(env, node);
1302 be_emit_cstring(env, "\t/* fallthrough to ");
1303 ia32_emit_cfop_target(env, node);
1304 be_emit_cstring(env, " */");
1306 be_emit_finish_line_gas(env, node);
1309 /**********************************
1312 * | | ___ _ __ _ _| |_) |
1313 * | | / _ \| '_ \| | | | _ <
1314 * | |___| (_) | |_) | |_| | |_) |
1315 * \_____\___/| .__/ \__, |____/
1318 **********************************/
1321 * Emit movsb/w instructions to make mov count divideable by 4
1324 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1325 be_emit_cstring(env, "\tcld");
1326 be_emit_finish_line_gas(env, NULL);
1330 be_emit_cstring(env, "\tmovsb");
1331 be_emit_finish_line_gas(env, NULL);
1334 be_emit_cstring(env, "\tmovsw");
1335 be_emit_finish_line_gas(env, NULL);
1338 be_emit_cstring(env, "\tmovsb");
1339 be_emit_finish_line_gas(env, NULL);
1340 be_emit_cstring(env, "\tmovsw");
1341 be_emit_finish_line_gas(env, NULL);
1347 * Emit rep movsd instruction for memcopy.
1350 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1351 tarval *tv = get_ia32_Immop_tarval(node);
1352 int rem = get_tarval_long(tv);
1354 emit_CopyB_prolog(env, rem);
1356 be_emit_cstring(env, "\trep movsd");
1357 be_emit_finish_line_gas(env, node);
1361 * Emits unrolled memcopy.
1364 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1365 tarval *tv = get_ia32_Immop_tarval(node);
1366 int size = get_tarval_long(tv);
1368 emit_CopyB_prolog(env, size & 0x3);
1372 be_emit_cstring(env, "\tmovsd");
1373 be_emit_finish_line_gas(env, NULL);
1379 /***************************
1383 * | | / _ \| '_ \ \ / /
1384 * | |___| (_) | | | \ V /
1385 * \_____\___/|_| |_|\_/
1387 ***************************/
1390 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1393 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1394 ir_mode *ls_mode = get_ia32_ls_mode(node);
1395 int ls_bits = get_mode_size_bits(ls_mode);
1397 be_emit_cstring(env, "\tcvt");
1399 if(is_ia32_Conv_I2FP(node)) {
1401 be_emit_cstring(env, "si2ss");
1403 be_emit_cstring(env, "si2sd");
1405 } else if(is_ia32_Conv_FP2I(node)) {
1407 be_emit_cstring(env, "ss2si");
1409 be_emit_cstring(env, "sd2si");
1412 assert(is_ia32_Conv_FP2FP(node));
1414 be_emit_cstring(env, "sd2ss");
1416 be_emit_cstring(env, "ss2sd");
1419 be_emit_char(env, ' ');
1421 switch(get_ia32_op_type(node)) {
1423 ia32_emit_source_register(env, node, 2);
1424 be_emit_cstring(env, ", ");
1425 ia32_emit_dest_register(env, node, 0);
1427 case ia32_AddrModeS:
1428 ia32_emit_dest_register(env, node, 0);
1429 be_emit_cstring(env, ", ");
1430 ia32_emit_am(env, node);
1433 assert(0 && "unsupported op type for Conv");
1435 be_emit_finish_line_gas(env, node);
1439 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1440 emit_ia32_Conv_with_FP(env, node);
1444 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1445 emit_ia32_Conv_with_FP(env, node);
1449 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1450 emit_ia32_Conv_with_FP(env, node);
1454 * Emits code for an Int conversion.
1457 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1458 const char *sign_suffix;
1459 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1460 int smaller_bits = get_mode_size_bits(smaller_mode);
1462 const arch_register_t *in_reg, *out_reg;
1464 assert(!mode_is_float(smaller_mode));
1465 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1467 signed_mode = mode_is_signed(smaller_mode);
1468 if(smaller_bits == 32) {
1469 // this should not happen as it's no convert
1473 sign_suffix = signed_mode ? "s" : "z";
1476 switch(get_ia32_op_type(node)) {
1478 in_reg = get_in_reg(env, node, 2);
1479 out_reg = get_out_reg(env, node, 0);
1481 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1482 REGS_ARE_EQUAL(out_reg, in_reg) &&
1485 /* argument and result are both in EAX and */
1486 /* signedness is ok: -> use converts */
1487 if (smaller_bits == 8) {
1488 be_emit_cstring(env, "\tcbtw");
1489 } else if (smaller_bits == 16) {
1490 be_emit_cstring(env, "\tcwtl");
1494 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1495 /* argument and result are in the same register */
1496 /* and signedness is ok: -> use and with mask */
1497 int mask = (1 << smaller_bits) - 1;
1498 be_emit_cstring(env, "\tandl $0x");
1499 be_emit_irprintf(env->emit, "%x, ", mask);
1500 ia32_emit_dest_register(env, node, 0);
1502 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1504 be_emit_cstring(env, "\tmov");
1505 be_emit_string(env, sign_suffix);
1506 ia32_emit_mode_suffix_mode(env, smaller_mode);
1507 be_emit_cstring(env, "l %");
1508 be_emit_string(env, sreg);
1509 be_emit_cstring(env, ", ");
1510 ia32_emit_dest_register(env, node, 0);
1513 case ia32_AddrModeS: {
1514 be_emit_cstring(env, "\tmov");
1515 be_emit_string(env, sign_suffix);
1516 ia32_emit_mode_suffix_mode(env, smaller_mode);
1517 be_emit_cstring(env, "l %");
1518 ia32_emit_am(env, node);
1519 be_emit_cstring(env, ", ");
1520 ia32_emit_dest_register(env, node, 0);
1524 assert(0 && "unsupported op type for Conv");
1526 be_emit_finish_line_gas(env, node);
1530 * Emits code for an 8Bit Int conversion.
1532 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1533 emit_ia32_Conv_I2I(env, node);
1537 /*******************************************
1540 * | |__ ___ _ __ ___ __| | ___ ___
1541 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1542 * | |_) | __/ | | | (_) | (_| | __/\__ \
1543 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1545 *******************************************/
1548 * Emits a backend call
1551 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1552 ir_entity *ent = be_Call_get_entity(node);
1554 be_emit_cstring(env, "\tcall ");
1556 mark_entity_visited(ent);
1557 be_emit_string(env, get_entity_ld_name(ent));
1559 be_emit_char(env, '*');
1560 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1562 be_emit_finish_line_gas(env, node);
1566 * Emits code to increase stack pointer.
1569 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1570 int offs = be_get_IncSP_offset(node);
1576 be_emit_cstring(env, "\tsubl $");
1577 be_emit_irprintf(env->emit, "%u, ", offs);
1578 ia32_emit_source_register(env, node, 0);
1580 be_emit_cstring(env, "\taddl $");
1581 be_emit_irprintf(env->emit, "%u, ", -offs);
1582 ia32_emit_source_register(env, node, 0);
1584 be_emit_finish_line_gas(env, node);
1588 * Emits code to set stack pointer.
1591 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1592 be_emit_cstring(env, "\tmovl ");
1593 ia32_emit_source_register(env, node, 2);
1594 be_emit_cstring(env, ", ");
1595 ia32_emit_dest_register(env, node, 0);
1596 be_emit_finish_line_gas(env, node);
1600 * Emits code for Copy/CopyKeep.
1603 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1605 const arch_env_t *aenv = env->arch_env;
1608 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1609 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1612 mode = get_irn_mode(node);
1613 if (mode == mode_E) {
1614 be_emit_cstring(env, "\tmovsd ");
1615 ia32_emit_source_register(env, node, 0);
1616 be_emit_cstring(env, ", ");
1617 ia32_emit_dest_register(env, node, 0);
1619 be_emit_cstring(env, "\tmovl ");
1620 ia32_emit_source_register(env, node, 0);
1621 be_emit_cstring(env, ", ");
1622 ia32_emit_dest_register(env, node, 0);
1624 be_emit_finish_line_gas(env, node);
1628 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1629 Copy_emitter(env, node, be_get_Copy_op(node));
1633 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1634 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1638 * Emits code for exchange.
1641 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1642 const arch_register_t *in1, *in2;
1643 const arch_register_class_t *cls1, *cls2;
1645 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1646 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1648 cls1 = arch_register_get_class(in1);
1649 cls2 = arch_register_get_class(in2);
1651 assert(cls1 == cls2 && "Register class mismatch at Perm");
1653 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1654 be_emit_cstring(env, "\txchg ");
1655 ia32_emit_source_register(env, node, 1);
1656 be_emit_cstring(env, ", ");
1657 ia32_emit_source_register(env, node, 0);
1658 be_emit_finish_line_gas(env, node);
1659 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1660 be_emit_cstring(env, "\txorpd ");
1661 ia32_emit_source_register(env, node, 1);
1662 be_emit_cstring(env, ", ");
1663 ia32_emit_source_register(env, node, 0);
1664 be_emit_finish_line_gas(env, NULL);
1666 be_emit_cstring(env, "\txorpd ");
1667 ia32_emit_source_register(env, node, 0);
1668 be_emit_cstring(env, ", ");
1669 ia32_emit_source_register(env, node, 1);
1670 be_emit_finish_line_gas(env, NULL);
1672 be_emit_cstring(env, "\txorpd ");
1673 ia32_emit_source_register(env, node, 1);
1674 be_emit_cstring(env, ", ");
1675 ia32_emit_source_register(env, node, 0);
1676 be_emit_finish_line_gas(env, node);
1677 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1679 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1685 * Emits code for Constant loading.
1688 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1689 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1691 if (imm_tp == ia32_ImmSymConst) {
1692 be_emit_cstring(env, "\tmovl ");
1693 ia32_emit_immediate(env, node);
1694 be_emit_cstring(env, ", ");
1695 ia32_emit_dest_register(env, node, 0);
1697 tarval *tv = get_ia32_Immop_tarval(node);
1698 assert(get_irn_mode(node) == mode_Iu);
1699 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1700 if (tarval_is_null(tv)) {
1701 if (env->isa->opt_arch == arch_pentium_4) {
1702 /* P4 prefers sub r, r, others xor r, r */
1703 be_emit_cstring(env, "\tsubl ");
1705 be_emit_cstring(env, "\txorl ");
1707 ia32_emit_dest_register(env, node, 0);
1708 be_emit_cstring(env, ", ");
1709 ia32_emit_dest_register(env, node, 0);
1711 be_emit_cstring(env, "\tmovl ");
1712 ia32_emit_immediate(env, node);
1713 be_emit_cstring(env, ", ");
1714 ia32_emit_dest_register(env, node, 0);
1717 be_emit_finish_line_gas(env, node);
1721 * Emits code to load the TLS base
1724 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1725 be_emit_cstring(env, "\tmovl %gs:0, ");
1726 ia32_emit_dest_register(env, node, 0);
1727 be_emit_finish_line_gas(env, node);
1731 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1732 be_emit_cstring(env, "\tret");
1733 be_emit_finish_line_gas(env, node);
1737 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1741 /***********************************************************************************
1744 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1745 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1746 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1747 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1749 ***********************************************************************************/
1752 * Enters the emitter functions for handled nodes into the generic
1753 * pointer of an opcode.
1756 void ia32_register_emitters(void) {
1758 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1759 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1760 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1761 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1762 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1763 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1765 /* first clear the generic function pointer for all ops */
1766 clear_irp_opcodes_generic_func();
1768 /* register all emitter functions defined in spec */
1769 ia32_register_spec_emitters();
1771 /* other ia32 emitter functions */
1777 IA32_EMIT(PsiCondCMov);
1779 IA32_EMIT(PsiCondSet);
1780 IA32_EMIT(SwitchJmp);
1783 IA32_EMIT(Conv_I2FP);
1784 IA32_EMIT(Conv_FP2I);
1785 IA32_EMIT(Conv_FP2FP);
1786 IA32_EMIT(Conv_I2I);
1787 IA32_EMIT(Conv_I2I8Bit);
1792 IA32_EMIT(xCmpCMov);
1793 IA32_EMIT(xCondJmp);
1794 IA32_EMIT2(fcomJmp, x87CondJmp);
1795 IA32_EMIT2(fcompJmp, x87CondJmp);
1796 IA32_EMIT2(fcomppJmp, x87CondJmp);
1797 IA32_EMIT2(fcomrJmp, x87CondJmp);
1798 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1799 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1801 /* benode emitter */
1827 static const char *last_name = NULL;
1828 static unsigned last_line = -1;
1829 static unsigned num = -1;
1832 * Emit the debug support for node node.
1835 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1836 dbg_info *db = get_irn_dbg_info(node);
1838 const char *fname = be_retrieve_dbg_info(db, &lineno);
1840 if (! env->cg->birg->main_env->options->stabs_debug_support)
1844 if (last_name != fname) {
1846 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1849 if (last_line != lineno) {
1852 snprintf(name, sizeof(name), ".LM%u", ++num);
1854 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1855 be_emit_string(env, name);
1856 be_emit_cstring(env, ":\n");
1857 be_emit_write_line(env);
1862 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1865 * Emits code for a node.
1868 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1869 ir_op *op = get_irn_op(node);
1871 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
1873 if (op->ops.generic) {
1874 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1875 ia32_emit_dbg(env, node);
1876 (*func) (env, node);
1878 emit_Nothing(env, node);
1879 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1884 * Emits gas alignment directives
1887 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1888 be_emit_cstring(env, "\t.p2align ");
1889 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
1890 be_emit_write_line(env);
1894 * Emits gas alignment directives for Functions depended on cpu architecture.
1897 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1899 unsigned maximum_skip;
1914 maximum_skip = (1 << align) - 1;
1915 ia32_emit_alignment(env, align, maximum_skip);
1919 * Emits gas alignment directives for Labels depended on cpu architecture.
1922 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1923 unsigned align; unsigned maximum_skip;
1938 maximum_skip = (1 << align) - 1;
1939 ia32_emit_alignment(env, align, maximum_skip);
1943 * Test wether a block should be aligned.
1944 * For cpus in the P4/Athlon class it is usefull to align jump labels to
1945 * 16 bytes. However we should only do that if the alignment nops before the
1946 * label aren't executed more often than we have jumps to the label.
1949 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
1950 static const double DELTA = .0001;
1951 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1953 double prev_freq = 0; /**< execfreq of the fallthrough block */
1954 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
1955 cpu_support cpu = env->isa->opt_arch;
1958 if(exec_freq == NULL)
1960 if(cpu == arch_i386 || cpu == arch_i486)
1963 block_freq = get_block_execfreq(exec_freq, block);
1964 if(block_freq < DELTA)
1967 n_cfgpreds = get_Block_n_cfgpreds(block);
1968 for(i = 0; i < n_cfgpreds; ++i) {
1969 ir_node *pred = get_Block_cfgpred_block(block, i);
1970 double pred_freq = get_block_execfreq(exec_freq, pred);
1973 prev_freq += pred_freq;
1975 jmp_freq += pred_freq;
1979 if(prev_freq < DELTA && !(jmp_freq < DELTA))
1982 jmp_freq /= prev_freq;
1986 case arch_athlon_64:
1988 return jmp_freq > 3;
1990 return jmp_freq > 2;
1995 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
2000 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2003 n_cfgpreds = get_Block_n_cfgpreds(block);
2004 if (n_cfgpreds == 0) {
2006 } else if (n_cfgpreds == 1) {
2007 ir_node *pred = get_Block_cfgpred(block, 0);
2008 ir_node *pred_block = get_nodes_block(pred);
2010 /* we don't need labels for fallthrough blocks, however switch-jmps
2011 * are no fallthoughs */
2012 if(pred_block == prev &&
2013 !(is_Proj(pred) && is_ia32_SwitchJmp(get_Proj_pred(pred)))) {
2022 if (should_align_block(env, block, prev)) {
2024 ia32_emit_align_label(env, env->isa->opt_arch);
2028 ia32_emit_block_name(env, block);
2029 be_emit_char(env, ':');
2031 be_emit_pad_comment(env);
2032 be_emit_cstring(env, " /* preds:");
2034 /* emit list of pred blocks in comment */
2035 arity = get_irn_arity(block);
2036 for (i = 0; i < arity; ++i) {
2037 ir_node *predblock = get_Block_cfgpred_block(block, i);
2038 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2041 if (exec_freq != NULL) {
2042 be_emit_irprintf(env->emit, " freq: %f",
2043 get_block_execfreq(exec_freq, block));
2045 be_emit_cstring(env, " */\n");
2047 be_emit_cstring(env, "\t/* ");
2048 ia32_emit_block_name(env, block);
2049 be_emit_cstring(env, ": */\n");
2051 be_emit_write_line(env);
2055 * Walks over the nodes in a block connected by scheduling edges
2056 * and emits code for each node.
2059 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2061 const ir_node *node;
2063 ia32_emit_block_header(env, block, last_block);
2065 /* emit the contents of the block */
2066 ia32_emit_dbg(env, block);
2067 sched_foreach(block, node) {
2068 ia32_emit_node(env, node);
2073 * Emits code for function start.
2076 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2077 ir_entity *irg_ent = get_irg_entity(irg);
2078 const char *irg_name = get_entity_ld_name(irg_ent);
2079 cpu_support cpu = env->isa->opt_arch;
2080 const be_irg_t *birg = env->cg->birg;
2082 be_emit_write_line(env);
2083 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2084 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2085 ia32_emit_align_func(env, cpu);
2086 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2087 be_emit_cstring(env, ".global ");
2088 be_emit_string(env, irg_name);
2089 be_emit_char(env, '\n');
2090 be_emit_write_line(env);
2092 ia32_emit_function_object(env, irg_name);
2093 be_emit_string(env, irg_name);
2094 be_emit_cstring(env, ":\n");
2095 be_emit_write_line(env);
2099 * Emits code for function end
2102 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2103 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2104 const be_irg_t *birg = env->cg->birg;
2106 ia32_emit_function_size(env, irg_name);
2107 be_dbg_method_end(birg->main_env->db_handle);
2108 be_emit_char(env, '\n');
2109 be_emit_write_line(env);
2114 * Sets labels for control flow nodes (jump target)
2117 void ia32_gen_labels(ir_node *block, void *data) {
2119 int n = get_Block_n_cfgpreds(block);
2121 for (n--; n >= 0; n--) {
2122 pred = get_Block_cfgpred(block, n);
2123 set_irn_link(pred, block);
2128 * Main driver. Emits the code for one routine.
2130 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2131 ia32_emit_env_t env;
2133 ir_node *last_block = NULL;
2136 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2137 env.emit = &env.isa->emit;
2138 env.arch_env = cg->arch_env;
2141 ia32_register_emitters();
2143 ia32_emit_func_prolog(&env, irg);
2144 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2146 n = ARR_LEN(cg->blk_sched);
2147 for (i = 0; i < n;) {
2150 block = cg->blk_sched[i];
2152 next_bl = i < n ? cg->blk_sched[i] : NULL;
2154 /* set here the link. the emitter expects to find the next block here */
2155 set_irn_link(block, next_bl);
2156 ia32_gen_block(&env, block, last_block);
2160 ia32_emit_func_epilog(&env, irg);
2163 void ia32_init_emitter(void)
2165 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");