2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 if(reg == &ia32_gp_regs[REG_GP_NOREG])
90 panic("trying to emit noreg");
92 /* in case of unknown register: just return a valid register */
93 if (reg == &ia32_gp_regs[REG_GP_UKNWN]) {
94 const arch_register_req_t *req;
96 /* ask for the requirements */
97 req = arch_get_register_req(arch_env, irn, pos);
99 if (arch_register_req_is(req, limited)) {
100 /* in case of limited requirements: get the first allowed register */
101 unsigned idx = rbitset_next(req->limited, 0, 1);
102 reg = arch_register_for_index(req->cls, idx);
104 /* otherwise get first register in class */
105 reg = arch_register_for_index(req->cls, 0);
113 * Returns the register at out position pos.
116 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
119 const arch_env_t *arch_env = env->arch_env;
121 const arch_register_t *reg = NULL;
123 /* 1st case: irn is not of mode_T, so it has only */
124 /* one OUT register -> good */
125 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
126 /* Proj with the corresponding projnum for the register */
128 if (get_irn_mode(irn) != mode_T) {
129 reg = arch_get_irn_register(arch_env, irn);
130 } else if (is_ia32_irn(irn)) {
131 reg = get_ia32_out_reg(irn, pos);
133 const ir_edge_t *edge;
135 foreach_out_edge(irn, edge) {
136 proj = get_edge_src_irn(edge);
137 assert(is_Proj(proj) && "non-Proj from mode_T node");
138 if (get_Proj_proj(proj) == pos) {
139 reg = arch_get_irn_register(arch_env, proj);
145 assert(reg && "no out register found");
150 * Determine the gnu assembler suffix that indicates a mode
153 char get_mode_suffix(const ir_mode *mode) {
154 if(mode_is_float(mode)) {
155 switch(get_mode_size_bits(mode)) {
165 assert(mode_is_int(mode) || mode_is_reference(mode));
166 switch(get_mode_size_bits(mode)) {
177 panic("Can't output mode_suffix for %+F\n", mode);
181 int produces_result(const ir_node *node) {
183 !is_ia32_CmpSet(node) &&
184 !is_ia32_CondJmp(node) &&
186 !is_ia32_SwitchJmp(node) &&
187 !is_ia32_TestJmp(node) &&
188 !is_ia32_xCmpSet(node) &&
189 !is_ia32_xCondJmp(node) &&
190 !is_ia32_CmpCMov(node) &&
191 !is_ia32_TestCMov(node) &&
192 !is_ia32_CmpSet(node) && /* this is correct, the Cmp has no result */
193 !is_ia32_TestSet(node);
197 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
198 const arch_register_t *reg) {
199 switch(get_mode_size_bits(mode)) {
201 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
203 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
205 return (char *)arch_register_get_name(reg);
210 * Add a number to a prefix. This number will not be used a second time.
213 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
214 static unsigned long id = 0;
215 snprintf(buf, buflen, "%s%lu", prefix, ++id);
219 /*************************************************************
221 * (_) | | / _| | | | |
222 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
223 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
224 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
225 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
228 *************************************************************/
230 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
231 // be_emit_env_t* so we cheat a bit...
232 #define be_emit_char(env,c) be_emit_char(env->emit,c)
233 #define be_emit_string(env,s) be_emit_string(env->emit,s)
234 #undef be_emit_cstring
235 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
236 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
237 #define be_emit_tarval(env,tv) be_emit_tarval(env->emit,tv)
238 #define be_emit_write_line(env) be_emit_write_line(env->emit)
239 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
240 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
242 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
244 const arch_register_t *reg = get_in_reg(env, node, pos);
245 const char *reg_name = arch_register_get_name(reg);
247 assert(pos < get_irn_arity(node));
249 be_emit_char(env, '%');
250 be_emit_string(env, reg_name);
253 void ia32_emit_8bit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
255 const arch_register_t *reg = get_in_reg(env, node, pos);
256 const char *reg_name = arch_register_get_name(reg);
258 assert(pos < get_irn_arity(node));
260 be_emit_char(env, '%');
261 be_emit_char(env, reg_name[1]);
262 be_emit_char(env, 'l');
265 void ia32_emit_16bit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
267 const arch_register_t *reg = get_in_reg(env, node, pos);
268 const char *reg_name = arch_register_get_name(reg);
270 assert(pos < get_irn_arity(node));
272 be_emit_char(env, '%');
273 be_emit_string(env, ®_name[1]);
276 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
277 const arch_register_t *reg = get_out_reg(env, node, pos);
278 const char *reg_name = arch_register_get_name(reg);
280 be_emit_char(env, '%');
281 be_emit_string(env, reg_name);
284 static void ia32_emit_register(ia32_emit_env_t *env, const arch_register_t *reg)
286 const char *reg_name = arch_register_get_name(reg);
288 be_emit_char(env, '%');
289 be_emit_string(env, reg_name);
292 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
294 const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
297 be_emit_char(env, '%');
298 be_emit_string(env, attr->x87[pos]->name);
301 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
307 be_emit_char(env, '$');
309 switch(get_ia32_immop_type(node)) {
311 tv = get_ia32_Immop_tarval(node);
312 be_emit_tarval(env, tv);
314 case ia32_ImmSymConst:
315 ent = get_ia32_Immop_symconst(node);
316 set_entity_backend_marked(ent, 1);
317 id = get_entity_ld_ident(ent);
318 be_emit_ident(env, id);
325 be_emit_string(env, "BAD");
330 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
332 be_emit_char(env, get_mode_suffix(mode));
335 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
337 ir_mode *mode = get_ia32_ls_mode(node);
341 ia32_emit_mode_suffix_mode(env, mode);
344 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
346 ir_mode *mode = get_ia32_ls_mode(node);
348 ia32_emit_mode_suffix_mode(env, mode);
352 char get_xmm_mode_suffix(ir_mode *mode)
354 assert(mode_is_float(mode));
355 switch(get_mode_size_bits(mode)) {
366 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
368 ir_mode *mode = get_ia32_ls_mode(node);
369 assert(mode != NULL);
370 be_emit_char(env, 's');
371 be_emit_char(env, get_xmm_mode_suffix(mode));
374 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
376 ir_mode *mode = get_ia32_ls_mode(node);
377 assert(mode != NULL);
378 be_emit_char(env, get_xmm_mode_suffix(mode));
381 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
383 if(get_mode_size_bits(mode) == 32)
385 if(mode_is_signed(mode)) {
386 be_emit_char(env, 's');
388 be_emit_char(env, 'z');
393 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
395 switch (be_gas_flavour) {
396 case GAS_FLAVOUR_NORMAL:
397 be_emit_cstring(env, "\t.type\t");
398 be_emit_string(env, name);
399 be_emit_cstring(env, ", @function\n");
400 be_emit_write_line(env);
402 case GAS_FLAVOUR_MINGW:
403 be_emit_cstring(env, "\t.def\t");
404 be_emit_string(env, name);
405 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
406 be_emit_write_line(env);
414 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
416 switch (be_gas_flavour) {
417 case GAS_FLAVOUR_NORMAL:
418 be_emit_cstring(env, "\t.size\t");
419 be_emit_string(env, name);
420 be_emit_cstring(env, ", .-");
421 be_emit_string(env, name);
422 be_emit_char(env, '\n');
423 be_emit_write_line(env);
432 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node);
435 * Emits registers and/or address mode of a binary operation.
437 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
439 const ir_node *right_op = get_irn_n(node, 3);
441 switch(get_ia32_op_type(node)) {
443 if(is_ia32_Immediate(right_op)) {
444 emit_ia32_Immediate(env, right_op);
445 be_emit_cstring(env, ", ");
446 ia32_emit_source_register(env, node, 2);
448 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
449 ia32_emit_immediate(env, node);
450 be_emit_cstring(env, ", ");
451 ia32_emit_source_register(env, node, 2);
453 const arch_register_t *in1 = get_in_reg(env, node, 2);
454 const arch_register_t *in2 = get_in_reg(env, node, 3);
455 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
456 const arch_register_t *in;
459 in = out ? ((out == in2) ? in1 : in2) : in2;
460 out = out ? out : in1;
461 in_name = arch_register_get_name(in);
463 if (is_ia32_emit_cl(node)) {
464 assert(in == &ia32_gp_regs[REG_ECX]);
468 be_emit_char(env, '%');
469 be_emit_string(env, in_name);
470 be_emit_cstring(env, ", %");
471 be_emit_string(env, arch_register_get_name(out));
475 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
476 assert(!produces_result(node) &&
477 "Source AM with Const must not produce result");
478 ia32_emit_immediate(env, node);
479 be_emit_cstring(env, ", ");
480 ia32_emit_am(env, node);
481 } else if(is_ia32_Immediate(right_op)) {
482 assert(!produces_result(node) &&
483 "Source AM with Const must not produce result");
485 emit_ia32_Immediate(env, right_op);
486 be_emit_cstring(env, ", ");
487 ia32_emit_am(env, node);
488 } else if (produces_result(node)) {
489 ia32_emit_am(env, node);
490 be_emit_cstring(env, ", ");
491 ia32_emit_dest_register(env, node, 0);
493 ia32_emit_am(env, node);
494 be_emit_cstring(env, ", ");
495 ia32_emit_source_register(env, node, 2);
499 right_pos = get_irn_arity(node) >= 5 ? 3 : 2;
500 right_op = get_irn_n(node, right_pos);
501 if(is_ia32_Immediate(right_op)) {
502 emit_ia32_Immediate(env, right_op);
503 be_emit_cstring(env, ", ");
504 ia32_emit_am(env, node);
506 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
507 ia32_emit_immediate(env, node);
508 be_emit_cstring(env, ", ");
509 ia32_emit_am(env, node);
511 const arch_register_t *in1 = get_in_reg(env, node, right_pos);
512 ir_mode *mode = get_ia32_ls_mode(node);
515 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
517 if (is_ia32_emit_cl(node)) {
518 assert(in1 == &ia32_gp_regs[REG_ECX]);
522 be_emit_char(env, '%');
523 be_emit_string(env, in_name);
524 be_emit_cstring(env, ", ");
525 ia32_emit_am(env, node);
529 assert(0 && "unsupported op type");
534 * Emits registers and/or address mode of a binary operation.
536 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
537 switch(get_ia32_op_type(node)) {
539 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
540 // should not happen...
543 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
544 const arch_register_t *in1 = x87_attr->x87[0];
545 const arch_register_t *in2 = x87_attr->x87[1];
546 const arch_register_t *out = x87_attr->x87[2];
547 const arch_register_t *in;
549 in = out ? ((out == in2) ? in1 : in2) : in2;
550 out = out ? out : in1;
552 be_emit_char(env, '%');
553 be_emit_string(env, arch_register_get_name(in));
554 be_emit_cstring(env, ", %");
555 be_emit_string(env, arch_register_get_name(out));
560 ia32_emit_am(env, node);
563 assert(0 && "unsupported op type");
567 void ia32_emit_am_or_dest_register(ia32_emit_env_t *env, const ir_node *node,
569 if(get_ia32_op_type(node) == ia32_Normal) {
570 ia32_emit_dest_register(env, node, pos);
572 assert(get_ia32_op_type(node) == ia32_AddrModeD);
573 ia32_emit_am(env, node);
578 * Emits registers and/or address mode of a unary operation.
580 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node, int pos) {
583 switch(get_ia32_op_type(node)) {
585 op = get_irn_n(node, pos);
586 if (is_ia32_Immediate(op)) {
587 emit_ia32_Immediate(env, op);
588 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
589 ia32_emit_immediate(env, node);
591 ia32_emit_source_register(env, node, pos);
596 ia32_emit_am(env, node);
599 assert(0 && "unsupported op type");
604 * Emits address mode.
606 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
607 ir_entity *ent = get_ia32_am_sc(node);
608 int offs = get_ia32_am_offs_int(node);
609 ir_node *base = get_irn_n(node, 0);
610 int has_base = !is_ia32_NoReg_GP(base);
611 ir_node *index = get_irn_n(node, 1);
612 int has_index = !is_ia32_NoReg_GP(index);
614 /* just to be sure... */
615 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
621 set_entity_backend_marked(ent, 1);
622 id = get_entity_ld_ident(ent);
623 if (is_ia32_am_sc_sign(node))
624 be_emit_char(env, '-');
625 be_emit_ident(env, id);
627 if(get_entity_owner(ent) == get_tls_type()) {
628 if (get_entity_visibility(ent) == visibility_external_allocated) {
629 be_emit_cstring(env, "@INDNTPOFF");
631 be_emit_cstring(env, "@NTPOFF");
638 be_emit_irprintf(env->emit, "%+d", offs);
640 be_emit_irprintf(env->emit, "%d", offs);
644 if (has_base || has_index) {
645 be_emit_char(env, '(');
649 ia32_emit_source_register(env, node, 0);
652 /* emit index + scale */
655 be_emit_char(env, ',');
656 ia32_emit_source_register(env, node, 1);
658 scale = get_ia32_am_scale(node);
660 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
663 be_emit_char(env, ')');
666 /* special case if nothing is set */
667 if(ent == NULL && offs == 0 && !has_base && !has_index) {
668 be_emit_char(env, '0');
672 /*************************************************
675 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
676 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
677 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
678 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
680 *************************************************/
683 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
686 * coding of conditions
688 struct cmp2conditon_t {
694 * positive conditions for signed compares
697 const struct cmp2conditon_t cmp2condition_s[] = {
698 { NULL, pn_Cmp_False }, /* always false */
699 { "e", pn_Cmp_Eq }, /* == */
700 { "l", pn_Cmp_Lt }, /* < */
701 { "le", pn_Cmp_Le }, /* <= */
702 { "g", pn_Cmp_Gt }, /* > */
703 { "ge", pn_Cmp_Ge }, /* >= */
704 { "ne", pn_Cmp_Lg }, /* != */
705 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
709 * positive conditions for unsigned compares
712 const struct cmp2conditon_t cmp2condition_u[] = {
713 { NULL, pn_Cmp_False }, /* always false */
714 { "e", pn_Cmp_Eq }, /* == */
715 { "b", pn_Cmp_Lt }, /* < */
716 { "be", pn_Cmp_Le }, /* <= */
717 { "a", pn_Cmp_Gt }, /* > */
718 { "ae", pn_Cmp_Ge }, /* >= */
719 { "ne", pn_Cmp_Lg }, /* != */
720 { NULL, pn_Cmp_True }, /* always true */
724 * returns the condition code
727 const char *get_cmp_suffix(pn_Cmp cmp_code)
729 assert( (cmp2condition_s[cmp_code & 7].num) == (cmp_code & 7));
730 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
732 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
733 return cmp2condition_u[cmp_code & 7].name;
735 return cmp2condition_s[cmp_code & 7].name;
739 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
741 be_emit_string(env, get_cmp_suffix(pnc));
746 * Returns the target block for a control flow node.
749 ir_node *get_cfop_target_block(const ir_node *irn) {
750 return get_irn_link(irn);
754 * Emits a block label for the given block.
757 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
759 if (has_Block_label(block)) {
760 be_emit_string(env, be_gas_label_prefix());
761 be_emit_irprintf(env->emit, "%u", (unsigned)get_Block_label(block));
763 be_emit_cstring(env, BLOCK_PREFIX);
764 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
769 * Emits the target label for a control flow node.
772 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
773 ir_node *block = get_cfop_target_block(node);
775 ia32_emit_block_name(env, block);
778 /** Return the next block in Block schedule */
779 static ir_node *next_blk_sched(const ir_node *block) {
780 return get_irn_link(block);
784 * Returns the Proj with projection number proj and NOT mode_M
787 ir_node *get_proj(const ir_node *node, long proj) {
788 const ir_edge_t *edge;
791 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
793 foreach_out_edge(node, edge) {
794 src = get_edge_src_irn(edge);
796 assert(is_Proj(src) && "Proj expected");
797 if (get_irn_mode(src) == mode_M)
800 if (get_Proj_proj(src) == proj)
807 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
810 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
812 const ir_node *proj_true;
813 const ir_node *proj_false;
814 const ir_node *block;
815 const ir_node *next_block;
818 /* get both Proj's */
819 proj_true = get_proj(node, pn_Cond_true);
820 assert(proj_true && "CondJmp without true Proj");
822 proj_false = get_proj(node, pn_Cond_false);
823 assert(proj_false && "CondJmp without false Proj");
825 /* for now, the code works for scheduled and non-schedules blocks */
826 block = get_nodes_block(node);
828 /* we have a block schedule */
829 next_block = next_blk_sched(block);
831 if (get_cfop_target_block(proj_true) == next_block) {
832 /* exchange both proj's so the second one can be omitted */
833 const ir_node *t = proj_true;
835 proj_true = proj_false;
838 pnc = get_negated_pnc(pnc, mode);
841 if (mode_is_float(mode)) {
842 /* Some floating point comparisons require a test of the parity flag, which
843 * indicates that the result is unordered */
846 be_emit_cstring(env, "\tjp ");
847 ia32_emit_cfop_target(env, proj_true);
848 be_emit_finish_line_gas(env, proj_true);
852 be_emit_cstring(env, "\tjnp ");
853 ia32_emit_cfop_target(env, proj_true);
854 be_emit_finish_line_gas(env, proj_true);
860 be_emit_cstring(env, "\tjp ");
861 ia32_emit_cfop_target(env, proj_false);
862 be_emit_finish_line_gas(env, proj_false);
868 be_emit_cstring(env, "\tjp ");
869 ia32_emit_cfop_target(env, proj_true);
870 be_emit_finish_line_gas(env, proj_true);
875 /* The bits set by floating point compares correspond to unsigned
877 pnc |= ia32_pn_Cmp_Unsigned;
882 be_emit_cstring(env, "\tj");
883 ia32_emit_cmp_suffix(env, pnc);
884 be_emit_char(env, ' ');
885 ia32_emit_cfop_target(env, proj_true);
886 be_emit_finish_line_gas(env, proj_true);
889 /* the second Proj might be a fallthrough */
890 if (get_cfop_target_block(proj_false) != next_block) {
891 be_emit_cstring(env, "\tjmp ");
892 ia32_emit_cfop_target(env, proj_false);
893 be_emit_finish_line_gas(env, proj_false);
895 be_emit_cstring(env, "\t/* fallthrough to ");
896 ia32_emit_cfop_target(env, proj_false);
897 be_emit_cstring(env, " */");
898 be_emit_finish_line_gas(env, proj_false);
903 * Emits code for conditional jump.
906 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
907 be_emit_cstring(env, "\tcmp");
908 ia32_emit_mode_suffix(env, node);
909 be_emit_char(env, ' ');
910 ia32_emit_binop(env, node);
911 be_emit_finish_line_gas(env, node);
913 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
917 * Emits code for conditional jump with two variables.
920 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
921 CondJmp_emitter(env, node);
925 * Emits code for conditional test and jump.
928 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
929 be_emit_cstring(env, "\ttest");
930 ia32_emit_mode_suffix(env, node);
931 be_emit_char(env, ' ');
933 ia32_emit_binop(env, node);
934 be_emit_finish_line_gas(env, node);
936 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
940 * Emits code for conditional test and jump with two variables.
943 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
944 TestJmp_emitter(env, node);
948 * Emits code for conditional SSE floating point jump with two variables.
951 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
952 be_emit_cstring(env, "\tucomi");
953 ia32_emit_xmm_mode_suffix(env, node);
954 be_emit_char(env, ' ');
955 ia32_emit_binop(env, node);
956 be_emit_finish_line_gas(env, node);
958 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
962 * Emits code for conditional x87 floating point jump with two variables.
965 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
966 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
967 const char *reg = x87_attr->x87[1]->name;
968 long pnc = get_ia32_pncode(node);
970 switch (get_ia32_irn_opcode(node)) {
971 case iro_ia32_fcomrJmp:
972 pnc = get_inversed_pnc(pnc);
973 reg = x87_attr->x87[0]->name;
974 case iro_ia32_fcomJmp:
976 be_emit_cstring(env, "\tfucom ");
978 case iro_ia32_fcomrpJmp:
979 pnc = get_inversed_pnc(pnc);
980 reg = x87_attr->x87[0]->name;
981 case iro_ia32_fcompJmp:
982 be_emit_cstring(env, "\tfucomp ");
984 case iro_ia32_fcomrppJmp:
985 pnc = get_inversed_pnc(pnc);
986 case iro_ia32_fcomppJmp:
987 be_emit_cstring(env, "\tfucompp ");
993 be_emit_char(env, '%');
994 be_emit_string(env, reg);
996 be_emit_finish_line_gas(env, node);
998 be_emit_cstring(env, "\tfnstsw %ax");
999 be_emit_finish_line_gas(env, node);
1000 be_emit_cstring(env, "\tsahf");
1001 be_emit_finish_line_gas(env, node);
1003 finish_CondJmp(env, node, mode_E, pnc);
1007 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node)
1009 const arch_register_t *in1, *in2, *out;
1010 long pnc = get_ia32_pncode(node);
1012 out = arch_get_irn_register(env->arch_env, node);
1014 /* we have to emit the cmp first, because the destination register */
1015 /* could be one of the compare registers */
1016 if (is_ia32_xCmpCMov(node)) {
1017 be_emit_cstring(env, "\tucomis");
1018 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
1019 be_emit_char(env, ' ');
1020 ia32_emit_source_register(env, node, 1);
1021 be_emit_cstring(env, ", ");
1022 ia32_emit_source_register(env, node, 0);
1024 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 2));
1025 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 3));
1027 if (is_ia32_CmpCMov(node)) {
1028 be_emit_cstring(env, "\tcmp ");
1030 assert(is_ia32_TestCMov(node));
1031 be_emit_cstring(env, "\ttest ");
1033 ia32_emit_binop(env, node);
1035 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 5));
1036 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 6));
1038 be_emit_finish_line_gas(env, node);
1041 /* best case: default in == out -> do nothing */
1042 } else if(in2 == &ia32_gp_regs[REG_GP_UKNWN]) {
1043 /* also nothign to do for unknown regs */
1044 } else if (out == in1) {
1045 const arch_register_t *t;
1046 /* true in == out -> need complement compare and exchange true and
1051 pnc = get_negated_pnc(pnc, get_irn_mode(node));
1053 /* out is different from both ins: need copy default -> out */
1054 be_emit_cstring(env, "\tmovl ");
1055 ia32_emit_register(env, in2);
1056 be_emit_cstring(env, ", ");
1057 ia32_emit_register(env, out);
1058 be_emit_finish_line_gas(env, node);
1061 be_emit_cstring(env, "\tcmov");
1062 ia32_emit_cmp_suffix(env, pnc );
1063 be_emit_cstring(env, "l ");
1064 ia32_emit_register(env, in1);
1065 be_emit_cstring(env, ", ");
1066 ia32_emit_register(env, out);
1068 be_emit_finish_line_gas(env, node);
1072 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node)
1074 CMov_emitter(env, node);
1078 void emit_ia32_TestCMov(ia32_emit_env_t *env, const ir_node *node)
1080 CMov_emitter(env, node);
1084 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node)
1086 CMov_emitter(env, node);
1090 void Set_emitter(ia32_emit_env_t *env, const ir_node *node)
1092 long pnc = get_ia32_pncode(node);
1093 const char *reg8bit;
1094 const arch_register_t *out;
1096 out = arch_get_irn_register(env->arch_env, node);
1097 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1099 if(is_ia32_xCmpSet(node)) {
1100 be_emit_cstring(env, "\tucomis");
1101 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1102 be_emit_char(env, ' ');
1103 ia32_emit_binop(env, node);
1105 if (is_ia32_CmpSet(node)) {
1106 be_emit_cstring(env, "\tcmp ");
1108 assert(is_ia32_TestSet(node));
1109 be_emit_cstring(env, "\ttest ");
1111 ia32_emit_binop(env, node);
1113 be_emit_finish_line_gas(env, node);
1115 /* use mov to clear target because it doesn't affect the eflags */
1116 be_emit_cstring(env, "\tmovl $0, %");
1117 be_emit_string(env, arch_register_get_name(out));
1118 be_emit_finish_line_gas(env, node);
1120 be_emit_cstring(env, "\tset");
1121 ia32_emit_cmp_suffix(env, pnc);
1122 be_emit_cstring(env, " %");
1123 be_emit_string(env, reg8bit);
1124 be_emit_finish_line_gas(env, node);
1128 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1129 Set_emitter(env, node);
1133 void emit_ia32_TestSet(ia32_emit_env_t *env, const ir_node *node) {
1134 Set_emitter(env, node);
1138 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1139 Set_emitter(env, node);
1143 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1145 long pnc = get_ia32_pncode(node);
1146 long unord = pnc & pn_Cmp_Uo;
1148 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1151 case pn_Cmp_Leg: /* odered */
1154 case pn_Cmp_Uo: /* unordered */
1158 case pn_Cmp_Eq: /* == */
1162 case pn_Cmp_Lt: /* < */
1166 case pn_Cmp_Le: /* <= */
1170 case pn_Cmp_Gt: /* > */
1174 case pn_Cmp_Ge: /* >= */
1178 case pn_Cmp_Lg: /* != */
1183 assert(sse_pnc >= 0 && "unsupported compare");
1185 if (unord && sse_pnc != 3) {
1187 We need a separate compare against unordered.
1188 Quick and Dirty solution:
1189 - get some memory on stack
1193 - and result and stored result
1196 be_emit_cstring(env, "\tsubl $8, %esp");
1197 be_emit_finish_line_gas(env, node);
1199 be_emit_cstring(env, "\tcmpsd $3, ");
1200 ia32_emit_binop(env, node);
1201 be_emit_finish_line_gas(env, node);
1203 be_emit_cstring(env, "\tmovsd ");
1204 ia32_emit_dest_register(env, node, 0);
1205 be_emit_cstring(env, ", (%esp)");
1206 be_emit_finish_line_gas(env, node);
1209 be_emit_cstring(env, "\tcmpsd ");
1210 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1211 ia32_emit_binop(env, node);
1212 be_emit_finish_line_gas(env, node);
1214 if (unord && sse_pnc != 3) {
1215 be_emit_cstring(env, "\tandpd (%esp), ");
1216 ia32_emit_dest_register(env, node, 0);
1217 be_emit_finish_line_gas(env, node);
1219 be_emit_cstring(env, "\taddl $8, %esp");
1220 be_emit_finish_line_gas(env, node);
1224 /*********************************************************
1227 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1228 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1229 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1230 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1233 *********************************************************/
1235 /* jump table entry (target and corresponding number) */
1236 typedef struct _branch_t {
1241 /* jump table for switch generation */
1242 typedef struct _jmp_tbl_t {
1243 ir_node *defProj; /**< default target */
1244 long min_value; /**< smallest switch case */
1245 long max_value; /**< largest switch case */
1246 long num_branches; /**< number of jumps */
1247 char *label; /**< label of the jump table */
1248 branch_t *branches; /**< jump array */
1252 * Compare two variables of type branch_t. Used to sort all switch cases
1255 int ia32_cmp_branch_t(const void *a, const void *b) {
1256 branch_t *b1 = (branch_t *)a;
1257 branch_t *b2 = (branch_t *)b;
1259 if (b1->value <= b2->value)
1266 * Emits code for a SwitchJmp (creates a jump table if
1267 * possible otherwise a cmp-jmp cascade). Port from
1271 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1272 unsigned long interval;
1277 const ir_edge_t *edge;
1279 /* fill the table structure */
1280 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1281 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1283 tbl.num_branches = get_irn_n_edges(node);
1284 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1285 tbl.min_value = INT_MAX;
1286 tbl.max_value = INT_MIN;
1289 /* go over all proj's and collect them */
1290 foreach_out_edge(node, edge) {
1291 proj = get_edge_src_irn(edge);
1292 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1294 pnc = get_Proj_proj(proj);
1296 /* create branch entry */
1297 tbl.branches[i].target = proj;
1298 tbl.branches[i].value = pnc;
1300 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1301 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1303 /* check for default proj */
1304 if (pnc == get_ia32_pncode(node)) {
1305 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1312 /* sort the branches by their number */
1313 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1315 /* two-complement's magic make this work without overflow */
1316 interval = tbl.max_value - tbl.min_value;
1318 /* emit the table */
1319 be_emit_cstring(env, "\tcmpl $");
1320 be_emit_irprintf(env->emit, "%u, ", interval);
1321 ia32_emit_source_register(env, node, 0);
1322 be_emit_finish_line_gas(env, node);
1324 be_emit_cstring(env, "\tja ");
1325 ia32_emit_cfop_target(env, tbl.defProj);
1326 be_emit_finish_line_gas(env, node);
1328 if (tbl.num_branches > 1) {
1330 be_emit_cstring(env, "\tjmp *");
1331 be_emit_string(env, tbl.label);
1332 be_emit_cstring(env, "(,");
1333 ia32_emit_source_register(env, node, 0);
1334 be_emit_cstring(env, ",4)");
1335 be_emit_finish_line_gas(env, node);
1337 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1338 be_emit_cstring(env, "\t.align 4\n");
1339 be_emit_write_line(env);
1341 be_emit_string(env, tbl.label);
1342 be_emit_cstring(env, ":\n");
1343 be_emit_write_line(env);
1345 be_emit_cstring(env, ".long ");
1346 ia32_emit_cfop_target(env, tbl.branches[0].target);
1347 be_emit_finish_line_gas(env, NULL);
1349 last_value = tbl.branches[0].value;
1350 for (i = 1; i < tbl.num_branches; ++i) {
1351 while (++last_value < tbl.branches[i].value) {
1352 be_emit_cstring(env, ".long ");
1353 ia32_emit_cfop_target(env, tbl.defProj);
1354 be_emit_finish_line_gas(env, NULL);
1356 be_emit_cstring(env, ".long ");
1357 ia32_emit_cfop_target(env, tbl.branches[i].target);
1358 be_emit_finish_line_gas(env, NULL);
1360 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1362 /* one jump is enough */
1363 be_emit_cstring(env, "\tjmp ");
1364 ia32_emit_cfop_target(env, tbl.branches[0].target);
1365 be_emit_finish_line_gas(env, node);
1375 * Emits code for a unconditional jump.
1378 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1379 ir_node *block, *next_block;
1381 /* for now, the code works for scheduled and non-schedules blocks */
1382 block = get_nodes_block(node);
1384 /* we have a block schedule */
1385 next_block = next_blk_sched(block);
1386 if (get_cfop_target_block(node) != next_block) {
1387 be_emit_cstring(env, "\tjmp ");
1388 ia32_emit_cfop_target(env, node);
1390 be_emit_cstring(env, "\t/* fallthrough to ");
1391 ia32_emit_cfop_target(env, node);
1392 be_emit_cstring(env, " */");
1394 be_emit_finish_line_gas(env, node);
1398 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node)
1400 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
1402 be_emit_char(env, '$');
1403 if(attr->symconst != NULL) {
1404 ident *id = get_entity_ld_ident(attr->symconst);
1406 if(attr->attr.data.am_sc_sign)
1407 be_emit_char(env, '-');
1408 be_emit_ident(env, id);
1410 if(attr->symconst == NULL || attr->offset != 0) {
1411 if(attr->symconst != NULL)
1412 be_emit_char(env, '+');
1413 be_emit_irprintf(env->emit, "0x%X", attr->offset);
1418 const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
1421 const arch_register_t *reg;
1422 const char *reg_name;
1426 const ia32_attr_t *attr;
1433 /* parse modifiers */
1436 ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node);
1437 be_emit_char(env, '%');
1440 be_emit_char(env, '%');
1460 ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier "
1461 "'%c' for asm op\n", node, c);
1467 sscanf(s, "%d%n", &num, &p);
1469 ir_fprintf(stderr, "Warning: Couldn't parse assembler operand (%+F)\n",
1477 attr = get_ia32_attr_const(node);
1478 n_outs = ARR_LEN(attr->slots);
1480 reg = get_out_reg(env, node, num);
1483 int in = num - n_outs;
1484 if(in >= get_irn_arity(node)) {
1485 ir_fprintf(stderr, "Warning: Invalid input %d specified in asm "
1486 "op (%+F)\n", num, node);
1489 pred = get_irn_n(node, in);
1490 /* might be an immediate value */
1491 if(is_ia32_Immediate(pred)) {
1492 emit_ia32_Immediate(env, pred);
1495 reg = get_in_reg(env, node, in);
1498 ir_fprintf(stderr, "Warning: no register assigned for %d asm op "
1499 "(%+F)\n", num, node);
1504 be_emit_char(env, '%');
1507 reg_name = arch_register_get_name(reg);
1510 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
1513 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit_high, reg);
1516 reg_name = ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
1519 panic("Invalid asm op modifier");
1521 be_emit_string(env, reg_name);
1527 * Emits code for an ASM pseudo op.
1530 void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node)
1532 const void *gen_attr = get_irn_generic_attr_const(node);
1533 const ia32_asm_attr_t *attr
1534 = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, gen_attr);
1535 ident *asm_text = attr->asm_text;
1536 const char *s = get_id_str(asm_text);
1538 be_emit_cstring(env, "# Begin ASM \t");
1539 be_emit_finish_line_gas(env, node);
1542 be_emit_char(env, '\t');
1546 s = emit_asm_operand(env, node, s);
1549 be_emit_char(env, *s);
1554 be_emit_char(env, '\n');
1555 be_emit_write_line(env);
1557 be_emit_cstring(env, "# End ASM\n");
1558 be_emit_write_line(env);
1561 /**********************************
1564 * | | ___ _ __ _ _| |_) |
1565 * | | / _ \| '_ \| | | | _ <
1566 * | |___| (_) | |_) | |_| | |_) |
1567 * \_____\___/| .__/ \__, |____/
1570 **********************************/
1573 * Emit movsb/w instructions to make mov count divideable by 4
1576 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1577 be_emit_cstring(env, "\tcld");
1578 be_emit_finish_line_gas(env, NULL);
1582 be_emit_cstring(env, "\tmovsb");
1583 be_emit_finish_line_gas(env, NULL);
1586 be_emit_cstring(env, "\tmovsw");
1587 be_emit_finish_line_gas(env, NULL);
1590 be_emit_cstring(env, "\tmovsb");
1591 be_emit_finish_line_gas(env, NULL);
1592 be_emit_cstring(env, "\tmovsw");
1593 be_emit_finish_line_gas(env, NULL);
1599 * Emit rep movsd instruction for memcopy.
1602 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1603 tarval *tv = get_ia32_Immop_tarval(node);
1604 int rem = get_tarval_long(tv);
1606 emit_CopyB_prolog(env, rem);
1608 be_emit_cstring(env, "\trep movsd");
1609 be_emit_finish_line_gas(env, node);
1613 * Emits unrolled memcopy.
1616 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1617 tarval *tv = get_ia32_Immop_tarval(node);
1618 int size = get_tarval_long(tv);
1620 emit_CopyB_prolog(env, size & 0x3);
1624 be_emit_cstring(env, "\tmovsd");
1625 be_emit_finish_line_gas(env, NULL);
1631 /***************************
1635 * | | / _ \| '_ \ \ / /
1636 * | |___| (_) | | | \ V /
1637 * \_____\___/|_| |_|\_/
1639 ***************************/
1642 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1645 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1646 ir_mode *ls_mode = get_ia32_ls_mode(node);
1647 int ls_bits = get_mode_size_bits(ls_mode);
1649 be_emit_cstring(env, "\tcvt");
1651 if(is_ia32_Conv_I2FP(node)) {
1653 be_emit_cstring(env, "si2ss");
1655 be_emit_cstring(env, "si2sd");
1657 } else if(is_ia32_Conv_FP2I(node)) {
1659 be_emit_cstring(env, "ss2si");
1661 be_emit_cstring(env, "sd2si");
1664 assert(is_ia32_Conv_FP2FP(node));
1666 be_emit_cstring(env, "sd2ss");
1668 be_emit_cstring(env, "ss2sd");
1671 be_emit_char(env, ' ');
1673 switch(get_ia32_op_type(node)) {
1675 ia32_emit_source_register(env, node, 2);
1676 be_emit_cstring(env, ", ");
1677 ia32_emit_dest_register(env, node, 0);
1679 case ia32_AddrModeS:
1680 ia32_emit_dest_register(env, node, 0);
1681 be_emit_cstring(env, ", ");
1682 ia32_emit_am(env, node);
1685 assert(0 && "unsupported op type for Conv");
1687 be_emit_finish_line_gas(env, node);
1691 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1692 emit_ia32_Conv_with_FP(env, node);
1696 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1697 emit_ia32_Conv_with_FP(env, node);
1701 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1702 emit_ia32_Conv_with_FP(env, node);
1706 * Emits code for an Int conversion.
1709 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1710 const char *sign_suffix;
1711 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1712 int smaller_bits = get_mode_size_bits(smaller_mode);
1714 const arch_register_t *in_reg, *out_reg;
1716 assert(!mode_is_float(smaller_mode));
1717 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1719 signed_mode = mode_is_signed(smaller_mode);
1720 if(smaller_bits == 32) {
1721 // this should not happen as it's no convert
1725 sign_suffix = signed_mode ? "s" : "z";
1728 switch(get_ia32_op_type(node)) {
1730 in_reg = get_in_reg(env, node, 2);
1731 out_reg = get_out_reg(env, node, 0);
1733 if (in_reg == &ia32_gp_regs[REG_EAX] &&
1734 out_reg == &ia32_gp_regs[REG_EAX] &&
1738 /* argument and result are both in EAX and */
1739 /* signedness is ok: -> use the smaller cwtl opcode */
1740 be_emit_cstring(env, "\tcwtl");
1742 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1744 be_emit_cstring(env, "\tmov");
1745 be_emit_string(env, sign_suffix);
1746 ia32_emit_mode_suffix_mode(env, smaller_mode);
1747 be_emit_cstring(env, "l %");
1748 be_emit_string(env, sreg);
1749 be_emit_cstring(env, ", ");
1750 ia32_emit_dest_register(env, node, 0);
1753 case ia32_AddrModeS: {
1754 be_emit_cstring(env, "\tmov");
1755 be_emit_string(env, sign_suffix);
1756 ia32_emit_mode_suffix_mode(env, smaller_mode);
1757 be_emit_cstring(env, "l ");
1758 ia32_emit_am(env, node);
1759 be_emit_cstring(env, ", ");
1760 ia32_emit_dest_register(env, node, 0);
1764 assert(0 && "unsupported op type for Conv");
1766 be_emit_finish_line_gas(env, node);
1770 * Emits code for an 8Bit Int conversion.
1772 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1773 emit_ia32_Conv_I2I(env, node);
1777 /*******************************************
1780 * | |__ ___ _ __ ___ __| | ___ ___
1781 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1782 * | |_) | __/ | | | (_) | (_| | __/\__ \
1783 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1785 *******************************************/
1788 * Emits a backend call
1791 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1792 ir_entity *ent = be_Call_get_entity(node);
1794 be_emit_cstring(env, "\tcall ");
1796 set_entity_backend_marked(ent, 1);
1797 be_emit_string(env, get_entity_ld_name(ent));
1799 be_emit_char(env, '*');
1800 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1802 be_emit_finish_line_gas(env, node);
1806 * Emits code to increase stack pointer.
1809 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1810 int offs = be_get_IncSP_offset(node);
1816 be_emit_cstring(env, "\tsubl $");
1817 be_emit_irprintf(env->emit, "%u, ", offs);
1818 ia32_emit_source_register(env, node, 0);
1820 be_emit_cstring(env, "\taddl $");
1821 be_emit_irprintf(env->emit, "%u, ", -offs);
1822 ia32_emit_source_register(env, node, 0);
1824 be_emit_finish_line_gas(env, node);
1828 * Emits code to set stack pointer.
1831 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1832 be_emit_cstring(env, "\tmovl ");
1833 ia32_emit_source_register(env, node, 2);
1834 be_emit_cstring(env, ", ");
1835 ia32_emit_dest_register(env, node, 0);
1836 be_emit_finish_line_gas(env, node);
1840 * Emits code for Copy/CopyKeep.
1843 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1845 const arch_env_t *arch_env = env->arch_env;
1846 const arch_register_t *in = arch_get_irn_register(arch_env, op);
1847 const arch_register_t *out = arch_get_irn_register(arch_env, node);
1853 if(is_unknown_reg(in))
1855 /* copies of vf nodes aren't real... */
1856 if(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
1859 mode = get_irn_mode(node);
1860 if (mode == mode_E) {
1861 be_emit_cstring(env, "\tmovsd ");
1862 ia32_emit_register(env, in);
1863 be_emit_cstring(env, ", ");
1864 ia32_emit_register(env, out);
1866 be_emit_cstring(env, "\tmovl ");
1867 ia32_emit_register(env, in);
1868 be_emit_cstring(env, ", ");
1869 ia32_emit_register(env, out);
1871 be_emit_finish_line_gas(env, node);
1875 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1876 Copy_emitter(env, node, be_get_Copy_op(node));
1880 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1881 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1885 * Emits code for exchange.
1888 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1889 const arch_register_t *in1, *in2;
1890 const arch_register_class_t *cls1, *cls2;
1892 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1893 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1895 cls1 = arch_register_get_class(in1);
1896 cls2 = arch_register_get_class(in2);
1898 assert(cls1 == cls2 && "Register class mismatch at Perm");
1900 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1901 be_emit_cstring(env, "\txchg ");
1902 ia32_emit_source_register(env, node, 1);
1903 be_emit_cstring(env, ", ");
1904 ia32_emit_source_register(env, node, 0);
1905 be_emit_finish_line_gas(env, node);
1906 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1907 be_emit_cstring(env, "\txorpd ");
1908 ia32_emit_source_register(env, node, 1);
1909 be_emit_cstring(env, ", ");
1910 ia32_emit_source_register(env, node, 0);
1911 be_emit_finish_line_gas(env, NULL);
1913 be_emit_cstring(env, "\txorpd ");
1914 ia32_emit_source_register(env, node, 0);
1915 be_emit_cstring(env, ", ");
1916 ia32_emit_source_register(env, node, 1);
1917 be_emit_finish_line_gas(env, NULL);
1919 be_emit_cstring(env, "\txorpd ");
1920 ia32_emit_source_register(env, node, 1);
1921 be_emit_cstring(env, ", ");
1922 ia32_emit_source_register(env, node, 0);
1923 be_emit_finish_line_gas(env, node);
1924 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1926 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1932 * Emits code for Constant loading.
1935 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1936 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1938 if (imm_tp == ia32_ImmSymConst) {
1939 be_emit_cstring(env, "\tmovl ");
1940 ia32_emit_immediate(env, node);
1941 be_emit_cstring(env, ", ");
1942 ia32_emit_dest_register(env, node, 0);
1944 tarval *tv = get_ia32_Immop_tarval(node);
1945 assert(get_irn_mode(node) == mode_Iu);
1946 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1947 if (tarval_is_null(tv)) {
1948 if (env->isa->opt_arch == arch_pentium_4) {
1949 /* P4 prefers sub r, r, others xor r, r */
1950 be_emit_cstring(env, "\tsubl ");
1952 be_emit_cstring(env, "\txorl ");
1954 ia32_emit_dest_register(env, node, 0);
1955 be_emit_cstring(env, ", ");
1956 ia32_emit_dest_register(env, node, 0);
1958 be_emit_cstring(env, "\tmovl ");
1959 ia32_emit_immediate(env, node);
1960 be_emit_cstring(env, ", ");
1961 ia32_emit_dest_register(env, node, 0);
1964 be_emit_finish_line_gas(env, node);
1968 * Emits code to load the TLS base
1971 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1972 be_emit_cstring(env, "\tmovl %gs:0, ");
1973 ia32_emit_dest_register(env, node, 0);
1974 be_emit_finish_line_gas(env, node);
1978 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node)
1980 be_emit_cstring(env, "\tret");
1981 be_emit_finish_line_gas(env, node);
1985 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node)
1992 /***********************************************************************************
1995 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1996 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1997 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1998 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
2000 ***********************************************************************************/
2003 * Enters the emitter functions for handled nodes into the generic
2004 * pointer of an opcode.
2007 void ia32_register_emitters(void) {
2009 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
2010 #define IA32_EMIT(a) IA32_EMIT2(a,a)
2011 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
2012 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
2013 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
2014 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
2016 /* first clear the generic function pointer for all ops */
2017 clear_irp_opcodes_generic_func();
2019 /* register all emitter functions defined in spec */
2020 ia32_register_spec_emitters();
2022 /* other ia32 emitter functions */
2027 IA32_EMIT(TestCMov);
2030 IA32_EMIT(SwitchJmp);
2033 IA32_EMIT(Conv_I2FP);
2034 IA32_EMIT(Conv_FP2I);
2035 IA32_EMIT(Conv_FP2FP);
2036 IA32_EMIT(Conv_I2I);
2037 IA32_EMIT(Conv_I2I8Bit);
2042 IA32_EMIT(xCmpCMov);
2043 IA32_EMIT(xCondJmp);
2044 IA32_EMIT2(fcomJmp, x87CondJmp);
2045 IA32_EMIT2(fcompJmp, x87CondJmp);
2046 IA32_EMIT2(fcomppJmp, x87CondJmp);
2047 IA32_EMIT2(fcomrJmp, x87CondJmp);
2048 IA32_EMIT2(fcomrpJmp, x87CondJmp);
2049 IA32_EMIT2(fcomrppJmp, x87CondJmp);
2051 /* benode emitter */
2077 static const char *last_name = NULL;
2078 static unsigned last_line = -1;
2079 static unsigned num = -1;
2082 * Emit the debug support for node node.
2085 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
2086 dbg_info *db = get_irn_dbg_info(node);
2088 const char *fname = be_retrieve_dbg_info(db, &lineno);
2090 if (! env->cg->birg->main_env->options->stabs_debug_support)
2094 if (last_name != fname) {
2096 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
2099 if (last_line != lineno) {
2102 snprintf(name, sizeof(name), ".LM%u", ++num);
2104 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
2105 be_emit_string(env, name);
2106 be_emit_cstring(env, ":\n");
2107 be_emit_write_line(env);
2112 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
2115 * Emits code for a node.
2118 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
2119 ir_op *op = get_irn_op(node);
2121 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
2123 if (op->ops.generic) {
2124 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
2125 ia32_emit_dbg(env, node);
2126 (*func) (env, node);
2128 emit_Nothing(env, node);
2129 ir_fprintf(stderr, "Error: No emit handler for node %+F (%+G, graph %+F)\n", node, node, current_ir_graph);
2135 * Emits gas alignment directives
2138 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
2139 be_emit_cstring(env, "\t.p2align ");
2140 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
2141 be_emit_write_line(env);
2145 * Emits gas alignment directives for Functions depended on cpu architecture.
2148 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
2150 unsigned maximum_skip;
2165 maximum_skip = (1 << align) - 1;
2166 ia32_emit_alignment(env, align, maximum_skip);
2170 * Emits gas alignment directives for Labels depended on cpu architecture.
2173 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
2174 unsigned align; unsigned maximum_skip;
2189 maximum_skip = (1 << align) - 1;
2190 ia32_emit_alignment(env, align, maximum_skip);
2194 * Test wether a block should be aligned.
2195 * For cpus in the P4/Athlon class it is usefull to align jump labels to
2196 * 16 bytes. However we should only do that if the alignment nops before the
2197 * label aren't executed more often than we have jumps to the label.
2200 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
2201 static const double DELTA = .0001;
2202 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2204 double prev_freq = 0; /**< execfreq of the fallthrough block */
2205 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
2206 cpu_support cpu = env->isa->opt_arch;
2209 if(exec_freq == NULL)
2211 if(cpu == arch_i386 || cpu == arch_i486)
2214 block_freq = get_block_execfreq(exec_freq, block);
2215 if(block_freq < DELTA)
2218 n_cfgpreds = get_Block_n_cfgpreds(block);
2219 for(i = 0; i < n_cfgpreds; ++i) {
2220 ir_node *pred = get_Block_cfgpred_block(block, i);
2221 double pred_freq = get_block_execfreq(exec_freq, pred);
2224 prev_freq += pred_freq;
2226 jmp_freq += pred_freq;
2230 if(prev_freq < DELTA && !(jmp_freq < DELTA))
2233 jmp_freq /= prev_freq;
2237 case arch_athlon_64:
2239 return jmp_freq > 3;
2241 return jmp_freq > 2;
2246 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
2251 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2253 n_cfgpreds = get_Block_n_cfgpreds(block);
2254 need_label = (n_cfgpreds != 0);
2256 if (should_align_block(env, block, prev)) {
2258 ia32_emit_align_label(env, env->isa->opt_arch);
2262 ia32_emit_block_name(env, block);
2263 be_emit_char(env, ':');
2265 be_emit_pad_comment(env);
2266 be_emit_cstring(env, " /* preds:");
2268 /* emit list of pred blocks in comment */
2269 arity = get_irn_arity(block);
2270 for (i = 0; i < arity; ++i) {
2271 ir_node *predblock = get_Block_cfgpred_block(block, i);
2272 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2275 be_emit_cstring(env, "\t/* ");
2276 ia32_emit_block_name(env, block);
2277 be_emit_cstring(env, ": ");
2279 if (exec_freq != NULL) {
2280 be_emit_irprintf(env->emit, " freq: %f",
2281 get_block_execfreq(exec_freq, block));
2283 be_emit_cstring(env, " */\n");
2284 be_emit_write_line(env);
2288 * Walks over the nodes in a block connected by scheduling edges
2289 * and emits code for each node.
2292 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2294 const ir_node *node;
2296 ia32_emit_block_header(env, block, last_block);
2298 /* emit the contents of the block */
2299 ia32_emit_dbg(env, block);
2300 sched_foreach(block, node) {
2301 ia32_emit_node(env, node);
2306 * Emits code for function start.
2309 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2310 ir_entity *irg_ent = get_irg_entity(irg);
2311 const char *irg_name = get_entity_ld_name(irg_ent);
2312 cpu_support cpu = env->isa->opt_arch;
2313 const be_irg_t *birg = env->cg->birg;
2315 be_emit_write_line(env);
2316 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2317 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2318 ia32_emit_align_func(env, cpu);
2319 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2320 be_emit_cstring(env, ".global ");
2321 be_emit_string(env, irg_name);
2322 be_emit_char(env, '\n');
2323 be_emit_write_line(env);
2325 ia32_emit_function_object(env, irg_name);
2326 be_emit_string(env, irg_name);
2327 be_emit_cstring(env, ":\n");
2328 be_emit_write_line(env);
2332 * Emits code for function end
2335 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2336 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2337 const be_irg_t *birg = env->cg->birg;
2339 ia32_emit_function_size(env, irg_name);
2340 be_dbg_method_end(birg->main_env->db_handle);
2341 be_emit_char(env, '\n');
2342 be_emit_write_line(env);
2347 * Sets labels for control flow nodes (jump target)
2350 void ia32_gen_labels(ir_node *block, void *data)
2353 int n = get_Block_n_cfgpreds(block);
2356 for (n--; n >= 0; n--) {
2357 pred = get_Block_cfgpred(block, n);
2358 set_irn_link(pred, block);
2363 * Emit an exception label if the current instruction can fail.
2365 void ia32_emit_exc_label(ia32_emit_env_t *env, const ir_node *node) {
2366 if (get_ia32_exc_label(node)) {
2367 be_emit_irprintf(env->emit, ".EXL%u\n", 0);
2368 be_emit_write_line(env);
2373 * Main driver. Emits the code for one routine.
2375 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2376 ia32_emit_env_t env;
2378 ir_node *last_block = NULL;
2381 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2382 env.emit = &env.isa->emit;
2383 env.arch_env = cg->arch_env;
2386 ia32_register_emitters();
2388 ia32_emit_func_prolog(&env, irg);
2389 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2391 n = ARR_LEN(cg->blk_sched);
2392 for (i = 0; i < n;) {
2395 block = cg->blk_sched[i];
2397 next_bl = i < n ? cg->blk_sched[i] : NULL;
2399 /* set here the link. the emitter expects to find the next block here */
2400 set_irn_link(block, next_bl);
2401 ia32_gen_block(&env, block, last_block);
2405 ia32_emit_func_epilog(&env, irg);
2408 void ia32_init_emitter(void)
2410 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");