3 * @brief This file implements the node emitter.
4 * @author Christian Wuerdig, Matthias Braun
22 #include "iredges_t.h"
25 #include "raw_bitset.h"
27 #include "../besched_t.h"
28 #include "../benode_t.h"
30 #include "../be_dbgout.h"
31 #include "../beemitter.h"
32 #include "../begnuas.h"
34 #include "ia32_emitter.h"
35 #include "gen_ia32_emitter.h"
36 #include "gen_ia32_regalloc_if.h"
37 #include "ia32_nodes_attr.h"
38 #include "ia32_new_nodes.h"
39 #include "ia32_map_regs.h"
40 #include "bearch_ia32_t.h"
42 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
44 #define BLOCK_PREFIX ".L"
46 #define SNPRINTF_BUF_LEN 128
49 * Returns the register at in position pos.
52 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
55 const arch_env_t *arch_env = env->arch_env;
57 const arch_register_t *reg = NULL;
59 assert(get_irn_arity(irn) > pos && "Invalid IN position");
61 /* The out register of the operator at position pos is the
62 in register we need. */
63 op = get_irn_n(irn, pos);
65 reg = arch_get_irn_register(arch_env, op);
67 assert(reg && "no in register found");
69 /* in case of a joker register: just return a valid register */
70 if (arch_register_type_is(reg, joker)) {
71 const arch_register_req_t *req;
73 /* ask for the requirements */
74 req = arch_get_register_req(arch_env, irn, pos);
76 if (arch_register_req_is(req, limited)) {
77 /* in case of limited requirements: get the first allowed register */
78 unsigned idx = rbitset_next(req->limited, 0, 1);
79 reg = arch_register_for_index(req->cls, idx);
81 /* otherwise get first register in class */
82 reg = arch_register_for_index(req->cls, 0);
90 * Returns the register at out position pos.
93 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
96 const arch_env_t *arch_env = env->arch_env;
98 const arch_register_t *reg = NULL;
100 /* 1st case: irn is not of mode_T, so it has only */
101 /* one OUT register -> good */
102 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
103 /* Proj with the corresponding projnum for the register */
105 if (get_irn_mode(irn) != mode_T) {
106 reg = arch_get_irn_register(arch_env, irn);
107 } else if (is_ia32_irn(irn)) {
108 reg = get_ia32_out_reg(irn, pos);
110 const ir_edge_t *edge;
112 foreach_out_edge(irn, edge) {
113 proj = get_edge_src_irn(edge);
114 assert(is_Proj(proj) && "non-Proj from mode_T node");
115 if (get_Proj_proj(proj) == pos) {
116 reg = arch_get_irn_register(arch_env, proj);
122 assert(reg && "no out register found");
127 * Returns an ident for the given tarval tv.
130 ident *get_ident_for_tv(tarval *tv) {
132 tarval_snprintf(buf, sizeof(buf), tv);
133 return new_id_from_str(buf);
137 * Determine the gnu assembler suffix that indicates a mode
140 char get_mode_suffix(const ir_mode *mode) {
141 if(mode_is_float(mode)) {
142 switch(get_mode_size_bits(mode)) {
151 assert(mode_is_int(mode) || mode_is_reference(mode));
152 switch(get_mode_size_bits(mode)) {
163 panic("Can't output mode_suffix for %+F\n", mode);
167 int produces_result(const ir_node *node) {
168 return !(is_ia32_St(node) ||
169 is_ia32_Store8Bit(node) ||
170 is_ia32_CondJmp(node) ||
171 is_ia32_xCondJmp(node) ||
172 is_ia32_CmpSet(node) ||
173 is_ia32_xCmpSet(node) ||
174 is_ia32_SwitchJmp(node));
178 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
179 const arch_register_t *reg) {
180 switch(get_mode_size_bits(mode)) {
182 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
184 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
186 return (char *)arch_register_get_name(reg);
191 * Add a number to a prefix. This number will not be used a second time.
194 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
195 static unsigned long id = 0;
196 snprintf(buf, buflen, "%s%lu", prefix, ++id);
200 /*************************************************************
202 * (_) | | / _| | | | |
203 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
204 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
205 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
206 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
209 *************************************************************/
211 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
212 // be_emit_env_t* so we cheat a bit...
213 #define be_emit_char(env,c) be_emit_char(env->emit,c)
214 #define be_emit_string(env,s) be_emit_string(env->emit,s)
215 #undef be_emit_cstring
216 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
217 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
218 #define be_emit_write_line(env) be_emit_write_line(env->emit)
219 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
220 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
222 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
224 const arch_register_t *reg = get_in_reg(env, node, pos);
225 const char *reg_name = arch_register_get_name(reg);
227 assert(pos < get_irn_arity(node));
229 be_emit_char(env, '%');
230 be_emit_string(env, reg_name);
233 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
234 const arch_register_t *reg = get_out_reg(env, node, pos);
235 const char *reg_name = arch_register_get_name(reg);
237 be_emit_char(env, '%');
238 be_emit_string(env, reg_name);
241 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
243 ia32_attr_t *attr = get_ia32_attr(node);
246 be_emit_char(env, '%');
247 be_emit_string(env, attr->x87[pos]->name);
250 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
256 switch(get_ia32_immop_type(node)) {
258 tv = get_ia32_Immop_tarval(node);
259 id = get_ident_for_tv(tv);
261 case ia32_ImmSymConst:
262 ent = get_ia32_Immop_symconst(node);
263 mark_entity_visited(ent);
264 id = get_entity_ld_ident(ent);
268 be_emit_string(env, "BAD");
272 be_emit_ident(env, id);
275 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode)
277 be_emit_char(env, get_mode_suffix(mode));
280 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
282 ir_mode *mode = get_ia32_ls_mode(node);
284 ia32_emit_mode_suffix(env, mode);
288 char get_xmm_mode_suffix(ir_mode *mode)
290 assert(mode_is_float(mode));
291 switch(get_mode_size_bits(mode)) {
302 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
304 ir_mode *mode = get_ia32_ls_mode(node);
305 assert(mode != NULL);
306 be_emit_char(env, 's');
307 be_emit_char(env, get_xmm_mode_suffix(mode));
310 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
312 ir_mode *mode = get_ia32_ls_mode(node);
313 assert(mode != NULL);
314 be_emit_char(env, get_xmm_mode_suffix(mode));
317 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
319 if(get_mode_size_bits(mode) == 32)
321 if(mode_is_signed(mode)) {
322 be_emit_char(env, 's');
324 be_emit_char(env, 'z');
329 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
331 switch (be_gas_flavour) {
332 case GAS_FLAVOUR_NORMAL:
333 be_emit_cstring(env, "\t.type\t");
334 be_emit_string(env, name);
335 be_emit_cstring(env, ", @function\n");
336 be_emit_write_line(env);
338 case GAS_FLAVOUR_MINGW:
339 be_emit_cstring(env, "\t.def\t");
340 be_emit_string(env, name);
341 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
342 be_emit_write_line(env);
350 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
352 switch (be_gas_flavour) {
353 case GAS_FLAVOUR_NORMAL:
354 be_emit_cstring(env, "\t.size\t");
355 be_emit_string(env, name);
356 be_emit_cstring(env, ", .-");
357 be_emit_string(env, name);
358 be_emit_char(env, '\n');
359 be_emit_write_line(env);
369 * Emits registers and/or address mode of a binary operation.
371 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
372 switch(get_ia32_op_type(node)) {
374 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
375 be_emit_char(env, '$');
376 ia32_emit_immediate(env, node);
377 be_emit_cstring(env, ", ");
378 ia32_emit_source_register(env, node, 2);
380 const arch_register_t *in1 = get_in_reg(env, node, 2);
381 const arch_register_t *in2 = get_in_reg(env, node, 3);
382 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
383 const arch_register_t *in;
386 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
387 out = out ? out : in1;
388 in_name = arch_register_get_name(in);
390 if (is_ia32_emit_cl(node)) {
391 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
395 be_emit_char(env, '%');
396 be_emit_string(env, in_name);
397 be_emit_cstring(env, ", %");
398 be_emit_string(env, arch_register_get_name(out));
402 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
403 assert(!produces_result(node) && "Source AM with Const must not produce result");
404 ia32_emit_am(env, node);
405 be_emit_cstring(env, ", $");
406 ia32_emit_immediate(env, node);
407 } else if (produces_result(node)) {
408 ia32_emit_am(env, node);
409 be_emit_cstring(env, ", ");
410 ia32_emit_dest_register(env, node, 0);
412 ia32_emit_am(env, node);
413 be_emit_cstring(env, ", ");
414 ia32_emit_source_register(env, node, 2);
418 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
419 be_emit_char(env, '$');
420 ia32_emit_immediate(env, node);
421 be_emit_cstring(env, ", ");
422 ia32_emit_am(env, node);
424 const arch_register_t *in1 = get_in_reg(env, node,
425 get_irn_arity(node) == 5 ? 3 : 2);
426 ir_mode *mode = get_ia32_ls_mode(node);
429 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
431 if (is_ia32_emit_cl(node)) {
432 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
436 be_emit_char(env, '%');
437 be_emit_string(env, in_name);
438 be_emit_cstring(env, ", ");
439 ia32_emit_am(env, node);
443 assert(0 && "unsupported op type");
448 * Emits registers and/or address mode of a binary operation.
450 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
451 switch(get_ia32_op_type(node)) {
453 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
454 // should not happen...
457 ia32_attr_t *attr = get_ia32_attr(node);
458 const arch_register_t *in1 = attr->x87[0];
459 const arch_register_t *in2 = attr->x87[1];
460 const arch_register_t *out = attr->x87[2];
461 const arch_register_t *in;
463 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
464 out = out ? out : in1;
466 be_emit_char(env, '%');
467 be_emit_string(env, arch_register_get_name(in));
468 be_emit_cstring(env, ", %");
469 be_emit_string(env, arch_register_get_name(out));
474 ia32_emit_am(env, node);
477 assert(0 && "unsupported op type");
482 * Emits registers and/or address mode of a unary operation.
484 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
485 switch(get_ia32_op_type(node)) {
487 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
488 be_emit_char(env, '$');
489 ia32_emit_immediate(env, node);
491 if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
492 ia32_emit_source_register(env, node, 3);
493 } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
494 ia32_emit_source_register(env, node, 4);
495 } else if(is_ia32_Push(node)) {
496 ia32_emit_source_register(env, node, 2);
497 } else if(is_ia32_Pop(node)) {
498 ia32_emit_dest_register(env, node, 1);
500 ia32_emit_dest_register(env, node, 0);
506 ia32_emit_am(env, node);
509 assert(0 && "unsupported op type");
514 * Emits address mode.
516 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
517 ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
518 ir_entity *ent = get_ia32_am_sc(node);
519 int offs = get_ia32_am_offs_int(node);
521 /* just to be sure... */
522 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
528 mark_entity_visited(ent);
529 id = get_entity_ld_ident(ent);
530 if (is_ia32_am_sc_sign(node))
531 be_emit_char(env, '-');
532 be_emit_ident(env, id);
534 if(get_entity_owner(ent) == get_tls_type()) {
535 if (get_entity_visibility(ent) == visibility_external_allocated) {
536 be_emit_cstring(env, "@INDNTPOFF");
538 be_emit_cstring(env, "@NTPOFF");
545 be_emit_irprintf(env->emit, "%+d", offs);
547 be_emit_irprintf(env->emit, "%d", offs);
551 if (am_flav & (ia32_B | ia32_I)) {
552 be_emit_char(env, '(');
555 if (am_flav & ia32_B) {
556 ia32_emit_source_register(env, node, 0);
559 /* emit index + scale */
560 if (am_flav & ia32_I) {
561 be_emit_char(env, ',');
562 ia32_emit_source_register(env, node, 1);
564 if (am_flav & ia32_S) {
565 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
568 be_emit_char(env, ')');
572 /*************************************************
575 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
576 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
577 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
578 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
580 *************************************************/
583 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
586 * coding of conditions
588 struct cmp2conditon_t {
594 * positive conditions for signed compares
597 const struct cmp2conditon_t cmp2condition_s[] = {
598 { NULL, pn_Cmp_False }, /* always false */
599 { "e", pn_Cmp_Eq }, /* == */
600 { "l", pn_Cmp_Lt }, /* < */
601 { "le", pn_Cmp_Le }, /* <= */
602 { "g", pn_Cmp_Gt }, /* > */
603 { "ge", pn_Cmp_Ge }, /* >= */
604 { "ne", pn_Cmp_Lg }, /* != */
605 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
606 { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
607 { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
608 { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
609 { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
610 { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
611 { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
612 { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
613 { NULL, pn_Cmp_True }, /* always true */
617 * positive conditions for unsigned compares
620 const struct cmp2conditon_t cmp2condition_u[] = {
621 { NULL, pn_Cmp_False }, /* always false */
622 { "e", pn_Cmp_Eq }, /* == */
623 { "b", pn_Cmp_Lt }, /* < */
624 { "be", pn_Cmp_Le }, /* <= */
625 { "a", pn_Cmp_Gt }, /* > */
626 { "ae", pn_Cmp_Ge }, /* >= */
627 { "ne", pn_Cmp_Lg }, /* != */
628 { NULL, pn_Cmp_True }, /* always true */
632 * returns the condition code
635 const char *get_cmp_suffix(int cmp_code)
637 assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
638 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
640 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
641 return cmp2condition_u[cmp_code & 7].name;
643 return cmp2condition_s[cmp_code & 15].name;
647 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
649 be_emit_string(env, get_cmp_suffix(pnc));
654 * Returns the target block for a control flow node.
657 ir_node *get_cfop_target_block(const ir_node *irn) {
658 return get_irn_link(irn);
662 * Returns the target label for a control flow node.
664 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
665 ir_node *block = get_cfop_target_block(node);
667 be_emit_cstring(env, BLOCK_PREFIX);
668 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
671 /** Return the next block in Block schedule */
672 static ir_node *next_blk_sched(const ir_node *block) {
673 return get_irn_link(block);
677 * Returns the Proj with projection number proj and NOT mode_M
680 ir_node *get_proj(const ir_node *node, long proj) {
681 const ir_edge_t *edge;
684 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
686 foreach_out_edge(node, edge) {
687 src = get_edge_src_irn(edge);
689 assert(is_Proj(src) && "Proj expected");
690 if (get_irn_mode(src) == mode_M)
693 if (get_Proj_proj(src) == proj)
700 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
703 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
705 const ir_node *proj_true;
706 const ir_node *proj_false;
707 const ir_node *block;
708 const ir_node *next_block;
711 /* get both Proj's */
712 proj_true = get_proj(node, pn_Cond_true);
713 assert(proj_true && "CondJmp without true Proj");
715 proj_false = get_proj(node, pn_Cond_false);
716 assert(proj_false && "CondJmp without false Proj");
718 /* for now, the code works for scheduled and non-schedules blocks */
719 block = get_nodes_block(node);
721 /* we have a block schedule */
722 next_block = next_blk_sched(block);
724 if (get_cfop_target_block(proj_true) == next_block) {
725 /* exchange both proj's so the second one can be omitted */
726 const ir_node *t = proj_true;
728 proj_true = proj_false;
731 pnc = get_negated_pnc(pnc, mode);
734 /* in case of unordered compare, check for parity */
735 if (pnc & pn_Cmp_Uo) {
736 be_emit_cstring(env, "\tjp ");
737 ia32_emit_cfop_target(env, proj_true);
738 be_emit_finish_line_gas(env, proj_true);
741 be_emit_cstring(env, "\tj");
742 ia32_emit_cmp_suffix(env, pnc);
743 be_emit_char(env, ' ');
744 ia32_emit_cfop_target(env, proj_true);
745 be_emit_finish_line_gas(env, proj_true);
747 /* the second Proj might be a fallthrough */
748 if (get_cfop_target_block(proj_false) != next_block) {
749 be_emit_cstring(env, "\tjmp ");
750 ia32_emit_cfop_target(env, proj_false);
751 be_emit_finish_line_gas(env, proj_false);
753 be_emit_cstring(env, "\t/* fallthrough to");
754 ia32_emit_cfop_target(env, proj_false);
755 be_emit_cstring(env, " */");
756 be_emit_finish_line_gas(env, proj_false);
761 * Emits code for conditional jump.
764 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
765 be_emit_cstring(env, "\tcmp ");
766 ia32_emit_binop(env, node);
767 be_emit_finish_line_gas(env, node);
769 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
773 * Emits code for conditional jump with two variables.
776 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
777 CondJmp_emitter(env, node);
781 * Emits code for conditional test and jump.
784 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
785 if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
786 be_emit_cstring(env, "\ttest $");
787 ia32_emit_immediate(env, node);
788 be_emit_cstring(env, ", ");
789 ia32_emit_source_register(env, node, 0);
790 be_emit_finish_line_gas(env, node);
792 be_emit_cstring(env, "\ttest ");
793 ia32_emit_source_register(env, node, 1);
794 be_emit_cstring(env, ", ");
795 ia32_emit_source_register(env, node, 0);
796 be_emit_finish_line_gas(env, node);
798 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
802 * Emits code for conditional test and jump with two variables.
805 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
806 TestJmp_emitter(env, node);
810 void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
811 be_emit_cstring(env, "/* omitted redundant test */");
812 be_emit_finish_line_gas(env, node);
814 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
818 void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
819 be_emit_cstring(env, "/* omitted redundant test/cmp */");
820 be_emit_finish_line_gas(env, node);
822 finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
826 * Emits code for conditional SSE floating point jump with two variables.
829 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
830 be_emit_cstring(env, "\tucomi");
831 ia32_emit_xmm_mode_suffix(env, node);
832 be_emit_char(env, ' ');
833 ia32_emit_binop(env, node);
834 be_emit_finish_line_gas(env, node);
836 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
840 * Emits code for conditional x87 floating point jump with two variables.
843 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
844 ia32_attr_t *attr = get_ia32_attr(node);
845 const char *reg = attr->x87[1]->name;
846 long pnc = get_ia32_pncode(node);
848 switch (get_ia32_irn_opcode(node)) {
849 case iro_ia32_fcomrJmp:
850 pnc = get_inversed_pnc(pnc);
851 reg = attr->x87[0]->name;
852 case iro_ia32_fcomJmp:
854 be_emit_cstring(env, "\tfucom ");
856 case iro_ia32_fcomrpJmp:
857 pnc = get_inversed_pnc(pnc);
858 reg = attr->x87[0]->name;
859 case iro_ia32_fcompJmp:
860 be_emit_cstring(env, "\tfucomp ");
862 case iro_ia32_fcomrppJmp:
863 pnc = get_inversed_pnc(pnc);
864 case iro_ia32_fcomppJmp:
865 be_emit_cstring(env, "\tfucompp ");
871 be_emit_char(env, '%');
872 be_emit_string(env, reg);
874 be_emit_finish_line_gas(env, node);
876 be_emit_cstring(env, "\tfnstsw %ax");
877 be_emit_finish_line_gas(env, node);
878 be_emit_cstring(env, "\tsahf");
879 be_emit_finish_line_gas(env, node);
881 finish_CondJmp(env, node, mode_E, pnc);
885 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
886 long pnc = get_ia32_pncode(node);
887 int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
888 int idx_left = 2 - is_PsiCondCMov;
889 int idx_right = 3 - is_PsiCondCMov;
890 const arch_register_t *in1, *in2, *out;
892 out = arch_get_irn_register(env->arch_env, node);
893 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
894 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
896 /* we have to emit the cmp first, because the destination register */
897 /* could be one of the compare registers */
898 if (is_ia32_CmpCMov(node)) {
899 be_emit_cstring(env, "\tcmp ");
900 ia32_emit_source_register(env, node, 1);
901 be_emit_cstring(env, ", ");
902 ia32_emit_source_register(env, node, 0);
903 } else if (is_ia32_xCmpCMov(node)) {
904 be_emit_cstring(env, "\tucomis");
905 ia32_emit_mode_suffix(env, get_irn_mode(node));
906 be_emit_char(env, ' ');
907 ia32_emit_source_register(env, node, 1);
908 be_emit_cstring(env, ", ");
909 ia32_emit_source_register(env, node, 0);
910 } else if (is_PsiCondCMov) {
911 /* omit compare because flags are already set by And/Or */
912 be_emit_cstring(env, "\ttest ");
913 ia32_emit_source_register(env, node, 0);
914 be_emit_cstring(env, ", ");
915 ia32_emit_source_register(env, node, 0);
917 assert(0 && "unsupported CMov");
919 be_emit_finish_line_gas(env, node);
921 if (REGS_ARE_EQUAL(out, in2)) {
922 /* best case: default in == out -> do nothing */
923 } else if (REGS_ARE_EQUAL(out, in1)) {
924 ir_node *n = (ir_node*) node;
925 /* true in == out -> need complement compare and exchange true and default in */
926 ir_node *t = get_irn_n(n, idx_left);
927 set_irn_n(n, idx_left, get_irn_n(n, idx_right));
928 set_irn_n(n, idx_right, t);
930 pnc = get_negated_pnc(pnc, get_irn_mode(node));
932 /* out is different from in: need copy default -> out */
933 if (is_PsiCondCMov) {
934 be_emit_cstring(env, "\tmovl ");
935 ia32_emit_dest_register(env, node, 2);
936 be_emit_cstring(env, ", ");
937 ia32_emit_dest_register(env, node, 0);
939 be_emit_cstring(env, "\tmovl ");
940 ia32_emit_source_register(env, node, 3);
941 be_emit_cstring(env, ", ");
942 ia32_emit_dest_register(env, node, 0);
944 be_emit_finish_line_gas(env, node);
947 if (is_PsiCondCMov) {
948 be_emit_cstring(env, "\tcmov");
949 ia32_emit_cmp_suffix(env, pnc);
950 be_emit_cstring(env, "l ");
951 ia32_emit_source_register(env, node, 1);
952 be_emit_cstring(env, ", ");
953 ia32_emit_dest_register(env, node, 0);
955 be_emit_cstring(env, "\tcmov");
956 ia32_emit_cmp_suffix(env, pnc);
957 be_emit_cstring(env, "l ");
958 ia32_emit_source_register(env, node, 2);
959 be_emit_cstring(env, ", ");
960 ia32_emit_dest_register(env, node, 0);
962 be_emit_finish_line_gas(env, node);
966 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
967 CMov_emitter(env, node);
971 void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
972 CMov_emitter(env, node);
976 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
977 CMov_emitter(env, node);
981 void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
982 int pnc = get_ia32_pncode(node);
984 const arch_register_t *out;
986 out = arch_get_irn_register(env->arch_env, node);
987 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
989 if (is_ia32_CmpSet(node)) {
990 be_emit_cstring(env, "\tcmp ");
991 ia32_emit_binop(env, node);
992 } else if (is_ia32_xCmpSet(node)) {
993 be_emit_cstring(env, "\tucomis");
994 ia32_emit_mode_suffix(env, get_irn_mode(get_irn_n(node, 2)));
995 be_emit_char(env, ' ');
996 ia32_emit_binop(env, node);
997 } else if (is_ia32_PsiCondSet(node)) {
998 be_emit_cstring(env, "\tcmp $0, ");
999 ia32_emit_source_register(env, node, 0);
1001 assert(0 && "unsupported Set");
1003 be_emit_finish_line_gas(env, node);
1005 /* use mov to clear target because it doesn't affect the eflags */
1006 be_emit_cstring(env, "\tmovl $0, %");
1007 be_emit_string(env, arch_register_get_name(out));
1008 be_emit_finish_line_gas(env, node);
1010 be_emit_cstring(env, "\tset");
1011 ia32_emit_cmp_suffix(env, pnc);
1012 be_emit_cstring(env, " %");
1013 be_emit_string(env, reg8bit);
1014 be_emit_finish_line_gas(env, node);
1018 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1019 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1023 void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
1024 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
1028 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1029 Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
1033 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1035 long pnc = get_ia32_pncode(node);
1036 long unord = pnc & pn_Cmp_Uo;
1038 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1041 case pn_Cmp_Leg: /* odered */
1044 case pn_Cmp_Uo: /* unordered */
1048 case pn_Cmp_Eq: /* == */
1052 case pn_Cmp_Lt: /* < */
1056 case pn_Cmp_Le: /* <= */
1060 case pn_Cmp_Gt: /* > */
1064 case pn_Cmp_Ge: /* >= */
1068 case pn_Cmp_Lg: /* != */
1073 assert(sse_pnc >= 0 && "unsupported compare");
1075 if (unord && sse_pnc != 3) {
1077 We need a separate compare against unordered.
1078 Quick and Dirty solution:
1079 - get some memory on stack
1083 - and result and stored result
1086 be_emit_cstring(env, "\tsubl $8, %esp");
1087 be_emit_finish_line_gas(env, node);
1089 be_emit_cstring(env, "\tcmpsd $3, ");
1090 ia32_emit_binop(env, node);
1091 be_emit_finish_line_gas(env, node);
1093 be_emit_cstring(env, "\tmovsd ");
1094 ia32_emit_dest_register(env, node, 0);
1095 be_emit_cstring(env, ", (%esp)");
1096 be_emit_finish_line_gas(env, node);
1099 be_emit_cstring(env, "\tcmpsd ");
1100 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1101 ia32_emit_binop(env, node);
1102 be_emit_finish_line_gas(env, node);
1104 if (unord && sse_pnc != 3) {
1105 be_emit_cstring(env, "\tandpd (%esp), ");
1106 ia32_emit_dest_register(env, node, 0);
1107 be_emit_finish_line_gas(env, node);
1109 be_emit_cstring(env, "\taddl $8, %esp");
1110 be_emit_finish_line_gas(env, node);
1114 /*********************************************************
1117 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1118 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1119 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1120 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1123 *********************************************************/
1125 /* jump table entry (target and corresponding number) */
1126 typedef struct _branch_t {
1131 /* jump table for switch generation */
1132 typedef struct _jmp_tbl_t {
1133 ir_node *defProj; /**< default target */
1134 int min_value; /**< smallest switch case */
1135 int max_value; /**< largest switch case */
1136 int num_branches; /**< number of jumps */
1137 char *label; /**< label of the jump table */
1138 branch_t *branches; /**< jump array */
1142 * Compare two variables of type branch_t. Used to sort all switch cases
1145 int ia32_cmp_branch_t(const void *a, const void *b) {
1146 branch_t *b1 = (branch_t *)a;
1147 branch_t *b2 = (branch_t *)b;
1149 if (b1->value <= b2->value)
1156 * Emits code for a SwitchJmp (creates a jump table if
1157 * possible otherwise a cmp-jmp cascade). Port from
1161 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1162 unsigned long interval;
1167 const ir_edge_t *edge;
1169 /* fill the table structure */
1170 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1171 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1173 tbl.num_branches = get_irn_n_edges(node);
1174 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1175 tbl.min_value = INT_MAX;
1176 tbl.max_value = INT_MIN;
1179 /* go over all proj's and collect them */
1180 foreach_out_edge(node, edge) {
1181 proj = get_edge_src_irn(edge);
1182 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1184 pnc = get_Proj_proj(proj);
1186 /* create branch entry */
1187 tbl.branches[i].target = proj;
1188 tbl.branches[i].value = pnc;
1190 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1191 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1193 /* check for default proj */
1194 if (pnc == get_ia32_pncode(node)) {
1195 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1202 /* sort the branches by their number */
1203 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1205 /* two-complement's magic make this work without overflow */
1206 interval = tbl.max_value - tbl.min_value;
1208 /* emit the table */
1209 be_emit_cstring(env, "\tcmpl $");
1210 be_emit_irprintf(env->emit, "%u, ", interval);
1211 ia32_emit_source_register(env, node, 0);
1212 be_emit_finish_line_gas(env, node);
1214 be_emit_cstring(env, "\tja ");
1215 ia32_emit_cfop_target(env, tbl.defProj);
1216 be_emit_finish_line_gas(env, node);
1218 if (tbl.num_branches > 1) {
1220 be_emit_cstring(env, "\tjmp *");
1221 be_emit_string(env, tbl.label);
1222 be_emit_cstring(env, "(,");
1223 ia32_emit_source_register(env, node, 0);
1224 be_emit_cstring(env, ",4)");
1225 be_emit_finish_line_gas(env, node);
1227 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1228 be_emit_cstring(env, "\t.align 4\n");
1229 be_emit_write_line(env);
1231 be_emit_string(env, tbl.label);
1232 be_emit_cstring(env, ":\n");
1233 be_emit_write_line(env);
1235 be_emit_cstring(env, ".long ");
1236 ia32_emit_cfop_target(env, tbl.branches[0].target);
1237 be_emit_finish_line_gas(env, NULL);
1239 last_value = tbl.branches[0].value;
1240 for (i = 1; i < tbl.num_branches; ++i) {
1241 while (++last_value < tbl.branches[i].value) {
1242 be_emit_cstring(env, ".long ");
1243 ia32_emit_cfop_target(env, tbl.defProj);
1244 be_emit_finish_line_gas(env, NULL);
1246 be_emit_cstring(env, ".long ");
1247 ia32_emit_cfop_target(env, tbl.branches[i].target);
1248 be_emit_finish_line_gas(env, NULL);
1250 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1252 /* one jump is enough */
1253 be_emit_cstring(env, "\tjmp ");
1254 ia32_emit_cfop_target(env, tbl.branches[0].target);
1255 be_emit_finish_line_gas(env, node);
1265 * Emits code for a unconditional jump.
1268 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1269 ir_node *block, *next_block;
1271 /* for now, the code works for scheduled and non-schedules blocks */
1272 block = get_nodes_block(node);
1274 /* we have a block schedule */
1275 next_block = next_blk_sched(block);
1276 if (get_cfop_target_block(node) != next_block) {
1277 be_emit_cstring(env, "\tjmp ");
1278 ia32_emit_cfop_target(env, node);
1280 be_emit_cstring(env, "\t/* fallthrough to ");
1281 ia32_emit_cfop_target(env, node);
1282 be_emit_cstring(env, " */");
1284 be_emit_finish_line_gas(env, node);
1287 /**********************************
1290 * | | ___ _ __ _ _| |_) |
1291 * | | / _ \| '_ \| | | | _ <
1292 * | |___| (_) | |_) | |_| | |_) |
1293 * \_____\___/| .__/ \__, |____/
1296 **********************************/
1299 * Emit movsb/w instructions to make mov count divideable by 4
1302 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1303 be_emit_cstring(env, "\tcld");
1304 be_emit_finish_line_gas(env, NULL);
1308 be_emit_cstring(env, "\tmovsb");
1309 be_emit_finish_line_gas(env, NULL);
1312 be_emit_cstring(env, "\tmovsw");
1313 be_emit_finish_line_gas(env, NULL);
1316 be_emit_cstring(env, "\tmovsb");
1317 be_emit_finish_line_gas(env, NULL);
1318 be_emit_cstring(env, "\tmovsw");
1319 be_emit_finish_line_gas(env, NULL);
1325 * Emit rep movsd instruction for memcopy.
1328 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1329 tarval *tv = get_ia32_Immop_tarval(node);
1330 int rem = get_tarval_long(tv);
1332 emit_CopyB_prolog(env, rem);
1334 be_emit_cstring(env, "\trep movsd");
1335 be_emit_finish_line_gas(env, node);
1339 * Emits unrolled memcopy.
1342 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1343 tarval *tv = get_ia32_Immop_tarval(node);
1344 int size = get_tarval_long(tv);
1346 emit_CopyB_prolog(env, size & 0x3);
1350 be_emit_cstring(env, "\tmovsd");
1351 be_emit_finish_line_gas(env, NULL);
1357 /***************************
1361 * | | / _ \| '_ \ \ / /
1362 * | |___| (_) | | | \ V /
1363 * \_____\___/|_| |_|\_/
1365 ***************************/
1368 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1371 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1372 ir_mode *ls_mode = get_ia32_ls_mode(node);
1373 int ls_bits = get_mode_size_bits(ls_mode);
1375 be_emit_cstring(env, "\tcvt");
1377 if(is_ia32_Conv_I2FP(node)) {
1379 be_emit_cstring(env, "si2ss");
1381 be_emit_cstring(env, "si2sd");
1383 } else if(is_ia32_Conv_FP2I(node)) {
1385 be_emit_cstring(env, "ss2si");
1387 be_emit_cstring(env, "sd2si");
1390 assert(is_ia32_Conv_FP2FP(node));
1392 be_emit_cstring(env, "sd2ss");
1394 be_emit_cstring(env, "ss2sd");
1397 be_emit_char(env, ' ');
1399 switch(get_ia32_op_type(node)) {
1401 ia32_emit_source_register(env, node, 2);
1402 be_emit_cstring(env, ", ");
1403 ia32_emit_dest_register(env, node, 0);
1405 case ia32_AddrModeS:
1406 ia32_emit_dest_register(env, node, 0);
1407 be_emit_cstring(env, ", ");
1408 ia32_emit_am(env, node);
1411 assert(0 && "unsupported op type for Conv");
1413 be_emit_finish_line_gas(env, node);
1417 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1418 emit_ia32_Conv_with_FP(env, node);
1422 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1423 emit_ia32_Conv_with_FP(env, node);
1427 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1428 emit_ia32_Conv_with_FP(env, node);
1432 * Emits code for an Int conversion.
1435 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1436 const char *sign_suffix;
1437 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1438 int smaller_bits = get_mode_size_bits(smaller_mode);
1440 const arch_register_t *in_reg, *out_reg;
1442 assert(!mode_is_float(smaller_mode));
1443 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1445 signed_mode = mode_is_signed(smaller_mode);
1446 if(smaller_bits == 32) {
1447 // this should not happen as it's no convert
1451 sign_suffix = signed_mode ? "s" : "z";
1454 switch(get_ia32_op_type(node)) {
1456 in_reg = get_in_reg(env, node, 2);
1457 out_reg = get_out_reg(env, node, 0);
1459 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1460 REGS_ARE_EQUAL(out_reg, in_reg) &&
1463 /* argument and result are both in EAX and */
1464 /* signedness is ok: -> use converts */
1465 if (smaller_bits == 8) {
1466 be_emit_cstring(env, "\tcbtw");
1467 } else if (smaller_bits == 16) {
1468 be_emit_cstring(env, "\tcwtl");
1472 } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
1473 /* argument and result are in the same register */
1474 /* and signedness is ok: -> use and with mask */
1475 int mask = (1 << smaller_bits) - 1;
1476 be_emit_cstring(env, "\tandl $0x");
1477 be_emit_irprintf(env->emit, "%x, ", mask);
1478 ia32_emit_dest_register(env, node, 0);
1480 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1482 be_emit_cstring(env, "\tmov");
1483 be_emit_string(env, sign_suffix);
1484 ia32_emit_mode_suffix(env, smaller_mode);
1485 be_emit_cstring(env, "l %");
1486 be_emit_string(env, sreg);
1487 be_emit_cstring(env, ", ");
1488 ia32_emit_dest_register(env, node, 0);
1491 case ia32_AddrModeS: {
1492 be_emit_cstring(env, "\tmov");
1493 be_emit_string(env, sign_suffix);
1494 ia32_emit_mode_suffix(env, smaller_mode);
1495 be_emit_cstring(env, "l %");
1496 ia32_emit_am(env, node);
1497 be_emit_cstring(env, ", ");
1498 ia32_emit_dest_register(env, node, 0);
1502 assert(0 && "unsupported op type for Conv");
1504 be_emit_finish_line_gas(env, node);
1508 * Emits code for an 8Bit Int conversion.
1510 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1511 emit_ia32_Conv_I2I(env, node);
1515 /*******************************************
1518 * | |__ ___ _ __ ___ __| | ___ ___
1519 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1520 * | |_) | __/ | | | (_) | (_| | __/\__ \
1521 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1523 *******************************************/
1526 * Emits a backend call
1529 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1530 ir_entity *ent = be_Call_get_entity(node);
1532 be_emit_cstring(env, "\tcall ");
1534 mark_entity_visited(ent);
1535 be_emit_string(env, get_entity_ld_name(ent));
1537 be_emit_char(env, '*');
1538 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1540 be_emit_finish_line_gas(env, node);
1544 * Emits code to increase stack pointer.
1547 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1548 int offs = be_get_IncSP_offset(node);
1554 be_emit_cstring(env, "\tsubl $");
1555 be_emit_irprintf(env->emit, "%u, ", offs);
1556 ia32_emit_source_register(env, node, 0);
1558 be_emit_cstring(env, "\taddl $");
1559 be_emit_irprintf(env->emit, "%u, ", -offs);
1560 ia32_emit_source_register(env, node, 0);
1562 be_emit_finish_line_gas(env, node);
1566 * Emits code to set stack pointer.
1569 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1570 be_emit_cstring(env, "\tmovl ");
1571 ia32_emit_source_register(env, node, 2);
1572 be_emit_cstring(env, ", ");
1573 ia32_emit_dest_register(env, node, 0);
1574 be_emit_finish_line_gas(env, node);
1578 * Emits code for Copy/CopyKeep.
1581 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1583 const arch_env_t *aenv = env->arch_env;
1585 if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
1586 arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
1589 if (mode_is_float(get_irn_mode(node))) {
1590 be_emit_cstring(env, "\tmovsd ");
1591 ia32_emit_source_register(env, node, 0);
1592 be_emit_cstring(env, ", ");
1593 ia32_emit_dest_register(env, node, 0);
1595 be_emit_cstring(env, "\tmovl ");
1596 ia32_emit_source_register(env, node, 0);
1597 be_emit_cstring(env, ", ");
1598 ia32_emit_dest_register(env, node, 0);
1600 be_emit_finish_line_gas(env, node);
1604 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1605 Copy_emitter(env, node, be_get_Copy_op(node));
1609 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1610 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1614 * Emits code for exchange.
1617 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1618 const arch_register_t *in1, *in2;
1619 const arch_register_class_t *cls1, *cls2;
1621 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1622 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1624 cls1 = arch_register_get_class(in1);
1625 cls2 = arch_register_get_class(in2);
1627 assert(cls1 == cls2 && "Register class mismatch at Perm");
1629 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1630 be_emit_cstring(env, "\txchg ");
1631 ia32_emit_source_register(env, node, 1);
1632 be_emit_cstring(env, ", ");
1633 ia32_emit_source_register(env, node, 0);
1634 be_emit_finish_line_gas(env, node);
1635 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1636 be_emit_cstring(env, "\txorpd ");
1637 ia32_emit_source_register(env, node, 1);
1638 be_emit_cstring(env, ", ");
1639 ia32_emit_source_register(env, node, 0);
1640 be_emit_finish_line_gas(env, NULL);
1642 be_emit_cstring(env, "\txorpd ");
1643 ia32_emit_source_register(env, node, 0);
1644 be_emit_cstring(env, ", ");
1645 ia32_emit_source_register(env, node, 1);
1646 be_emit_finish_line_gas(env, NULL);
1648 be_emit_cstring(env, "\txorpd ");
1649 ia32_emit_source_register(env, node, 1);
1650 be_emit_cstring(env, ", ");
1651 ia32_emit_source_register(env, node, 0);
1652 be_emit_finish_line_gas(env, node);
1653 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1655 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1661 * Emits code for Constant loading.
1664 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1665 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1667 if (imm_tp == ia32_ImmSymConst) {
1668 be_emit_cstring(env, "\tmovl $");
1669 ia32_emit_immediate(env, node);
1670 be_emit_cstring(env, ", ");
1671 ia32_emit_dest_register(env, node, 0);
1673 tarval *tv = get_ia32_Immop_tarval(node);
1674 assert(get_irn_mode(node) == mode_Iu);
1675 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1676 if (tarval_is_null(tv)) {
1677 if (env->isa->opt_arch == arch_pentium_4) {
1678 /* P4 prefers sub r, r, others xor r, r */
1679 be_emit_cstring(env, "\tsubl ");
1681 be_emit_cstring(env, "\txorl ");
1683 ia32_emit_dest_register(env, node, 0);
1684 be_emit_cstring(env, ", ");
1685 ia32_emit_dest_register(env, node, 0);
1687 be_emit_cstring(env, "\tmovl $");
1688 ia32_emit_immediate(env, node);
1689 be_emit_cstring(env, ", ");
1690 ia32_emit_dest_register(env, node, 0);
1693 be_emit_finish_line_gas(env, node);
1697 * Emits code to load the TLS base
1700 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1701 be_emit_cstring(env, "\tmovl %gs:0, ");
1702 ia32_emit_dest_register(env, node, 0);
1703 be_emit_finish_line_gas(env, node);
1707 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
1708 be_emit_cstring(env, "\tret");
1709 be_emit_finish_line_gas(env, node);
1713 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
1717 /***********************************************************************************
1720 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1721 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1722 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1723 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1725 ***********************************************************************************/
1728 * Enters the emitter functions for handled nodes into the generic
1729 * pointer of an opcode.
1732 void ia32_register_emitters(void) {
1734 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
1735 #define IA32_EMIT(a) IA32_EMIT2(a,a)
1736 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1737 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
1738 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1739 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
1741 /* first clear the generic function pointer for all ops */
1742 clear_irp_opcodes_generic_func();
1744 /* register all emitter functions defined in spec */
1745 ia32_register_spec_emitters();
1747 /* other ia32 emitter functions */
1753 IA32_EMIT(PsiCondCMov);
1755 IA32_EMIT(PsiCondSet);
1756 IA32_EMIT(SwitchJmp);
1759 IA32_EMIT(Conv_I2FP);
1760 IA32_EMIT(Conv_FP2I);
1761 IA32_EMIT(Conv_FP2FP);
1762 IA32_EMIT(Conv_I2I);
1763 IA32_EMIT(Conv_I2I8Bit);
1768 IA32_EMIT(xCmpCMov);
1769 IA32_EMIT(xCondJmp);
1770 IA32_EMIT2(fcomJmp, x87CondJmp);
1771 IA32_EMIT2(fcompJmp, x87CondJmp);
1772 IA32_EMIT2(fcomppJmp, x87CondJmp);
1773 IA32_EMIT2(fcomrJmp, x87CondJmp);
1774 IA32_EMIT2(fcomrpJmp, x87CondJmp);
1775 IA32_EMIT2(fcomrppJmp, x87CondJmp);
1777 /* benode emitter */
1803 static const char *last_name = NULL;
1804 static unsigned last_line = -1;
1805 static unsigned num = -1;
1808 * Emit the debug support for node node.
1811 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
1812 dbg_info *db = get_irn_dbg_info(node);
1814 const char *fname = be_retrieve_dbg_info(db, &lineno);
1816 if (! env->cg->birg->main_env->options->stabs_debug_support)
1820 if (last_name != fname) {
1822 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
1825 if (last_line != lineno) {
1828 snprintf(name, sizeof(name), ".LM%u", ++num);
1830 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
1831 be_emit_string(env, name);
1832 be_emit_cstring(env, ":\n");
1833 be_emit_write_line(env);
1838 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
1841 * Emits code for a node.
1844 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
1845 ir_op *op = get_irn_op(node);
1847 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
1849 if (op->ops.generic) {
1850 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
1851 ia32_emit_dbg(env, node);
1852 (*func) (env, node);
1854 emit_Nothing(env, node);
1855 ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
1860 * Emits gas alignment directives
1863 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
1864 be_emit_cstring(env, "\t.p2align ");
1865 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
1866 be_emit_write_line(env);
1870 * Emits gas alignment directives for Functions depended on cpu architecture.
1873 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
1875 unsigned maximum_skip;
1890 maximum_skip = (1 << align) - 1;
1891 ia32_emit_alignment(env, align, maximum_skip);
1895 * Emits gas alignment directives for Labels depended on cpu architecture.
1898 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
1899 unsigned align; unsigned maximum_skip;
1914 maximum_skip = (1 << align) - 1;
1915 ia32_emit_alignment(env, align, maximum_skip);
1919 int is_first_loop_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev_block) {
1920 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1921 double block_freq, prev_freq;
1922 static const double DELTA = .0001;
1923 cpu_support cpu = env->isa->opt_arch;
1925 if(exec_freq == NULL)
1927 if(cpu == arch_i386 || cpu == arch_i486)
1930 block_freq = get_block_execfreq(exec_freq, block);
1931 prev_freq = get_block_execfreq(exec_freq, prev_block);
1933 if(block_freq < DELTA || prev_freq < DELTA)
1936 block_freq /= prev_freq;
1940 case arch_athlon_64:
1942 return block_freq > 3;
1947 return block_freq > 2;
1951 * Walks over the nodes in a block connected by scheduling edges
1952 * and emits code for each node.
1955 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block) {
1956 ir_graph *irg = get_irn_irg(block);
1957 ir_node *start_block = get_irg_start_block(irg);
1959 const ir_node *node;
1962 assert(is_Block(block));
1964 if (block == start_block)
1967 if (need_label && get_irn_arity(block) == 1) {
1968 ir_node *pred_block = get_Block_cfgpred_block(block, 0);
1970 if (pred_block == last_block && get_irn_n_edges_kind(pred_block, EDGE_KIND_BLOCK) <= 2)
1974 /* special case: if one of our cfg preds is a switch-jmp we need a label, */
1975 /* otherwise there might be jump table entries jumping to */
1976 /* non-existent (omitted) labels */
1977 for (i = get_Block_n_cfgpreds(block) - 1; i >= 0; --i) {
1978 ir_node *pred = get_Block_cfgpred(block, i);
1980 if (is_Proj(pred)) {
1981 assert(get_irn_mode(pred) == mode_X);
1982 if (is_ia32_SwitchJmp(get_Proj_pred(pred))) {
1992 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
1994 /* align the loop headers */
1995 if (! is_first_loop_block(env, block, last_block)) {
1996 /* align blocks where the previous block has no fallthrough */
1997 arity = get_irn_arity(block);
1999 for (i = 0; i < arity; ++i) {
2000 ir_node *predblock = get_Block_cfgpred_block(block, i);
2002 if (predblock == last_block) {
2010 ia32_emit_align_label(env, env->isa->opt_arch);
2012 be_emit_cstring(env, BLOCK_PREFIX);
2013 be_emit_irprintf(env->emit, "%d:", get_irn_node_nr(block));
2014 be_emit_pad_comment(env);
2015 be_emit_cstring(env, " /* preds:");
2017 /* emit list of pred blocks in comment */
2018 arity = get_irn_arity(block);
2019 for (i = 0; i < arity; ++i) {
2020 ir_node *predblock = get_Block_cfgpred_block(block, i);
2021 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2024 if (exec_freq != NULL) {
2025 be_emit_irprintf(env->emit, " freq: %f", get_block_execfreq(exec_freq, block));
2027 be_emit_cstring(env, " */\n");
2028 be_emit_write_line(env);
2031 /* emit the contents of the block */
2032 ia32_emit_dbg(env, block);
2033 sched_foreach(block, node) {
2034 ia32_emit_node(env, node);
2039 * Emits code for function start.
2042 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2043 ir_entity *irg_ent = get_irg_entity(irg);
2044 const char *irg_name = get_entity_ld_name(irg_ent);
2045 cpu_support cpu = env->isa->opt_arch;
2046 const be_irg_t *birg = env->cg->birg;
2048 be_emit_write_line(env);
2049 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2050 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2051 ia32_emit_align_func(env, cpu);
2052 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2053 be_emit_cstring(env, ".global ");
2054 be_emit_string(env, irg_name);
2055 be_emit_char(env, '\n');
2056 be_emit_write_line(env);
2058 ia32_emit_function_object(env, irg_name);
2059 be_emit_string(env, irg_name);
2060 be_emit_cstring(env, ":\n");
2061 be_emit_write_line(env);
2065 * Emits code for function end
2068 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2069 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2070 const be_irg_t *birg = env->cg->birg;
2072 ia32_emit_function_size(env, irg_name);
2073 be_dbg_method_end(birg->main_env->db_handle);
2074 be_emit_char(env, '\n');
2075 be_emit_write_line(env);
2080 * Sets labels for control flow nodes (jump target)
2083 void ia32_gen_labels(ir_node *block, void *data) {
2085 int n = get_Block_n_cfgpreds(block);
2087 for (n--; n >= 0; n--) {
2088 pred = get_Block_cfgpred(block, n);
2089 set_irn_link(pred, block);
2094 * Main driver. Emits the code for one routine.
2096 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2097 ia32_emit_env_t env;
2099 ir_node *last_block = NULL;
2102 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2103 env.emit = &env.isa->emit;
2104 env.arch_env = cg->arch_env;
2107 ia32_register_emitters();
2109 ia32_emit_func_prolog(&env, irg);
2110 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2112 n = ARR_LEN(cg->blk_sched);
2113 for (i = 0; i < n;) {
2116 block = cg->blk_sched[i];
2118 next_bl = i < n ? cg->blk_sched[i] : NULL;
2120 /* set here the link. the emitter expects to find the next block here */
2121 set_irn_link(block, next_bl);
2122 ia32_gen_block(&env, block, last_block);
2126 ia32_emit_func_epilog(&env, irg);
2129 void ia32_init_emitter(void)
2131 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");