2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file implements the ia32 node emitter.
23 * @author Christian Wuerdig, Matthias Braun
41 #include "iredges_t.h"
44 #include "raw_bitset.h"
46 #include "../besched_t.h"
47 #include "../benode_t.h"
49 #include "../be_dbgout.h"
50 #include "../beemitter.h"
51 #include "../begnuas.h"
52 #include "../beirg_t.h"
54 #include "ia32_emitter.h"
55 #include "gen_ia32_emitter.h"
56 #include "gen_ia32_regalloc_if.h"
57 #include "ia32_nodes_attr.h"
58 #include "ia32_new_nodes.h"
59 #include "ia32_map_regs.h"
60 #include "bearch_ia32_t.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 #define BLOCK_PREFIX ".L"
66 #define SNPRINTF_BUF_LEN 128
69 * Returns the register at in position pos.
72 const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
75 const arch_env_t *arch_env = env->arch_env;
77 const arch_register_t *reg = NULL;
79 assert(get_irn_arity(irn) > pos && "Invalid IN position");
81 /* The out register of the operator at position pos is the
82 in register we need. */
83 op = get_irn_n(irn, pos);
85 reg = arch_get_irn_register(arch_env, op);
87 assert(reg && "no in register found");
89 if(reg == &ia32_gp_regs[REG_GP_NOREG])
90 panic("trying to emit noreg");
92 /* in case of unknown register: just return a valid register */
93 if (reg == &ia32_gp_regs[REG_GP_UKNWN]) {
94 const arch_register_req_t *req;
96 /* ask for the requirements */
97 req = arch_get_register_req(arch_env, irn, pos);
99 if (arch_register_req_is(req, limited)) {
100 /* in case of limited requirements: get the first allowed register */
101 unsigned idx = rbitset_next(req->limited, 0, 1);
102 reg = arch_register_for_index(req->cls, idx);
104 /* otherwise get first register in class */
105 reg = arch_register_for_index(req->cls, 0);
113 * Returns the register at out position pos.
116 const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
119 const arch_env_t *arch_env = env->arch_env;
121 const arch_register_t *reg = NULL;
123 /* 1st case: irn is not of mode_T, so it has only */
124 /* one OUT register -> good */
125 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
126 /* Proj with the corresponding projnum for the register */
128 if (get_irn_mode(irn) != mode_T) {
129 reg = arch_get_irn_register(arch_env, irn);
130 } else if (is_ia32_irn(irn)) {
131 reg = get_ia32_out_reg(irn, pos);
133 const ir_edge_t *edge;
135 foreach_out_edge(irn, edge) {
136 proj = get_edge_src_irn(edge);
137 assert(is_Proj(proj) && "non-Proj from mode_T node");
138 if (get_Proj_proj(proj) == pos) {
139 reg = arch_get_irn_register(arch_env, proj);
145 assert(reg && "no out register found");
150 * Determine the gnu assembler suffix that indicates a mode
153 char get_mode_suffix(const ir_mode *mode) {
154 if(mode_is_float(mode)) {
155 switch(get_mode_size_bits(mode)) {
165 assert(mode_is_int(mode) || mode_is_reference(mode));
166 switch(get_mode_size_bits(mode)) {
177 panic("Can't output mode_suffix for %+F\n", mode);
181 int produces_result(const ir_node *node) {
183 !is_ia32_CmpSet(node) &&
184 !is_ia32_CondJmp(node) &&
186 !is_ia32_SwitchJmp(node) &&
187 !is_ia32_TestJmp(node) &&
188 !is_ia32_xCmpSet(node) &&
189 !is_ia32_xCondJmp(node) &&
190 !is_ia32_CmpCMov(node) &&
191 !is_ia32_TestCMov(node) &&
192 !is_ia32_CmpSet(node) && /* this is correct, the Cmp has no result */
193 !is_ia32_TestSet(node);
197 const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
198 const arch_register_t *reg) {
199 switch(get_mode_size_bits(mode)) {
201 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
203 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
205 return (char *)arch_register_get_name(reg);
210 * Add a number to a prefix. This number will not be used a second time.
213 char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
214 static unsigned long id = 0;
215 snprintf(buf, buflen, "%s%lu", prefix, ++id);
219 /*************************************************************
221 * (_) | | / _| | | | |
222 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
223 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
224 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
225 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
228 *************************************************************/
230 // we have no C++ and can't define an implicit ia32_emit_env_t* cast to
231 // be_emit_env_t* so we cheat a bit...
232 #define be_emit_char(env,c) be_emit_char(env->emit,c)
233 #define be_emit_string(env,s) be_emit_string(env->emit,s)
234 #undef be_emit_cstring
235 #define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
236 #define be_emit_ident(env,i) be_emit_ident(env->emit,i)
237 #define be_emit_tarval(env,tv) be_emit_tarval(env->emit,tv)
238 #define be_emit_write_line(env) be_emit_write_line(env->emit)
239 #define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
240 #define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
242 void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
244 const arch_register_t *reg = get_in_reg(env, node, pos);
245 const char *reg_name = arch_register_get_name(reg);
247 assert(pos < get_irn_arity(node));
249 be_emit_char(env, '%');
250 be_emit_string(env, reg_name);
253 void ia32_emit_8bit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
255 const arch_register_t *reg = get_in_reg(env, node, pos);
256 const char *reg_name = arch_register_get_name(reg);
258 assert(pos < get_irn_arity(node));
260 be_emit_char(env, '%');
261 be_emit_char(env, reg_name[1]);
262 be_emit_char(env, 'l');
265 void ia32_emit_16bit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
267 const arch_register_t *reg = get_in_reg(env, node, pos);
268 const char *reg_name = arch_register_get_name(reg);
270 assert(pos < get_irn_arity(node));
272 be_emit_char(env, '%');
273 be_emit_string(env, ®_name[1]);
276 void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
277 const arch_register_t *reg = get_out_reg(env, node, pos);
278 const char *reg_name = arch_register_get_name(reg);
280 be_emit_char(env, '%');
281 be_emit_string(env, reg_name);
284 static void ia32_emit_register(ia32_emit_env_t *env, const arch_register_t *reg)
286 const char *reg_name = arch_register_get_name(reg);
288 be_emit_char(env, '%');
289 be_emit_string(env, reg_name);
292 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
294 const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
297 be_emit_char(env, '%');
298 be_emit_string(env, attr->x87[pos]->name);
301 void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
307 be_emit_char(env, '$');
309 switch(get_ia32_immop_type(node)) {
311 tv = get_ia32_Immop_tarval(node);
312 be_emit_tarval(env, tv);
314 case ia32_ImmSymConst:
315 ent = get_ia32_Immop_symconst(node);
316 set_entity_backend_marked(ent, 1);
317 id = get_entity_ld_ident(ent);
318 be_emit_ident(env, id);
325 be_emit_string(env, "BAD");
330 void ia32_emit_mode_suffix_mode(ia32_emit_env_t *env, const ir_mode *mode)
332 be_emit_char(env, get_mode_suffix(mode));
335 void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
337 ir_mode *mode = get_ia32_ls_mode(node);
341 ia32_emit_mode_suffix_mode(env, mode);
344 void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
346 ir_mode *mode = get_ia32_ls_mode(node);
348 ia32_emit_mode_suffix_mode(env, mode);
352 char get_xmm_mode_suffix(ir_mode *mode)
354 assert(mode_is_float(mode));
355 switch(get_mode_size_bits(mode)) {
366 void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
368 ir_mode *mode = get_ia32_ls_mode(node);
369 assert(mode != NULL);
370 be_emit_char(env, 's');
371 be_emit_char(env, get_xmm_mode_suffix(mode));
374 void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
376 ir_mode *mode = get_ia32_ls_mode(node);
377 assert(mode != NULL);
378 be_emit_char(env, get_xmm_mode_suffix(mode));
381 void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
383 if(get_mode_size_bits(mode) == 32)
385 if(mode_is_signed(mode)) {
386 be_emit_char(env, 's');
388 be_emit_char(env, 'z');
393 void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
395 switch (be_gas_flavour) {
396 case GAS_FLAVOUR_NORMAL:
397 be_emit_cstring(env, "\t.type\t");
398 be_emit_string(env, name);
399 be_emit_cstring(env, ", @function\n");
400 be_emit_write_line(env);
402 case GAS_FLAVOUR_MINGW:
403 be_emit_cstring(env, "\t.def\t");
404 be_emit_string(env, name);
405 be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
406 be_emit_write_line(env);
414 void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
416 switch (be_gas_flavour) {
417 case GAS_FLAVOUR_NORMAL:
418 be_emit_cstring(env, "\t.size\t");
419 be_emit_string(env, name);
420 be_emit_cstring(env, ", .-");
421 be_emit_string(env, name);
422 be_emit_char(env, '\n');
423 be_emit_write_line(env);
432 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node);
435 * Emits registers and/or address mode of a binary operation.
437 void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
439 const ir_node *right_op = get_irn_n(node, 3);
441 switch(get_ia32_op_type(node)) {
443 if(is_ia32_Immediate(right_op)) {
444 emit_ia32_Immediate(env, right_op);
445 be_emit_cstring(env, ", ");
446 ia32_emit_source_register(env, node, 2);
448 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
449 ia32_emit_immediate(env, node);
450 be_emit_cstring(env, ", ");
451 ia32_emit_source_register(env, node, 2);
453 const arch_register_t *in1 = get_in_reg(env, node, 2);
454 const arch_register_t *in2 = get_in_reg(env, node, 3);
455 const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
456 const arch_register_t *in;
459 in = out ? ((out == in2) ? in1 : in2) : in2;
460 out = out ? out : in1;
461 in_name = arch_register_get_name(in);
463 if (is_ia32_emit_cl(node)) {
464 assert(in == &ia32_gp_regs[REG_ECX]);
468 be_emit_char(env, '%');
469 be_emit_string(env, in_name);
470 be_emit_cstring(env, ", %");
471 be_emit_string(env, arch_register_get_name(out));
475 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
476 assert(!produces_result(node) &&
477 "Source AM with Const must not produce result");
478 ia32_emit_immediate(env, node);
479 be_emit_cstring(env, ", ");
480 ia32_emit_am(env, node);
481 } else if(is_ia32_Immediate(right_op)) {
482 assert(!produces_result(node) &&
483 "Source AM with Const must not produce result");
485 emit_ia32_Immediate(env, right_op);
486 be_emit_cstring(env, ", ");
487 ia32_emit_am(env, node);
488 } else if (produces_result(node)) {
489 ia32_emit_am(env, node);
490 be_emit_cstring(env, ", ");
491 ia32_emit_dest_register(env, node, 0);
493 ia32_emit_am(env, node);
494 be_emit_cstring(env, ", ");
495 ia32_emit_source_register(env, node, 2);
499 right_pos = get_irn_arity(node) >= 5 ? 3 : 2;
500 right_op = get_irn_n(node, right_pos);
501 if(is_ia32_Immediate(right_op)) {
502 emit_ia32_Immediate(env, right_op);
503 be_emit_cstring(env, ", ");
504 ia32_emit_am(env, node);
506 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
507 ia32_emit_immediate(env, node);
508 be_emit_cstring(env, ", ");
509 ia32_emit_am(env, node);
511 const arch_register_t *in1 = get_in_reg(env, node, right_pos);
512 ir_mode *mode = get_ia32_ls_mode(node);
515 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
517 if (is_ia32_emit_cl(node)) {
518 assert(in1 == &ia32_gp_regs[REG_ECX]);
522 be_emit_char(env, '%');
523 be_emit_string(env, in_name);
524 be_emit_cstring(env, ", ");
525 ia32_emit_am(env, node);
529 assert(0 && "unsupported op type");
534 * Emits registers and/or address mode of a binary operation.
536 void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
537 switch(get_ia32_op_type(node)) {
539 if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
540 // should not happen...
543 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
544 const arch_register_t *in1 = x87_attr->x87[0];
545 const arch_register_t *in2 = x87_attr->x87[1];
546 const arch_register_t *out = x87_attr->x87[2];
547 const arch_register_t *in;
549 in = out ? ((out == in2) ? in1 : in2) : in2;
550 out = out ? out : in1;
552 be_emit_char(env, '%');
553 be_emit_string(env, arch_register_get_name(in));
554 be_emit_cstring(env, ", %");
555 be_emit_string(env, arch_register_get_name(out));
560 ia32_emit_am(env, node);
563 assert(0 && "unsupported op type");
567 void ia32_emit_am_or_dest_register(ia32_emit_env_t *env, const ir_node *node,
569 if(get_ia32_op_type(node) == ia32_Normal) {
570 ia32_emit_dest_register(env, node, pos);
572 assert(get_ia32_op_type(node) == ia32_AddrModeD);
573 ia32_emit_am(env, node);
578 * Emits registers and/or address mode of a unary operation.
580 void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node, int pos) {
583 switch(get_ia32_op_type(node)) {
585 op = get_irn_n(node, pos);
586 if (is_ia32_Immediate(op)) {
587 emit_ia32_Immediate(env, op);
588 } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
589 ia32_emit_immediate(env, node);
591 ia32_emit_source_register(env, node, pos);
596 ia32_emit_am(env, node);
599 assert(0 && "unsupported op type");
604 * Emits address mode.
606 void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
607 ir_entity *ent = get_ia32_am_sc(node);
608 int offs = get_ia32_am_offs_int(node);
609 ir_node *base = get_irn_n(node, 0);
610 int has_base = !is_ia32_NoReg_GP(base);
611 ir_node *index = get_irn_n(node, 1);
612 int has_index = !is_ia32_NoReg_GP(index);
614 /* just to be sure... */
615 assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
621 set_entity_backend_marked(ent, 1);
622 id = get_entity_ld_ident(ent);
623 if (is_ia32_am_sc_sign(node))
624 be_emit_char(env, '-');
625 be_emit_ident(env, id);
627 if(get_entity_owner(ent) == get_tls_type()) {
628 if (get_entity_visibility(ent) == visibility_external_allocated) {
629 be_emit_cstring(env, "@INDNTPOFF");
631 be_emit_cstring(env, "@NTPOFF");
638 be_emit_irprintf(env->emit, "%+d", offs);
640 be_emit_irprintf(env->emit, "%d", offs);
644 if (has_base || has_index) {
645 be_emit_char(env, '(');
649 ia32_emit_source_register(env, node, 0);
652 /* emit index + scale */
655 be_emit_char(env, ',');
656 ia32_emit_source_register(env, node, 1);
658 scale = get_ia32_am_scale(node);
660 be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
663 be_emit_char(env, ')');
667 /*************************************************
670 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
671 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
672 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
673 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
675 *************************************************/
678 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
681 * coding of conditions
683 struct cmp2conditon_t {
689 * positive conditions for signed compares
692 const struct cmp2conditon_t cmp2condition_s[] = {
693 { NULL, pn_Cmp_False }, /* always false */
694 { "e", pn_Cmp_Eq }, /* == */
695 { "l", pn_Cmp_Lt }, /* < */
696 { "le", pn_Cmp_Le }, /* <= */
697 { "g", pn_Cmp_Gt }, /* > */
698 { "ge", pn_Cmp_Ge }, /* >= */
699 { "ne", pn_Cmp_Lg }, /* != */
700 { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
704 * positive conditions for unsigned compares
707 const struct cmp2conditon_t cmp2condition_u[] = {
708 { NULL, pn_Cmp_False }, /* always false */
709 { "e", pn_Cmp_Eq }, /* == */
710 { "b", pn_Cmp_Lt }, /* < */
711 { "be", pn_Cmp_Le }, /* <= */
712 { "a", pn_Cmp_Gt }, /* > */
713 { "ae", pn_Cmp_Ge }, /* >= */
714 { "ne", pn_Cmp_Lg }, /* != */
715 { NULL, pn_Cmp_True }, /* always true */
719 * returns the condition code
722 const char *get_cmp_suffix(pn_Cmp cmp_code)
724 assert( (cmp2condition_s[cmp_code & 7].num) == (cmp_code & 7));
725 assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
727 if((cmp_code & ia32_pn_Cmp_Unsigned)) {
728 return cmp2condition_u[cmp_code & 7].name;
730 return cmp2condition_s[cmp_code & 7].name;
734 void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
736 be_emit_string(env, get_cmp_suffix(pnc));
741 * Returns the target block for a control flow node.
744 ir_node *get_cfop_target_block(const ir_node *irn) {
745 return get_irn_link(irn);
749 * Emits a block label for the given block.
752 void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
754 if (has_Block_label(block)) {
755 be_emit_string(env, be_gas_label_prefix());
756 be_emit_irprintf(env->emit, "%u", (unsigned)get_Block_label(block));
758 be_emit_cstring(env, BLOCK_PREFIX);
759 be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
764 * Emits the target label for a control flow node.
767 void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
768 ir_node *block = get_cfop_target_block(node);
770 ia32_emit_block_name(env, block);
773 /** Return the next block in Block schedule */
774 static ir_node *next_blk_sched(const ir_node *block) {
775 return get_irn_link(block);
779 * Returns the Proj with projection number proj and NOT mode_M
782 ir_node *get_proj(const ir_node *node, long proj) {
783 const ir_edge_t *edge;
786 assert(get_irn_mode(node) == mode_T && "expected mode_T node");
788 foreach_out_edge(node, edge) {
789 src = get_edge_src_irn(edge);
791 assert(is_Proj(src) && "Proj expected");
792 if (get_irn_mode(src) == mode_M)
795 if (get_Proj_proj(src) == proj)
802 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
805 void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
807 const ir_node *proj_true;
808 const ir_node *proj_false;
809 const ir_node *block;
810 const ir_node *next_block;
813 /* get both Proj's */
814 proj_true = get_proj(node, pn_Cond_true);
815 assert(proj_true && "CondJmp without true Proj");
817 proj_false = get_proj(node, pn_Cond_false);
818 assert(proj_false && "CondJmp without false Proj");
820 /* for now, the code works for scheduled and non-schedules blocks */
821 block = get_nodes_block(node);
823 /* we have a block schedule */
824 next_block = next_blk_sched(block);
826 if (get_cfop_target_block(proj_true) == next_block) {
827 /* exchange both proj's so the second one can be omitted */
828 const ir_node *t = proj_true;
830 proj_true = proj_false;
833 pnc = get_negated_pnc(pnc, mode);
836 if (mode_is_float(mode)) {
837 /* Some floating point comparisons require a test of the parity flag, which
838 * indicates that the result is unordered */
841 be_emit_cstring(env, "\tjp ");
842 ia32_emit_cfop_target(env, proj_true);
843 be_emit_finish_line_gas(env, proj_true);
847 be_emit_cstring(env, "\tjnp ");
848 ia32_emit_cfop_target(env, proj_true);
849 be_emit_finish_line_gas(env, proj_true);
855 be_emit_cstring(env, "\tjp ");
856 ia32_emit_cfop_target(env, proj_false);
857 be_emit_finish_line_gas(env, proj_false);
863 be_emit_cstring(env, "\tjp ");
864 ia32_emit_cfop_target(env, proj_true);
865 be_emit_finish_line_gas(env, proj_true);
870 /* The bits set by floating point compares correspond to unsigned
872 pnc |= ia32_pn_Cmp_Unsigned;
877 be_emit_cstring(env, "\tj");
878 ia32_emit_cmp_suffix(env, pnc);
879 be_emit_char(env, ' ');
880 ia32_emit_cfop_target(env, proj_true);
881 be_emit_finish_line_gas(env, proj_true);
884 /* the second Proj might be a fallthrough */
885 if (get_cfop_target_block(proj_false) != next_block) {
886 be_emit_cstring(env, "\tjmp ");
887 ia32_emit_cfop_target(env, proj_false);
888 be_emit_finish_line_gas(env, proj_false);
890 be_emit_cstring(env, "\t/* fallthrough to ");
891 ia32_emit_cfop_target(env, proj_false);
892 be_emit_cstring(env, " */");
893 be_emit_finish_line_gas(env, proj_false);
898 * Emits code for conditional jump.
901 void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
902 be_emit_cstring(env, "\tcmp");
903 ia32_emit_mode_suffix(env, node);
904 be_emit_char(env, ' ');
905 ia32_emit_binop(env, node);
906 be_emit_finish_line_gas(env, node);
908 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
912 * Emits code for conditional jump with two variables.
915 void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
916 CondJmp_emitter(env, node);
920 * Emits code for conditional test and jump.
923 void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
924 be_emit_cstring(env, "\ttest");
925 ia32_emit_mode_suffix(env, node);
926 be_emit_char(env, ' ');
928 ia32_emit_binop(env, node);
929 be_emit_finish_line_gas(env, node);
931 finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
935 * Emits code for conditional test and jump with two variables.
938 void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
939 TestJmp_emitter(env, node);
943 * Emits code for conditional SSE floating point jump with two variables.
946 void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
947 be_emit_cstring(env, "\tucomi");
948 ia32_emit_xmm_mode_suffix(env, node);
949 be_emit_char(env, ' ');
950 ia32_emit_binop(env, node);
951 be_emit_finish_line_gas(env, node);
953 finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
957 * Emits code for conditional x87 floating point jump with two variables.
960 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
961 const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
962 const char *reg = x87_attr->x87[1]->name;
963 long pnc = get_ia32_pncode(node);
965 switch (get_ia32_irn_opcode(node)) {
966 case iro_ia32_fcomrJmp:
967 pnc = get_inversed_pnc(pnc);
968 reg = x87_attr->x87[0]->name;
969 case iro_ia32_fcomJmp:
971 be_emit_cstring(env, "\tfucom ");
973 case iro_ia32_fcomrpJmp:
974 pnc = get_inversed_pnc(pnc);
975 reg = x87_attr->x87[0]->name;
976 case iro_ia32_fcompJmp:
977 be_emit_cstring(env, "\tfucomp ");
979 case iro_ia32_fcomrppJmp:
980 pnc = get_inversed_pnc(pnc);
981 case iro_ia32_fcomppJmp:
982 be_emit_cstring(env, "\tfucompp ");
988 be_emit_char(env, '%');
989 be_emit_string(env, reg);
991 be_emit_finish_line_gas(env, node);
993 be_emit_cstring(env, "\tfnstsw %ax");
994 be_emit_finish_line_gas(env, node);
995 be_emit_cstring(env, "\tsahf");
996 be_emit_finish_line_gas(env, node);
998 finish_CondJmp(env, node, mode_E, pnc);
1002 void CMov_emitter(ia32_emit_env_t *env, const ir_node *node)
1004 const arch_register_t *in1, *in2, *out;
1005 long pnc = get_ia32_pncode(node);
1007 out = arch_get_irn_register(env->arch_env, node);
1009 /* we have to emit the cmp first, because the destination register */
1010 /* could be one of the compare registers */
1011 if (is_ia32_xCmpCMov(node)) {
1012 be_emit_cstring(env, "\tucomis");
1013 ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
1014 be_emit_char(env, ' ');
1015 ia32_emit_source_register(env, node, 1);
1016 be_emit_cstring(env, ", ");
1017 ia32_emit_source_register(env, node, 0);
1019 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 2));
1020 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 3));
1022 if (is_ia32_CmpCMov(node)) {
1023 be_emit_cstring(env, "\tcmp ");
1025 assert(is_ia32_TestCMov(node));
1026 be_emit_cstring(env, "\ttest ");
1028 ia32_emit_binop(env, node);
1030 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 5));
1031 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 6));
1033 be_emit_finish_line_gas(env, node);
1036 /* best case: default in == out -> do nothing */
1037 } else if(in2 == &ia32_gp_regs[REG_GP_UKNWN]) {
1038 /* also nothign to do for unknown regs */
1039 } else if (out == in1) {
1040 const arch_register_t *t;
1041 /* true in == out -> need complement compare and exchange true and
1046 pnc = get_negated_pnc(pnc, get_irn_mode(node));
1048 /* out is different from both ins: need copy default -> out */
1049 be_emit_cstring(env, "\tmovl ");
1050 ia32_emit_register(env, in2);
1051 be_emit_cstring(env, ", ");
1052 ia32_emit_register(env, out);
1053 be_emit_finish_line_gas(env, node);
1056 be_emit_cstring(env, "\tcmov");
1057 ia32_emit_cmp_suffix(env, pnc );
1058 be_emit_cstring(env, "l ");
1059 ia32_emit_register(env, in1);
1060 be_emit_cstring(env, ", ");
1061 ia32_emit_register(env, out);
1063 be_emit_finish_line_gas(env, node);
1067 void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node)
1069 CMov_emitter(env, node);
1073 void emit_ia32_TestCMov(ia32_emit_env_t *env, const ir_node *node)
1075 CMov_emitter(env, node);
1079 void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node)
1081 CMov_emitter(env, node);
1085 void Set_emitter(ia32_emit_env_t *env, const ir_node *node)
1087 long pnc = get_ia32_pncode(node);
1088 const char *reg8bit;
1089 const arch_register_t *out;
1091 out = arch_get_irn_register(env->arch_env, node);
1092 reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
1094 if(is_ia32_xCmpSet(node)) {
1095 be_emit_cstring(env, "\tucomis");
1096 ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
1097 be_emit_char(env, ' ');
1098 ia32_emit_binop(env, node);
1100 if (is_ia32_CmpSet(node)) {
1101 be_emit_cstring(env, "\tcmp ");
1103 assert(is_ia32_TestSet(node));
1104 be_emit_cstring(env, "\ttest ");
1106 ia32_emit_binop(env, node);
1108 be_emit_finish_line_gas(env, node);
1110 /* use mov to clear target because it doesn't affect the eflags */
1111 be_emit_cstring(env, "\tmovl $0, %");
1112 be_emit_string(env, arch_register_get_name(out));
1113 be_emit_finish_line_gas(env, node);
1115 be_emit_cstring(env, "\tset");
1116 ia32_emit_cmp_suffix(env, pnc);
1117 be_emit_cstring(env, " %");
1118 be_emit_string(env, reg8bit);
1119 be_emit_finish_line_gas(env, node);
1123 void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
1124 Set_emitter(env, node);
1128 void emit_ia32_TestSet(ia32_emit_env_t *env, const ir_node *node) {
1129 Set_emitter(env, node);
1133 void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
1134 Set_emitter(env, node);
1138 void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
1140 long pnc = get_ia32_pncode(node);
1141 long unord = pnc & pn_Cmp_Uo;
1143 assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
1146 case pn_Cmp_Leg: /* odered */
1149 case pn_Cmp_Uo: /* unordered */
1153 case pn_Cmp_Eq: /* == */
1157 case pn_Cmp_Lt: /* < */
1161 case pn_Cmp_Le: /* <= */
1165 case pn_Cmp_Gt: /* > */
1169 case pn_Cmp_Ge: /* >= */
1173 case pn_Cmp_Lg: /* != */
1178 assert(sse_pnc >= 0 && "unsupported compare");
1180 if (unord && sse_pnc != 3) {
1182 We need a separate compare against unordered.
1183 Quick and Dirty solution:
1184 - get some memory on stack
1188 - and result and stored result
1191 be_emit_cstring(env, "\tsubl $8, %esp");
1192 be_emit_finish_line_gas(env, node);
1194 be_emit_cstring(env, "\tcmpsd $3, ");
1195 ia32_emit_binop(env, node);
1196 be_emit_finish_line_gas(env, node);
1198 be_emit_cstring(env, "\tmovsd ");
1199 ia32_emit_dest_register(env, node, 0);
1200 be_emit_cstring(env, ", (%esp)");
1201 be_emit_finish_line_gas(env, node);
1204 be_emit_cstring(env, "\tcmpsd ");
1205 be_emit_irprintf(env->emit, "%d, ", sse_pnc);
1206 ia32_emit_binop(env, node);
1207 be_emit_finish_line_gas(env, node);
1209 if (unord && sse_pnc != 3) {
1210 be_emit_cstring(env, "\tandpd (%esp), ");
1211 ia32_emit_dest_register(env, node, 0);
1212 be_emit_finish_line_gas(env, node);
1214 be_emit_cstring(env, "\taddl $8, %esp");
1215 be_emit_finish_line_gas(env, node);
1219 /*********************************************************
1222 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
1223 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
1224 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
1225 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
1228 *********************************************************/
1230 /* jump table entry (target and corresponding number) */
1231 typedef struct _branch_t {
1236 /* jump table for switch generation */
1237 typedef struct _jmp_tbl_t {
1238 ir_node *defProj; /**< default target */
1239 long min_value; /**< smallest switch case */
1240 long max_value; /**< largest switch case */
1241 long num_branches; /**< number of jumps */
1242 char *label; /**< label of the jump table */
1243 branch_t *branches; /**< jump array */
1247 * Compare two variables of type branch_t. Used to sort all switch cases
1250 int ia32_cmp_branch_t(const void *a, const void *b) {
1251 branch_t *b1 = (branch_t *)a;
1252 branch_t *b2 = (branch_t *)b;
1254 if (b1->value <= b2->value)
1261 * Emits code for a SwitchJmp (creates a jump table if
1262 * possible otherwise a cmp-jmp cascade). Port from
1266 void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
1267 unsigned long interval;
1272 const ir_edge_t *edge;
1274 /* fill the table structure */
1275 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
1276 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
1278 tbl.num_branches = get_irn_n_edges(node);
1279 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
1280 tbl.min_value = INT_MAX;
1281 tbl.max_value = INT_MIN;
1284 /* go over all proj's and collect them */
1285 foreach_out_edge(node, edge) {
1286 proj = get_edge_src_irn(edge);
1287 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
1289 pnc = get_Proj_proj(proj);
1291 /* create branch entry */
1292 tbl.branches[i].target = proj;
1293 tbl.branches[i].value = pnc;
1295 tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
1296 tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
1298 /* check for default proj */
1299 if (pnc == get_ia32_pncode(node)) {
1300 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
1307 /* sort the branches by their number */
1308 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
1310 /* two-complement's magic make this work without overflow */
1311 interval = tbl.max_value - tbl.min_value;
1313 /* emit the table */
1314 be_emit_cstring(env, "\tcmpl $");
1315 be_emit_irprintf(env->emit, "%u, ", interval);
1316 ia32_emit_source_register(env, node, 0);
1317 be_emit_finish_line_gas(env, node);
1319 be_emit_cstring(env, "\tja ");
1320 ia32_emit_cfop_target(env, tbl.defProj);
1321 be_emit_finish_line_gas(env, node);
1323 if (tbl.num_branches > 1) {
1325 be_emit_cstring(env, "\tjmp *");
1326 be_emit_string(env, tbl.label);
1327 be_emit_cstring(env, "(,");
1328 ia32_emit_source_register(env, node, 0);
1329 be_emit_cstring(env, ",4)");
1330 be_emit_finish_line_gas(env, node);
1332 be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
1333 be_emit_cstring(env, "\t.align 4\n");
1334 be_emit_write_line(env);
1336 be_emit_string(env, tbl.label);
1337 be_emit_cstring(env, ":\n");
1338 be_emit_write_line(env);
1340 be_emit_cstring(env, ".long ");
1341 ia32_emit_cfop_target(env, tbl.branches[0].target);
1342 be_emit_finish_line_gas(env, NULL);
1344 last_value = tbl.branches[0].value;
1345 for (i = 1; i < tbl.num_branches; ++i) {
1346 while (++last_value < tbl.branches[i].value) {
1347 be_emit_cstring(env, ".long ");
1348 ia32_emit_cfop_target(env, tbl.defProj);
1349 be_emit_finish_line_gas(env, NULL);
1351 be_emit_cstring(env, ".long ");
1352 ia32_emit_cfop_target(env, tbl.branches[i].target);
1353 be_emit_finish_line_gas(env, NULL);
1355 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
1357 /* one jump is enough */
1358 be_emit_cstring(env, "\tjmp ");
1359 ia32_emit_cfop_target(env, tbl.branches[0].target);
1360 be_emit_finish_line_gas(env, node);
1370 * Emits code for a unconditional jump.
1373 void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
1374 ir_node *block, *next_block;
1376 /* for now, the code works for scheduled and non-schedules blocks */
1377 block = get_nodes_block(node);
1379 /* we have a block schedule */
1380 next_block = next_blk_sched(block);
1381 if (get_cfop_target_block(node) != next_block) {
1382 be_emit_cstring(env, "\tjmp ");
1383 ia32_emit_cfop_target(env, node);
1385 be_emit_cstring(env, "\t/* fallthrough to ");
1386 ia32_emit_cfop_target(env, node);
1387 be_emit_cstring(env, " */");
1389 be_emit_finish_line_gas(env, node);
1393 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node)
1395 const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
1397 be_emit_char(env, '$');
1398 if(attr->symconst != NULL) {
1399 ident *id = get_entity_ld_ident(attr->symconst);
1401 if(attr->attr.data.am_sc_sign)
1402 be_emit_char(env, '-');
1403 be_emit_ident(env, id);
1405 if(attr->symconst == NULL || attr->offset != 0) {
1406 if(attr->symconst != NULL)
1407 be_emit_char(env, '+');
1408 be_emit_irprintf(env->emit, "0x%X", attr->offset);
1413 const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
1416 const arch_register_t *reg;
1417 const char *reg_name;
1421 const ia32_attr_t *attr;
1428 /* parse modifiers */
1431 ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node);
1432 be_emit_char(env, '%');
1435 be_emit_char(env, '%');
1455 ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier "
1456 "'%c' for asm op\n", node, c);
1462 sscanf(s, "%d%n", &num, &p);
1464 ir_fprintf(stderr, "Warning: Couldn't parse assembler operand (%+F)\n",
1472 attr = get_ia32_attr_const(node);
1473 n_outs = ARR_LEN(attr->slots);
1475 reg = get_out_reg(env, node, num);
1478 int in = num - n_outs;
1479 if(in >= get_irn_arity(node)) {
1480 ir_fprintf(stderr, "Warning: Invalid input %d specified in asm "
1481 "op (%+F)\n", num, node);
1484 pred = get_irn_n(node, in);
1485 /* might be an immediate value */
1486 if(is_ia32_Immediate(pred)) {
1487 emit_ia32_Immediate(env, pred);
1490 reg = get_in_reg(env, node, in);
1493 ir_fprintf(stderr, "Warning: no register assigned for %d asm op "
1494 "(%+F)\n", num, node);
1499 be_emit_char(env, '%');
1502 reg_name = arch_register_get_name(reg);
1505 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
1508 reg_name = ia32_get_mapped_reg_name(env->isa->regs_8bit_high, reg);
1511 reg_name = ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
1514 panic("Invalid asm op modifier");
1516 be_emit_string(env, reg_name);
1522 * Emits code for an ASM pseudo op.
1525 void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node)
1527 const void *gen_attr = get_irn_generic_attr_const(node);
1528 const ia32_asm_attr_t *attr
1529 = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, gen_attr);
1530 ident *asm_text = attr->asm_text;
1531 const char *s = get_id_str(asm_text);
1533 be_emit_cstring(env, "# Begin ASM \t");
1534 be_emit_finish_line_gas(env, node);
1537 be_emit_char(env, '\t');
1541 s = emit_asm_operand(env, node, s);
1544 be_emit_char(env, *s);
1549 be_emit_char(env, '\n');
1550 be_emit_write_line(env);
1552 be_emit_cstring(env, "# End ASM\n");
1553 be_emit_write_line(env);
1556 /**********************************
1559 * | | ___ _ __ _ _| |_) |
1560 * | | / _ \| '_ \| | | | _ <
1561 * | |___| (_) | |_) | |_| | |_) |
1562 * \_____\___/| .__/ \__, |____/
1565 **********************************/
1568 * Emit movsb/w instructions to make mov count divideable by 4
1571 void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
1572 be_emit_cstring(env, "\tcld");
1573 be_emit_finish_line_gas(env, NULL);
1577 be_emit_cstring(env, "\tmovsb");
1578 be_emit_finish_line_gas(env, NULL);
1581 be_emit_cstring(env, "\tmovsw");
1582 be_emit_finish_line_gas(env, NULL);
1585 be_emit_cstring(env, "\tmovsb");
1586 be_emit_finish_line_gas(env, NULL);
1587 be_emit_cstring(env, "\tmovsw");
1588 be_emit_finish_line_gas(env, NULL);
1594 * Emit rep movsd instruction for memcopy.
1597 void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
1598 tarval *tv = get_ia32_Immop_tarval(node);
1599 int rem = get_tarval_long(tv);
1601 emit_CopyB_prolog(env, rem);
1603 be_emit_cstring(env, "\trep movsd");
1604 be_emit_finish_line_gas(env, node);
1608 * Emits unrolled memcopy.
1611 void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
1612 tarval *tv = get_ia32_Immop_tarval(node);
1613 int size = get_tarval_long(tv);
1615 emit_CopyB_prolog(env, size & 0x3);
1619 be_emit_cstring(env, "\tmovsd");
1620 be_emit_finish_line_gas(env, NULL);
1626 /***************************
1630 * | | / _ \| '_ \ \ / /
1631 * | |___| (_) | | | \ V /
1632 * \_____\___/|_| |_|\_/
1634 ***************************/
1637 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1640 void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
1641 ir_mode *ls_mode = get_ia32_ls_mode(node);
1642 int ls_bits = get_mode_size_bits(ls_mode);
1644 be_emit_cstring(env, "\tcvt");
1646 if(is_ia32_Conv_I2FP(node)) {
1648 be_emit_cstring(env, "si2ss");
1650 be_emit_cstring(env, "si2sd");
1652 } else if(is_ia32_Conv_FP2I(node)) {
1654 be_emit_cstring(env, "ss2si");
1656 be_emit_cstring(env, "sd2si");
1659 assert(is_ia32_Conv_FP2FP(node));
1661 be_emit_cstring(env, "sd2ss");
1663 be_emit_cstring(env, "ss2sd");
1666 be_emit_char(env, ' ');
1668 switch(get_ia32_op_type(node)) {
1670 ia32_emit_source_register(env, node, 2);
1671 be_emit_cstring(env, ", ");
1672 ia32_emit_dest_register(env, node, 0);
1674 case ia32_AddrModeS:
1675 ia32_emit_dest_register(env, node, 0);
1676 be_emit_cstring(env, ", ");
1677 ia32_emit_am(env, node);
1680 assert(0 && "unsupported op type for Conv");
1682 be_emit_finish_line_gas(env, node);
1686 void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
1687 emit_ia32_Conv_with_FP(env, node);
1691 void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
1692 emit_ia32_Conv_with_FP(env, node);
1696 void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
1697 emit_ia32_Conv_with_FP(env, node);
1701 * Emits code for an Int conversion.
1704 void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
1705 const char *sign_suffix;
1706 ir_mode *smaller_mode = get_ia32_ls_mode(node);
1707 int smaller_bits = get_mode_size_bits(smaller_mode);
1709 const arch_register_t *in_reg, *out_reg;
1711 assert(!mode_is_float(smaller_mode));
1712 assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
1714 signed_mode = mode_is_signed(smaller_mode);
1715 if(smaller_bits == 32) {
1716 // this should not happen as it's no convert
1720 sign_suffix = signed_mode ? "s" : "z";
1723 switch(get_ia32_op_type(node)) {
1725 in_reg = get_in_reg(env, node, 2);
1726 out_reg = get_out_reg(env, node, 0);
1728 if (in_reg == &ia32_gp_regs[REG_EAX] &&
1729 out_reg == &ia32_gp_regs[REG_EAX] &&
1733 /* argument and result are both in EAX and */
1734 /* signedness is ok: -> use the smaller cwtl opcode */
1735 be_emit_cstring(env, "\tcwtl");
1737 const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
1739 be_emit_cstring(env, "\tmov");
1740 be_emit_string(env, sign_suffix);
1741 ia32_emit_mode_suffix_mode(env, smaller_mode);
1742 be_emit_cstring(env, "l %");
1743 be_emit_string(env, sreg);
1744 be_emit_cstring(env, ", ");
1745 ia32_emit_dest_register(env, node, 0);
1748 case ia32_AddrModeS: {
1749 be_emit_cstring(env, "\tmov");
1750 be_emit_string(env, sign_suffix);
1751 ia32_emit_mode_suffix_mode(env, smaller_mode);
1752 be_emit_cstring(env, "l ");
1753 ia32_emit_am(env, node);
1754 be_emit_cstring(env, ", ");
1755 ia32_emit_dest_register(env, node, 0);
1759 assert(0 && "unsupported op type for Conv");
1761 be_emit_finish_line_gas(env, node);
1765 * Emits code for an 8Bit Int conversion.
1767 void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
1768 emit_ia32_Conv_I2I(env, node);
1772 /*******************************************
1775 * | |__ ___ _ __ ___ __| | ___ ___
1776 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1777 * | |_) | __/ | | | (_) | (_| | __/\__ \
1778 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1780 *******************************************/
1783 * Emits a backend call
1786 void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
1787 ir_entity *ent = be_Call_get_entity(node);
1789 be_emit_cstring(env, "\tcall ");
1791 set_entity_backend_marked(ent, 1);
1792 be_emit_string(env, get_entity_ld_name(ent));
1794 be_emit_char(env, '*');
1795 ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
1797 be_emit_finish_line_gas(env, node);
1801 * Emits code to increase stack pointer.
1804 void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
1805 int offs = be_get_IncSP_offset(node);
1811 be_emit_cstring(env, "\tsubl $");
1812 be_emit_irprintf(env->emit, "%u, ", offs);
1813 ia32_emit_source_register(env, node, 0);
1815 be_emit_cstring(env, "\taddl $");
1816 be_emit_irprintf(env->emit, "%u, ", -offs);
1817 ia32_emit_source_register(env, node, 0);
1819 be_emit_finish_line_gas(env, node);
1823 * Emits code to set stack pointer.
1826 void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
1827 be_emit_cstring(env, "\tmovl ");
1828 ia32_emit_source_register(env, node, 2);
1829 be_emit_cstring(env, ", ");
1830 ia32_emit_dest_register(env, node, 0);
1831 be_emit_finish_line_gas(env, node);
1835 * Emits code for Copy/CopyKeep.
1838 void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
1840 const arch_env_t *arch_env = env->arch_env;
1841 const arch_register_t *in = arch_get_irn_register(arch_env, op);
1842 const arch_register_t *out = arch_get_irn_register(arch_env, node);
1848 if(is_unknown_reg(in))
1850 /* copies of vf nodes aren't real... */
1851 if(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
1854 mode = get_irn_mode(node);
1855 if (mode == mode_E) {
1856 be_emit_cstring(env, "\tmovsd ");
1857 ia32_emit_register(env, in);
1858 be_emit_cstring(env, ", ");
1859 ia32_emit_register(env, out);
1861 be_emit_cstring(env, "\tmovl ");
1862 ia32_emit_register(env, in);
1863 be_emit_cstring(env, ", ");
1864 ia32_emit_register(env, out);
1866 be_emit_finish_line_gas(env, node);
1870 void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
1871 Copy_emitter(env, node, be_get_Copy_op(node));
1875 void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
1876 Copy_emitter(env, node, be_get_CopyKeep_op(node));
1880 * Emits code for exchange.
1883 void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
1884 const arch_register_t *in1, *in2;
1885 const arch_register_class_t *cls1, *cls2;
1887 in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
1888 in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
1890 cls1 = arch_register_get_class(in1);
1891 cls2 = arch_register_get_class(in2);
1893 assert(cls1 == cls2 && "Register class mismatch at Perm");
1895 if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
1896 be_emit_cstring(env, "\txchg ");
1897 ia32_emit_source_register(env, node, 1);
1898 be_emit_cstring(env, ", ");
1899 ia32_emit_source_register(env, node, 0);
1900 be_emit_finish_line_gas(env, node);
1901 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
1902 be_emit_cstring(env, "\txorpd ");
1903 ia32_emit_source_register(env, node, 1);
1904 be_emit_cstring(env, ", ");
1905 ia32_emit_source_register(env, node, 0);
1906 be_emit_finish_line_gas(env, NULL);
1908 be_emit_cstring(env, "\txorpd ");
1909 ia32_emit_source_register(env, node, 0);
1910 be_emit_cstring(env, ", ");
1911 ia32_emit_source_register(env, node, 1);
1912 be_emit_finish_line_gas(env, NULL);
1914 be_emit_cstring(env, "\txorpd ");
1915 ia32_emit_source_register(env, node, 1);
1916 be_emit_cstring(env, ", ");
1917 ia32_emit_source_register(env, node, 0);
1918 be_emit_finish_line_gas(env, node);
1919 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
1921 } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
1927 * Emits code for Constant loading.
1930 void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
1931 ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
1933 if (imm_tp == ia32_ImmSymConst) {
1934 be_emit_cstring(env, "\tmovl ");
1935 ia32_emit_immediate(env, node);
1936 be_emit_cstring(env, ", ");
1937 ia32_emit_dest_register(env, node, 0);
1939 tarval *tv = get_ia32_Immop_tarval(node);
1940 assert(get_irn_mode(node) == mode_Iu);
1941 /* beware: in some rare cases mode is mode_b which has no tarval_null() */
1942 if (tarval_is_null(tv)) {
1943 if (env->isa->opt_arch == arch_pentium_4) {
1944 /* P4 prefers sub r, r, others xor r, r */
1945 be_emit_cstring(env, "\tsubl ");
1947 be_emit_cstring(env, "\txorl ");
1949 ia32_emit_dest_register(env, node, 0);
1950 be_emit_cstring(env, ", ");
1951 ia32_emit_dest_register(env, node, 0);
1953 be_emit_cstring(env, "\tmovl ");
1954 ia32_emit_immediate(env, node);
1955 be_emit_cstring(env, ", ");
1956 ia32_emit_dest_register(env, node, 0);
1959 be_emit_finish_line_gas(env, node);
1963 * Emits code to load the TLS base
1966 void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
1967 be_emit_cstring(env, "\tmovl %gs:0, ");
1968 ia32_emit_dest_register(env, node, 0);
1969 be_emit_finish_line_gas(env, node);
1973 void emit_be_Return(ia32_emit_env_t *env, const ir_node *node)
1975 be_emit_cstring(env, "\tret");
1976 be_emit_finish_line_gas(env, node);
1980 void emit_Nothing(ia32_emit_env_t *env, const ir_node *node)
1987 /***********************************************************************************
1990 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1991 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1992 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1993 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1995 ***********************************************************************************/
1998 * Enters the emitter functions for handled nodes into the generic
1999 * pointer of an opcode.
2002 void ia32_register_emitters(void) {
2004 #define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
2005 #define IA32_EMIT(a) IA32_EMIT2(a,a)
2006 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
2007 #define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
2008 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
2009 #define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
2011 /* first clear the generic function pointer for all ops */
2012 clear_irp_opcodes_generic_func();
2014 /* register all emitter functions defined in spec */
2015 ia32_register_spec_emitters();
2017 /* other ia32 emitter functions */
2022 IA32_EMIT(TestCMov);
2025 IA32_EMIT(SwitchJmp);
2028 IA32_EMIT(Conv_I2FP);
2029 IA32_EMIT(Conv_FP2I);
2030 IA32_EMIT(Conv_FP2FP);
2031 IA32_EMIT(Conv_I2I);
2032 IA32_EMIT(Conv_I2I8Bit);
2037 IA32_EMIT(xCmpCMov);
2038 IA32_EMIT(xCondJmp);
2039 IA32_EMIT2(fcomJmp, x87CondJmp);
2040 IA32_EMIT2(fcompJmp, x87CondJmp);
2041 IA32_EMIT2(fcomppJmp, x87CondJmp);
2042 IA32_EMIT2(fcomrJmp, x87CondJmp);
2043 IA32_EMIT2(fcomrpJmp, x87CondJmp);
2044 IA32_EMIT2(fcomrppJmp, x87CondJmp);
2046 /* benode emitter */
2072 static const char *last_name = NULL;
2073 static unsigned last_line = -1;
2074 static unsigned num = -1;
2077 * Emit the debug support for node node.
2080 void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
2081 dbg_info *db = get_irn_dbg_info(node);
2083 const char *fname = be_retrieve_dbg_info(db, &lineno);
2085 if (! env->cg->birg->main_env->options->stabs_debug_support)
2089 if (last_name != fname) {
2091 be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
2094 if (last_line != lineno) {
2097 snprintf(name, sizeof(name), ".LM%u", ++num);
2099 be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
2100 be_emit_string(env, name);
2101 be_emit_cstring(env, ":\n");
2102 be_emit_write_line(env);
2107 typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
2110 * Emits code for a node.
2113 void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
2114 ir_op *op = get_irn_op(node);
2116 DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
2118 if (op->ops.generic) {
2119 emit_func_ptr func = (emit_func_ptr) op->ops.generic;
2120 ia32_emit_dbg(env, node);
2121 (*func) (env, node);
2123 emit_Nothing(env, node);
2124 ir_fprintf(stderr, "Error: No emit handler for node %+F (%+G, graph %+F)\n", node, node, current_ir_graph);
2130 * Emits gas alignment directives
2133 void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
2134 be_emit_cstring(env, "\t.p2align ");
2135 be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
2136 be_emit_write_line(env);
2140 * Emits gas alignment directives for Functions depended on cpu architecture.
2143 void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
2145 unsigned maximum_skip;
2160 maximum_skip = (1 << align) - 1;
2161 ia32_emit_alignment(env, align, maximum_skip);
2165 * Emits gas alignment directives for Labels depended on cpu architecture.
2168 void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
2169 unsigned align; unsigned maximum_skip;
2184 maximum_skip = (1 << align) - 1;
2185 ia32_emit_alignment(env, align, maximum_skip);
2189 * Test wether a block should be aligned.
2190 * For cpus in the P4/Athlon class it is usefull to align jump labels to
2191 * 16 bytes. However we should only do that if the alignment nops before the
2192 * label aren't executed more often than we have jumps to the label.
2195 int should_align_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev) {
2196 static const double DELTA = .0001;
2197 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2199 double prev_freq = 0; /**< execfreq of the fallthrough block */
2200 double jmp_freq = 0; /**< execfreq of all non-fallthrough blocks */
2201 cpu_support cpu = env->isa->opt_arch;
2204 if(exec_freq == NULL)
2206 if(cpu == arch_i386 || cpu == arch_i486)
2209 block_freq = get_block_execfreq(exec_freq, block);
2210 if(block_freq < DELTA)
2213 n_cfgpreds = get_Block_n_cfgpreds(block);
2214 for(i = 0; i < n_cfgpreds; ++i) {
2215 ir_node *pred = get_Block_cfgpred_block(block, i);
2216 double pred_freq = get_block_execfreq(exec_freq, pred);
2219 prev_freq += pred_freq;
2221 jmp_freq += pred_freq;
2225 if(prev_freq < DELTA && !(jmp_freq < DELTA))
2228 jmp_freq /= prev_freq;
2232 case arch_athlon_64:
2234 return jmp_freq > 3;
2236 return jmp_freq > 2;
2241 void ia32_emit_block_header(ia32_emit_env_t *env, ir_node *block, ir_node *prev)
2246 ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
2248 n_cfgpreds = get_Block_n_cfgpreds(block);
2249 need_label = (n_cfgpreds != 0);
2251 if (should_align_block(env, block, prev)) {
2253 ia32_emit_align_label(env, env->isa->opt_arch);
2257 ia32_emit_block_name(env, block);
2258 be_emit_char(env, ':');
2260 be_emit_pad_comment(env);
2261 be_emit_cstring(env, " /* preds:");
2263 /* emit list of pred blocks in comment */
2264 arity = get_irn_arity(block);
2265 for (i = 0; i < arity; ++i) {
2266 ir_node *predblock = get_Block_cfgpred_block(block, i);
2267 be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
2270 be_emit_cstring(env, "\t/* ");
2271 ia32_emit_block_name(env, block);
2272 be_emit_cstring(env, ": ");
2274 if (exec_freq != NULL) {
2275 be_emit_irprintf(env->emit, " freq: %f",
2276 get_block_execfreq(exec_freq, block));
2278 be_emit_cstring(env, " */\n");
2279 be_emit_write_line(env);
2283 * Walks over the nodes in a block connected by scheduling edges
2284 * and emits code for each node.
2287 void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block)
2289 const ir_node *node;
2291 ia32_emit_block_header(env, block, last_block);
2293 /* emit the contents of the block */
2294 ia32_emit_dbg(env, block);
2295 sched_foreach(block, node) {
2296 ia32_emit_node(env, node);
2301 * Emits code for function start.
2304 void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
2305 ir_entity *irg_ent = get_irg_entity(irg);
2306 const char *irg_name = get_entity_ld_name(irg_ent);
2307 cpu_support cpu = env->isa->opt_arch;
2308 const be_irg_t *birg = env->cg->birg;
2310 be_emit_write_line(env);
2311 be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
2312 be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
2313 ia32_emit_align_func(env, cpu);
2314 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
2315 be_emit_cstring(env, ".global ");
2316 be_emit_string(env, irg_name);
2317 be_emit_char(env, '\n');
2318 be_emit_write_line(env);
2320 ia32_emit_function_object(env, irg_name);
2321 be_emit_string(env, irg_name);
2322 be_emit_cstring(env, ":\n");
2323 be_emit_write_line(env);
2327 * Emits code for function end
2330 void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
2331 const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
2332 const be_irg_t *birg = env->cg->birg;
2334 ia32_emit_function_size(env, irg_name);
2335 be_dbg_method_end(birg->main_env->db_handle);
2336 be_emit_char(env, '\n');
2337 be_emit_write_line(env);
2342 * Sets labels for control flow nodes (jump target)
2345 void ia32_gen_labels(ir_node *block, void *data)
2348 int n = get_Block_n_cfgpreds(block);
2351 for (n--; n >= 0; n--) {
2352 pred = get_Block_cfgpred(block, n);
2353 set_irn_link(pred, block);
2358 * Emit an exception label if the current instruction can fail.
2360 void ia32_emit_exc_label(ia32_emit_env_t *env, const ir_node *node) {
2361 if (get_ia32_exc_label(node)) {
2362 be_emit_irprintf(env->emit, ".EXL%u\n", 0);
2363 be_emit_write_line(env);
2368 * Main driver. Emits the code for one routine.
2370 void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
2371 ia32_emit_env_t env;
2373 ir_node *last_block = NULL;
2376 env.isa = (ia32_isa_t *)cg->arch_env->isa;
2377 env.emit = &env.isa->emit;
2378 env.arch_env = cg->arch_env;
2381 ia32_register_emitters();
2383 ia32_emit_func_prolog(&env, irg);
2384 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
2386 n = ARR_LEN(cg->blk_sched);
2387 for (i = 0; i < n;) {
2390 block = cg->blk_sched[i];
2392 next_bl = i < n ? cg->blk_sched[i] : NULL;
2394 /* set here the link. the emitter expects to find the next block here */
2395 set_irn_link(block, next_bl);
2396 ia32_gen_block(&env, block, last_block);
2400 ia32_emit_func_epilog(&env, irg);
2403 void ia32_init_emitter(void)
2405 FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");