2 * This file implements the node emitter.
22 #include "iredges_t.h"
24 #include "../besched_t.h"
25 #include "../benode_t.h"
27 #include "ia32_emitter.h"
28 #include "gen_ia32_emitter.h"
29 #include "gen_ia32_regalloc_if.h"
30 #include "ia32_nodes_attr.h"
31 #include "ia32_new_nodes.h"
32 #include "ia32_map_regs.h"
34 #ifdef obstack_chunk_alloc
35 # undef obstack_chunk_alloc
36 # define obstack_chunk_alloc xmalloc
38 # define obstack_chunk_alloc xmalloc
39 # define obstack_chunk_free free
42 #define BLOCK_PREFIX(x) ".L" x
44 extern int obstack_printf(struct obstack *obst, char *fmt, ...);
46 #define SNPRINTF_BUF_LEN 128
48 /* global arch_env for lc_printf functions */
49 static const arch_env_t *arch_env = NULL;
51 /*************************************************************
53 * (_) | | / _| | | | |
54 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
55 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
56 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
57 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
60 *************************************************************/
63 * returns true if a node has x87 registers
65 static int has_x87_register(const ir_node *n)
67 return get_irn_op(n)->flags & (irop_flag_machine << 1);
70 /* We always pass the ir_node which is a pointer. */
71 static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
72 return lc_arg_type_ptr;
77 * Returns the register at in position pos.
79 static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
81 const arch_register_t *reg = NULL;
83 assert(get_irn_arity(irn) > pos && "Invalid IN position");
85 /* The out register of the operator at position pos is the
86 in register we need. */
87 op = get_irn_n(irn, pos);
89 reg = arch_get_irn_register(arch_env, op);
91 assert(reg && "no in register found");
96 * Returns the register at out position pos.
98 static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
100 const arch_register_t *reg = NULL;
102 /* 1st case: irn is not of mode_T, so it has only */
103 /* one OUT register -> good */
104 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
105 /* Proj with the corresponding projnum for the register */
107 if (get_irn_mode(irn) != mode_T) {
108 reg = arch_get_irn_register(arch_env, irn);
110 else if (is_ia32_irn(irn)) {
111 reg = get_ia32_out_reg(irn, pos);
114 const ir_edge_t *edge;
116 foreach_out_edge(irn, edge) {
117 proj = get_edge_src_irn(edge);
118 assert(is_Proj(proj) && "non-Proj from mode_T node");
119 if (get_Proj_proj(proj) == pos) {
120 reg = arch_get_irn_register(arch_env, proj);
126 assert(reg && "no out register found");
136 * Returns the name of the in register at position pos.
138 static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
139 const arch_register_t *reg;
141 if (in_out == IN_REG) {
142 reg = get_in_reg(irn, pos);
144 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
145 /* FIXME: works for binop only */
146 assert(2 <= pos && pos <= 3);
147 reg = get_ia32_attr(irn)->x87[pos - 2];
151 /* destination address mode nodes don't have outputs */
152 if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
156 reg = get_out_reg(irn, pos);
157 if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
158 reg = get_ia32_attr(irn)->x87[pos + 2];
160 return arch_register_get_name(reg);
164 * Get the register name for a node.
166 static int ia32_get_reg_name(lc_appendable_t *app,
167 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
170 ir_node *X = arg->v_ptr;
171 int nr = occ->width - 1;
174 return lc_appendable_snadd(app, "(null)", 6);
176 buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
178 /* append the stupid % to register names */
179 lc_appendable_chadd(app, '%');
180 return lc_appendable_snadd(app, buf, strlen(buf));
184 * Get the x87 register name for a node.
186 static int ia32_get_x87_name(lc_appendable_t *app,
187 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
190 ir_node *X = arg->v_ptr;
191 int nr = occ->width - 1;
195 return lc_appendable_snadd(app, "(null)", 6);
197 attr = get_ia32_attr(X);
198 buf = attr->x87[nr]->name;
199 lc_appendable_chadd(app, '%');
200 return lc_appendable_snadd(app, buf, strlen(buf));
204 * Returns the tarval, offset or scale of an ia32 as a string.
206 static int ia32_const_to_str(lc_appendable_t *app,
207 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
210 ir_node *X = arg->v_ptr;
213 return lc_arg_append(app, occ, "(null)", 6);
215 if (occ->conversion == 'C') {
216 buf = get_ia32_cnst(X);
219 buf = get_ia32_am_offs(X);
222 return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
226 * Determines the SSE suffix depending on the mode.
228 static int ia32_get_mode_suffix(lc_appendable_t *app,
229 const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
231 ir_node *X = arg->v_ptr;
232 ir_mode *mode = get_irn_mode(X);
234 if (mode == mode_T) {
235 mode = is_ia32_AddrModeS(X) || is_ia32_AddrModeD(X) ? get_ia32_ls_mode(X) : get_ia32_res_mode(X);
239 return lc_arg_append(app, occ, "(null)", 6);
241 if (mode_is_float(mode)) {
242 return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
245 return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
250 * Return the ia32 printf arg environment.
251 * We use the firm environment with some additional handlers.
253 const lc_arg_env_t *ia32_get_arg_env(void) {
254 static lc_arg_env_t *env = NULL;
256 static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
257 static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
258 static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
259 static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
262 /* extend the firm printer */
263 env = firm_get_arg_env();
265 lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
266 lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
267 lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
268 lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
269 lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
270 lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
276 static char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
277 switch(get_mode_size_bits(mode)) {
279 return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
281 return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
283 return (char *)arch_register_get_name(reg);
288 * Emits registers and/or address mode of a binary operation.
290 char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
291 static char *buf = NULL;
293 /* verify that this function is never called on non-AM supporting operations */
294 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
296 #define PRODUCES_RESULT(n) \
297 (!(is_ia32_St(n) || \
298 is_ia32_Store8Bit(n) || \
299 is_ia32_CondJmp(n) || \
300 is_ia32_fCondJmp(n) || \
301 is_ia32_SwitchJmp(n)))
304 buf = xcalloc(1, SNPRINTF_BUF_LEN);
307 memset(buf, 0, SNPRINTF_BUF_LEN);
310 switch(get_ia32_op_type(n)) {
312 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
313 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
316 const arch_register_t *in1 = get_in_reg(n, 2);
317 const arch_register_t *in2 = get_in_reg(n, 3);
318 const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
319 const arch_register_t *in;
322 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
323 out = out ? out : in1;
324 in_name = arch_register_get_name(in);
326 if (is_ia32_emit_cl(n)) {
327 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
331 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
335 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
336 assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
337 snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
340 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S, %s", n, ia32_emit_am(n, env));
344 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
345 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
346 ia32_emit_am(n, env),
347 is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
348 get_ia32_cnst(n)); /* tell the assembler to store it's address. */
351 const arch_register_t *in1 = get_in_reg(n, 2);
352 ir_mode *mode = get_ia32_res_mode(n);
355 mode = mode ? mode : get_ia32_ls_mode(n);
356 in_name = ia32_get_reg_name_for_mode(env, mode, in1);
358 if (is_ia32_emit_cl(n)) {
359 assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
363 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
367 assert(0 && "unsupported op type");
370 #undef PRODUCES_RESULT
376 * Emits registers and/or address mode of a binary operation.
378 char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
379 static char *buf = NULL;
381 /* verify that this function is never called on non-AM supporting operations */
382 //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
385 buf = xcalloc(1, SNPRINTF_BUF_LEN);
388 memset(buf, 0, SNPRINTF_BUF_LEN);
391 switch(get_ia32_op_type(n)) {
393 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
394 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
397 ia32_attr_t *attr = get_ia32_attr(n);
398 const arch_register_t *in1 = attr->x87[0];
399 const arch_register_t *in2 = attr->x87[1];
400 const arch_register_t *out = attr->x87[2];
401 const arch_register_t *in;
404 in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
405 out = out ? out : in1;
406 in_name = arch_register_get_name(in);
408 snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
413 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
416 assert(0 && "unsupported op type");
419 #undef PRODUCES_RESULT
425 * Emits registers and/or address mode of a unary operation.
427 char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
428 static char *buf = NULL;
431 buf = xcalloc(1, SNPRINTF_BUF_LEN);
434 memset(buf, 0, SNPRINTF_BUF_LEN);
437 switch(get_ia32_op_type(n)) {
439 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
440 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
443 lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
447 snprintf(buf, SNPRINTF_BUF_LEN, ia32_emit_am(n, env));
450 assert(0 && "unsupported op type");
457 * Emits address mode.
459 char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
460 ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
464 static struct obstack *obst = NULL;
465 ir_mode *mode = get_ia32_ls_mode(n);
467 if (! is_ia32_Lea(n))
468 assert(mode && "AM node must have ls_mode attribute set.");
471 obst = xcalloc(1, sizeof(*obst));
474 obstack_free(obst, NULL);
477 /* obstack_free with NULL results in an uninitialized obstack */
481 switch (get_mode_size_bits(mode)) {
483 obstack_printf(obst, "BYTE PTR ");
486 obstack_printf(obst, "WORD PTR ");
489 obstack_printf(obst, "DWORD PTR ");
492 if (has_x87_register(n))
493 /* ARGHHH: stupid gas x87 wants QWORD PTR but SSE must be WITHOUT */
494 obstack_printf(obst, "QWORD PTR ");
498 obstack_printf(obst, "XWORD PTR ");
505 /* emit address mode symconst */
506 if (get_ia32_am_sc(n)) {
507 if (is_ia32_am_sc_sign(n))
508 obstack_printf(obst, "-");
509 obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
512 if (am_flav & ia32_B) {
513 obstack_printf(obst, "[");
514 lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
518 if (am_flav & ia32_I) {
520 obstack_printf(obst, "+");
523 obstack_printf(obst, "[");
526 lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
528 if (am_flav & ia32_S) {
529 obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
535 if (am_flav & ia32_O) {
536 s = get_ia32_am_offs(n);
539 /* omit explicit + if there was no base or index */
541 obstack_printf(obst, "[");
546 obstack_printf(obst, s);
552 obstack_printf(obst, "] ");
554 size = obstack_object_size(obst);
555 s = obstack_finish(obst);
564 * Formated print of commands and comments.
566 static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
568 const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
571 fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
573 fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
579 * Add a number to a prefix. This number will not be used a second time.
581 static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
582 static unsigned long id = 0;
583 snprintf(buf, buflen, "%s%lu", prefix, ++id);
589 /*************************************************
592 * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
593 * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
594 * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
595 * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
597 *************************************************/
600 #define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
603 * coding of conditions
605 struct cmp2conditon_t {
611 * positive conditions for signed compares
613 static const struct cmp2conditon_t cmp2condition_s[] = {
614 { NULL, pn_Cmp_False }, /* always false */
615 { "e", pn_Cmp_Eq }, /* == */
616 { "l", pn_Cmp_Lt }, /* < */
617 { "le", pn_Cmp_Le }, /* <= */
618 { "g", pn_Cmp_Gt }, /* > */
619 { "ge", pn_Cmp_Ge }, /* >= */
620 { "ne", pn_Cmp_Lg }, /* != */
621 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
622 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
623 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
624 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
625 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
626 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
627 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
628 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
629 { NULL, pn_Cmp_True }, /* always true */
633 * positive conditions for unsigned compares
635 static const struct cmp2conditon_t cmp2condition_u[] = {
636 { NULL, pn_Cmp_False }, /* always false */
637 { "e", pn_Cmp_Eq }, /* == */
638 { "b", pn_Cmp_Lt }, /* < */
639 { "be", pn_Cmp_Le }, /* <= */
640 { "a", pn_Cmp_Gt }, /* > */
641 { "ae", pn_Cmp_Ge }, /* >= */
642 { "ne", pn_Cmp_Lg }, /* != */
643 { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
644 { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
645 { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
646 { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
647 { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
648 { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
649 { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
650 { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
651 { NULL, pn_Cmp_True }, /* always true */
655 * returns the condition code
657 static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
659 assert(cmp2condition_s[cmp_code].num == cmp_code);
660 assert(cmp2condition_u[cmp_code].num == cmp_code);
662 return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
666 * Returns the target block for a control flow node.
668 static ir_node *get_cfop_target_block(const ir_node *irn) {
669 return get_irn_link(irn);
673 * Returns the target label for a control flow node.
675 static char *get_cfop_target(const ir_node *irn, char *buf) {
676 ir_node *bl = get_cfop_target_block(irn);
678 snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
682 /** Return the next block in Block schedule */
683 static ir_node *next_blk_sched(const ir_node *block) {
684 return get_irn_link(block);
688 * Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
690 static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
691 const ir_node *proj1, *proj2 = NULL;
692 const ir_node *block, *next_bl = NULL;
693 const ir_edge_t *edge;
694 char buf[SNPRINTF_BUF_LEN];
695 char cmd_buf[SNPRINTF_BUF_LEN];
696 char cmnt_buf[SNPRINTF_BUF_LEN];
698 /* get both Proj's */
699 edge = get_irn_out_edge_first(irn);
700 proj1 = get_edge_src_irn(edge);
701 assert(is_Proj(proj1) && "CondJmp with a non-Proj");
703 edge = get_irn_out_edge_next(irn, edge);
705 proj2 = get_edge_src_irn(edge);
706 assert(is_Proj(proj2) && "CondJmp with a non-Proj");
709 /* for now, the code works for scheduled and non-schedules blocks */
710 block = get_nodes_block(irn);
712 /* we have a block schedule */
713 next_bl = next_blk_sched(block);
715 if (get_cfop_target_block(proj1) == next_bl) {
716 /* exchange both proj's so the second one can be omitted */
717 const ir_node *t = proj1;
723 /* the first Proj must always be created */
724 if (get_Proj_proj(proj1) == pn_Cond_true) {
725 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
726 get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
727 get_cfop_target(proj1, buf));
728 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
731 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
732 get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
733 !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
734 get_cfop_target(proj1, buf));
735 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
739 /* the second Proj might be a fallthrough */
741 if (get_cfop_target_block(proj2) != next_bl) {
742 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
743 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
747 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrogh %s */", get_cfop_target(proj2, buf));
754 * Emits code for conditional jump.
756 static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
758 char cmd_buf[SNPRINTF_BUF_LEN];
759 char cmnt_buf[SNPRINTF_BUF_LEN];
761 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
762 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
764 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
768 * Emits code for conditional jump with two variables.
770 static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
771 CondJmp_emitter(irn, env);
775 * Emits code for conditional test and jump.
777 static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
779 #define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
782 const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
783 const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
784 char cmd_buf[SNPRINTF_BUF_LEN];
785 char cmnt_buf[SNPRINTF_BUF_LEN];
788 op2 = arch_register_get_name(get_in_reg(irn, 1));
790 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
791 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
794 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
800 * Emits code for conditional test and jump with two variables.
802 static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
803 TestJmp_emitter(irn, env);
806 static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
808 char cmd_buf[SNPRINTF_BUF_LEN];
809 char cmnt_buf[SNPRINTF_BUF_LEN];
811 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
812 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
814 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
817 static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
819 char cmd_buf[SNPRINTF_BUF_LEN];
820 char cmnt_buf[SNPRINTF_BUF_LEN];
822 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
823 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
825 finish_CondJmp(F, irn, get_ia32_res_mode(irn));
828 /*********************************************************
831 * ___ _ __ ___ _| |_ _ _ _ _ __ ___ _ __ ___
832 * / _ \ '_ ` _ \| | __| | | | | | '_ ` _ \| '_ \/ __|
833 * | __/ | | | | | | |_ | | |_| | | | | | | |_) \__ \
834 * \___|_| |_| |_|_|\__| | |\__,_|_| |_| |_| .__/|___/
837 *********************************************************/
839 /* jump table entry (target and corresponding number) */
840 typedef struct _branch_t {
845 /* jump table for switch generation */
846 typedef struct _jmp_tbl_t {
847 ir_node *defProj; /**< default target */
848 int min_value; /**< smallest switch case */
849 int max_value; /**< largest switch case */
850 int num_branches; /**< number of jumps */
851 char *label; /**< label of the jump table */
852 branch_t *branches; /**< jump array */
856 * Compare two variables of type branch_t. Used to sort all switch cases
858 static int ia32_cmp_branch_t(const void *a, const void *b) {
859 branch_t *b1 = (branch_t *)a;
860 branch_t *b2 = (branch_t *)b;
862 if (b1->value <= b2->value)
869 * Emits code for a SwitchJmp (creates a jump table if
870 * possible otherwise a cmp-jmp cascade). Port from
873 static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
874 unsigned long interval;
875 char buf[SNPRINTF_BUF_LEN];
876 int last_value, i, pn, do_jmp_tbl = 1;
879 const ir_edge_t *edge;
880 const lc_arg_env_t *env = ia32_get_arg_env();
881 FILE *F = emit_env->out;
882 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
884 /* fill the table structure */
885 tbl.label = xmalloc(SNPRINTF_BUF_LEN);
886 tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
888 tbl.num_branches = get_irn_n_edges(irn);
889 tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
890 tbl.min_value = INT_MAX;
891 tbl.max_value = INT_MIN;
894 /* go over all proj's and collect them */
895 foreach_out_edge(irn, edge) {
896 proj = get_edge_src_irn(edge);
897 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
899 pn = get_Proj_proj(proj);
901 /* create branch entry */
902 tbl.branches[i].target = proj;
903 tbl.branches[i].value = pn;
905 tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
906 tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
908 /* check for default proj */
909 if (pn == get_ia32_pncode(irn)) {
910 assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
917 /* sort the branches by their number */
918 qsort(tbl.branches, tbl.num_branches, sizeof(tbl.branches[0]), ia32_cmp_branch_t);
920 /* two-complement's magic make this work without overflow */
921 interval = tbl.max_value - tbl.min_value;
923 /* check value interval */
924 if (interval > 16 * 1024) {
928 /* check ratio of value interval to number of branches */
929 if ((float)(interval + 1) / (float)tbl.num_branches > 8.0) {
935 if (tbl.min_value != 0) {
936 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmpl %lu, -%d(%1S)",
937 interval, tbl.min_value, irn);
938 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* first switch value is not 0 */");
943 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmpl %lu, %1S", interval, irn);
944 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
949 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
950 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
953 if (tbl.num_branches > 1) {
956 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp [%1S*4+%s]", irn, tbl.label);
957 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
960 fprintf(F, "\t.section\t.rodata\n");
961 fprintf(F, "\t.align 4\n");
963 fprintf(F, "%s:\n", tbl.label);
965 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
966 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */\n", tbl.branches[0].value);
969 last_value = tbl.branches[0].value;
970 for (i = 1; i < tbl.num_branches; ++i) {
971 while (++last_value < tbl.branches[i].value) {
972 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
973 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
976 snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
977 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
981 fprintf(F, "\t.text");
984 /* one jump is enough */
985 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
986 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
990 else { // no jump table
991 for (i = 0; i < tbl.num_branches; ++i) {
992 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmpl %d, %1S", tbl.branches[i].value, irn);
993 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", i);
995 fprintf(F, "\tje %s\n", get_cfop_target(tbl.branches[i].target, buf));
998 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.defProj, buf));
999 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
1010 * Emits code for a unconditional jump.
1012 static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
1013 ir_node *block, *next_bl;
1015 char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1017 /* for now, the code works for scheduled and non-schedules blocks */
1018 block = get_nodes_block(irn);
1020 /* we have a block schedule */
1021 next_bl = next_blk_sched(block);
1022 if (get_cfop_target_block(irn) != next_bl) {
1023 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
1024 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
1028 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
1033 /****************************
1036 * _ __ _ __ ___ _ ___
1037 * | '_ \| '__/ _ \| |/ __|
1038 * | |_) | | | (_) | |\__ \
1039 * | .__/|_| \___/| ||___/
1042 ****************************/
1045 * Emits code for a proj -> node
1047 static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
1048 ir_node *pred = get_Proj_pred(irn);
1050 if (get_irn_op(pred) == op_Start) {
1051 switch(get_Proj_proj(irn)) {
1052 case pn_Start_X_initial_exec:
1061 /**********************************
1064 * | | ___ _ __ _ _| |_) |
1065 * | | / _ \| '_ \| | | | _ <
1066 * | |___| (_) | |_) | |_| | |_) |
1067 * \_____\___/| .__/ \__, |____/
1070 **********************************/
1073 * Emit movsb/w instructions to make mov count divideable by 4
1075 static void emit_CopyB_prolog(FILE *F, int rem, int size) {
1076 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1078 fprintf(F, "\t/* memcopy %d bytes*/\n", size);
1080 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
1081 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
1086 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1087 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
1090 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1091 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
1094 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
1095 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1097 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
1098 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
1106 * Emit rep movsd instruction for memcopy.
1108 static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
1109 FILE *F = emit_env->out;
1110 tarval *tv = get_ia32_Immop_tarval(irn);
1111 int rem = get_tarval_long(tv);
1112 int size = get_tarval_long(get_ia32_Immop_tarval(get_irn_n(irn, 2)));
1113 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1115 emit_CopyB_prolog(F, rem, size);
1117 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
1118 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
1123 * Emits unrolled memcopy.
1125 static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
1126 tarval *tv = get_ia32_Immop_tarval(irn);
1127 int size = get_tarval_long(tv);
1128 FILE *F = emit_env->out;
1129 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1131 emit_CopyB_prolog(F, size & 0x3, size);
1135 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
1136 snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
1143 /***************************
1147 * | | / _ \| '_ \ \ / /
1148 * | |___| (_) | | | \ V /
1149 * \_____\___/|_| |_|\_/
1151 ***************************/
1154 * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
1156 static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1157 FILE *F = emit_env->out;
1158 const lc_arg_env_t *env = ia32_get_arg_env();
1159 ir_mode *src_mode = get_ia32_src_mode(irn);
1160 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1161 char *from, *to, buf[64];
1162 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1164 from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
1165 to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
1167 switch(get_ia32_op_type(irn)) {
1169 lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
1171 case ia32_AddrModeS:
1172 lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
1175 assert(0 && "unsupported op type for Conv");
1178 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
1179 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
1183 static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1184 emit_ia32_Conv_with_FP(irn, emit_env);
1187 static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1188 emit_ia32_Conv_with_FP(irn, emit_env);
1191 static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1192 emit_ia32_Conv_with_FP(irn, emit_env);
1196 * Emits code for an Int conversion.
1198 static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
1199 FILE *F = emit_env->out;
1200 const lc_arg_env_t *env = ia32_get_arg_env();
1201 char *move_cmd = "movzx";
1202 char *conv_cmd = NULL;
1203 ir_mode *src_mode = get_ia32_src_mode(irn);
1204 ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
1206 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1207 const arch_register_t *in_reg, *out_reg;
1209 n = get_mode_size_bits(src_mode);
1210 m = get_mode_size_bits(tgt_mode);
1212 if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
1214 if (n == 8 || m == 8)
1216 else if (n == 16 || m == 16)
1219 assert(0 && "unsupported Conv_I2I");
1222 switch(get_ia32_op_type(irn)) {
1224 in_reg = get_in_reg(irn, 2);
1225 out_reg = get_out_reg(irn, 0);
1227 if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
1228 REGS_ARE_EQUAL(out_reg, in_reg) &&
1229 mode_is_signed(n < m ? src_mode : tgt_mode))
1231 /* argument and result are both in EAX and */
1232 /* signedness is ok: -> use converts */
1233 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
1235 else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
1236 ! mode_is_signed(n < m ? src_mode : tgt_mode))
1238 /* argument and result are in the same register */
1239 /* and signedness is ok: -> use and with mask */
1240 int mask = (1 << (n < m ? n : m)) - 1;
1241 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
1244 /* use move w/o sign extension */
1245 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
1246 move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
1250 case ia32_AddrModeS:
1251 lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
1252 move_cmd, irn, ia32_emit_am(irn, emit_env));
1255 assert(0 && "unsupported op type for Conv");
1258 lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
1259 irn, n, src_mode, m, tgt_mode);
1265 * Emits code for an 8Bit Int conversion.
1267 void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
1268 emit_ia32_Conv_I2I(irn, emit_env);
1272 /*******************************************
1275 * | |__ ___ _ __ ___ __| | ___ ___
1276 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1277 * | |_) | __/ | | | (_) | (_| | __/\__ \
1278 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1280 *******************************************/
1283 * Emits a backend call
1285 static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
1286 FILE *F = emit_env->out;
1287 entity *ent = be_Call_get_entity(irn);
1288 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1291 snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_name(ent));
1294 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
1297 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
1303 * Emits code to increase stack pointer.
1305 static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1306 FILE *F = emit_env->out;
1307 unsigned offs = be_get_IncSP_offset(irn);
1308 be_stack_dir_t dir = be_get_IncSP_direction(irn);
1309 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1312 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S,%s%u", irn,
1313 (dir == be_stack_dir_expand) ? " -" : " ", offs);
1314 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
1317 snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
1318 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
1325 * Emits code to set stack pointer.
1327 static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
1328 FILE *F = emit_env->out;
1329 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1331 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
1332 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
1337 * Emits code for Copy.
1339 static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
1340 FILE *F = emit_env->out;
1341 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1343 if (mode_is_float(get_irn_mode(irn)))
1344 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
1346 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
1347 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
1352 * Emits code for exchange.
1354 static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
1355 FILE *F = emit_env->out;
1356 char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
1358 lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
1359 lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
1365 /***********************************************************************************
1368 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
1369 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
1370 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
1371 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
1373 ***********************************************************************************/
1376 * Enters the emitter functions for handled nodes into the generic
1377 * pointer of an opcode.
1379 static void ia32_register_emitters(void) {
1381 #define IA32_EMIT(a) op_ia32_##a->ops.generic = (op_func)emit_ia32_##a
1382 #define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
1383 #define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
1385 /* first clear the generic function pointer for all ops */
1386 clear_irp_opcodes_generic_func();
1388 /* register all emitter functions defined in spec */
1389 ia32_register_spec_emitters();
1391 /* other ia32 emitter functions */
1396 IA32_EMIT(SwitchJmp);
1399 IA32_EMIT(Conv_I2FP);
1400 IA32_EMIT(Conv_FP2I);
1401 IA32_EMIT(Conv_FP2FP);
1402 IA32_EMIT(Conv_I2I);
1403 IA32_EMIT(Conv_I2I8Bit);
1405 /* benode emitter */
1422 * Emits code for a node.
1424 static void ia32_emit_node(const ir_node *irn, void *env) {
1425 ia32_emit_env_t *emit_env = env;
1426 FILE *F = emit_env->out;
1427 ir_op *op = get_irn_op(irn);
1428 DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
1430 DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
1432 if (op->ops.generic) {
1433 void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
1437 ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
1442 * Walks over the nodes in a block connected by scheduling edges
1443 * and emits code for each node.
1445 static void ia32_gen_block(ir_node *block, void *env) {
1448 if (! is_Block(block))
1451 fprintf(((ia32_emit_env_t *)env)->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
1452 sched_foreach(block, irn) {
1453 ia32_emit_node(irn, env);
1458 * Emits code for function start.
1460 static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
1461 entity *irg_ent = get_irg_entity(irg);
1462 const char *irg_name = get_entity_name(irg_ent);
1464 fprintf(F, "\t.section\t.text\n");
1465 if (get_entity_visibility(irg_ent) == visibility_external_visible) {
1466 fprintf(F, ".globl %s\n", irg_name);
1468 fprintf(F, "\t.type\t%s, @function\n", irg_name);
1469 fprintf(F, "%s:\n", irg_name);
1473 * Emits code for function end
1475 static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
1476 const char *irg_name = get_entity_name(get_irg_entity(irg));
1478 fprintf(F, "\tret\n");
1479 fprintf(F, "\t.size\t%s, .-%s\n\n", irg_name, irg_name);
1484 * Sets labels for control flow nodes (jump target)
1485 * TODO: Jump optimization
1487 static void ia32_gen_labels(ir_node *block, void *env) {
1489 int n = get_Block_n_cfgpreds(block);
1491 for (n--; n >= 0; n--) {
1492 pred = get_Block_cfgpred(block, n);
1493 set_irn_link(pred, block);
1498 * Main driver. Emits the code for one routine.
1500 void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
1501 ia32_emit_env_t emit_env;
1505 emit_env.arch_env = cg->arch_env;
1507 emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
1508 FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
1510 /* set the global arch_env (needed by print hooks) */
1511 arch_env = cg->arch_env;
1513 ia32_register_emitters();
1515 ia32_emit_func_prolog(F, irg);
1516 irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
1518 if (cg->opt.extbb && cg->blk_sched) {
1519 int i, n = ARR_LEN(cg->blk_sched);
1521 for (i = 0; i < n;) {
1524 block = cg->blk_sched[i];
1526 next_bl = i < n ? cg->blk_sched[i] : NULL;
1528 /* set here the link. the emitter expects to find the next block here */
1529 set_irn_link(block, next_bl);
1530 ia32_gen_block(block, &emit_env);
1534 /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
1535 in the block schedule. As this number should NEVER be equal the next block,
1536 we does not need a clear block link here. */
1537 irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
1540 ia32_emit_func_epilog(F, irg);