2 * This file is part of libFirm.
3 * Copyright (C) 2012 University of Karlsruhe.
8 * @brief ia32 architecture variants
9 * @author Michael Beck, Matthias Braun
11 #ifndef FIRM_BE_IA32_ARCHITECTURE_H
12 #define FIRM_BE_IA32_ARCHITECTURE_H
17 /** optimize for size */
18 unsigned optimize_size:1;
19 /** use leave in function epilogue */
21 /** use inc, dec instead of add $1, reg and add $-1, reg */
22 unsigned use_incdec:1;
23 /** use soft float library */
24 unsigned use_softfloat:1;
25 /** use sse2 instructions (instead of x87) */
27 /** use ffreep instead of fpop */
28 unsigned use_ffreep:1;
29 /** use femms to pop all float registers */
31 /** use emms to pop all float registers */
33 /** use the fucomi instruction */
34 unsigned use_fucomi:1;
35 /** use cmovXX instructions */
37 /** mode_D moves instead of 2 integer moves */
38 unsigned use_modeD_moves:1;
39 /** use add esp, 4 instead of pop */
40 unsigned use_add_esp_4:1;
41 /** use add esp, 8 instead of 2 pops */
42 unsigned use_add_esp_8:1;
43 /** use sub esp, 4 instead of push */
44 unsigned use_sub_esp_4:1;
45 /** use sub esp, 8 instead of 2 pushs */
46 unsigned use_sub_esp_8:1;
47 /** use imul mem, imm32 instruction (slow on some CPUs) */
48 unsigned use_imul_mem_imm32:1;
49 /** use pxor instead xorps/xorpd */
51 /** use mov reg, 0 instruction */
53 /** use cwtl/cltd, which are shorter, to sign extend ax/eax */
54 unsigned use_short_sex_eax:1;
55 /** pad Ret instructions that are destination of conditional jump or directly preceded
56 by other jump instruction. */
57 unsigned use_pad_return:1;
58 /** use the bt instruction */
60 /** use fisttp instruction (requires SSE3) */
61 unsigned use_fisttp:1;
62 /** use SSE prefetch instructions */
63 unsigned use_sse_prefetch:1;
64 /** use 3DNow! prefetch instructions */
65 unsigned use_3dnow_prefetch:1;
66 /** use SSE4.2 or SSE4a popcnt instruction */
67 unsigned use_popcnt:1;
68 /** use i486 instructions */
70 /** optimize calling convention where possible */
71 unsigned optimize_cc:1;
73 * disrespect current floating point rounding mode at entry and exit of
74 * functions (this is ok for programs that don't explicitly change the
77 unsigned use_unsafe_floatconv:1;
78 /** emit machine code instead of assembler */
79 unsigned emit_machcode:1;
81 /** function alignment (a power of two in bytes) */
82 unsigned function_alignment;
83 /** alignment for labels (which are expected to be frequent jump targets) */
84 unsigned label_alignment;
85 /** maximum skip alignment for labels (which are expected to be frequent jump targets) */
86 unsigned label_alignment_max_skip;
87 /** if a blocks execfreq is factor higher than its predecessor then align
88 * the blocks label (0 switches off label alignment) */
89 double label_alignment_factor;
90 } ia32_code_gen_config_t;
92 extern ia32_code_gen_config_t ia32_cg_config;
94 typedef enum ia32_fp_architectures {
95 IA32_FPU_ARCH_NONE = 0,
96 IA32_FPU_ARCH_X87 = 0x00000001,
97 IA32_FPU_ARCH_SSE2 = 0x00000002,
98 IA32_FPU_ARCH_SOFTFLOAT = 0x00000004,
100 ia32_fp_architectures;
102 /** Initialize the ia32 architecture module. */
103 void ia32_init_architecture(void);
105 /** Setup the ia32_cg_config structure by inspecting current user settings. */
106 void ia32_setup_cg_config(void);
109 * Evaluate the costs of an instruction. Used by the irach multiplication
112 * @param kind the instruction
113 * @param mode the mode of the instruction
114 * @param tv for MUL instruction, the multiplication constant
118 int ia32_evaluate_insn(insn_kind kind, const ir_mode *mode, ir_tarval *tv);