2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief ia32 architecture variants
23 * @author Michael Beck, Matthias Braun
25 #ifndef FIRM_BE_IA32_ARCHITECTURE_H
26 #define FIRM_BE_IA32_ARCHITECTURE_H
31 /** optimize for size */
32 unsigned optimize_size:1;
33 /** use leave in function epilogue */
35 /** use inc, dec instead of add $1, reg and add $-1, reg */
36 unsigned use_incdec:1;
37 /** use soft float library */
38 unsigned use_softfloat:1;
39 /** use sse2 instructions (instead of x87) */
41 /** use ffreep instead of fpop */
42 unsigned use_ffreep:1;
43 /** use femms to pop all float registers */
45 /** use emms to pop all float registers */
47 /** use the fucomi instruction */
48 unsigned use_fucomi:1;
49 /** use cmovXX instructions */
51 /** mode_D moves instead of 2 integer moves */
52 unsigned use_modeD_moves:1;
53 /** use add esp, 4 instead of pop */
54 unsigned use_add_esp_4:1;
55 /** use add esp, 8 instead of 2 pops */
56 unsigned use_add_esp_8:1;
57 /** use sub esp, 4 instead of push */
58 unsigned use_sub_esp_4:1;
59 /** use sub esp, 8 instead of 2 pushs */
60 unsigned use_sub_esp_8:1;
61 /** use imul mem, imm32 instruction (slow on some CPUs) */
62 unsigned use_imul_mem_imm32:1;
63 /** use pxor instead xorps/xorpd */
65 /** use mov reg, 0 instruction */
67 /** use cwtl/cltd, which are shorter, to sign extend ax/eax */
68 unsigned use_short_sex_eax:1;
69 /** pad Ret instructions that are destination of conditional jump or directly preceded
70 by other jump instruction. */
71 unsigned use_pad_return:1;
72 /** use the bt instruction */
74 /** use fisttp instruction (requires SSE3) */
75 unsigned use_fisttp:1;
76 /** use SSE prefetch instructions */
77 unsigned use_sse_prefetch:1;
78 /** use 3DNow! prefetch instructions */
79 unsigned use_3dnow_prefetch:1;
80 /** use SSE4.2 or SSE4a popcnt instruction */
81 unsigned use_popcnt:1;
82 /** use i486 instructions */
84 /** optimize calling convention where possible */
85 unsigned optimize_cc:1;
87 * disrespect current floating point rounding mode at entry and exit of
88 * functions (this is ok for programs that don't explicitly change the
91 unsigned use_unsafe_floatconv:1;
92 /** emit machine code instead of assembler */
93 unsigned emit_machcode:1;
95 /** function alignment (a power of two in bytes) */
96 unsigned function_alignment;
97 /** alignment for labels (which are expected to be frequent jump targets) */
98 unsigned label_alignment;
99 /** maximum skip alignment for labels (which are expected to be frequent jump targets) */
100 unsigned label_alignment_max_skip;
101 /** if a blocks execfreq is factor higher than its predecessor then align
102 * the blocks label (0 switches off label alignment) */
103 double label_alignment_factor;
104 } ia32_code_gen_config_t;
106 extern ia32_code_gen_config_t ia32_cg_config;
108 typedef enum ia32_fp_architectures {
109 IA32_FPU_ARCH_NONE = 0,
110 IA32_FPU_ARCH_X87 = 0x00000001,
111 IA32_FPU_ARCH_SSE2 = 0x00000002,
112 IA32_FPU_ARCH_SOFTFLOAT = 0x00000004,
114 ia32_fp_architectures;
116 /** Initialize the ia32 architecture module. */
117 void ia32_init_architecture(void);
119 /** Setup the ia32_cg_config structure by inspecting current user settings. */
120 void ia32_setup_cg_config(void);
123 * Evaluate the costs of an instruction. Used by the irach multiplication
126 * @param kind the instruction
127 * @param mode the mode of the instruction
128 * @param tv for MUL instruction, the multiplication constant
132 int ia32_evaluate_insn(insn_kind kind, const ir_mode *mode, ir_tarval *tv);