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15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief ia32 architecture variants
23 * @author Michael Beck, Matthias Braun
24 * @version $Id: bearch_ia32_t.h 16363 2007-10-25 23:27:07Z beck $
29 #include "lc_opts_enum.h"
33 #include "bearch_ia32_t.h"
34 #include "ia32_architecture.h"
36 ia32_code_gen_config_t ia32_cg_config;
39 * CPU architectures and features.
41 enum cpu_arch_features {
42 arch_generic32 = 0x00000001, /**< no specific architecture */
44 arch_i386 = 0x00000002, /**< i386 architecture */
45 arch_i486 = 0x00000004, /**< i486 architecture */
46 arch_pentium = 0x00000008, /**< Pentium architecture */
47 arch_ppro = 0x00000010, /**< PentiumPro architecture */
48 arch_netburst = 0x00000020, /**< Netburst architecture */
49 arch_nocona = 0x00000040, /**< Nocona architecture */
50 arch_core2 = 0x00000080, /**< Core2 architecture */
51 arch_atom = 0x00000100, /**< Atom architecture */
53 arch_k6 = 0x00000200, /**< k6 architecture */
54 arch_geode = 0x00000400, /**< Geode architecture */
55 arch_athlon = 0x00000800, /**< Athlon architecture */
56 arch_k8 = 0x00001000, /**< K8/Opteron architecture */
57 arch_k10 = 0x00002000, /**< K10/Barcelona architecture */
59 arch_mask = 0x00003FFF,
61 arch_athlon_plus = arch_athlon | arch_k8 | arch_k10,
62 arch_all_amd = arch_k6 | arch_geode | arch_athlon_plus,
64 arch_feature_mmx = 0x00004000, /**< MMX instructions */
65 arch_feature_p6_insn = 0x00008000, /**< PentiumPro instructions */
66 arch_feature_sse1 = 0x00010000, /**< SSE1 instructions */
67 arch_feature_sse2 = 0x00020000, /**< SSE2 instructions */
68 arch_feature_sse3 = 0x00040000, /**< SSE3 instructions */
69 arch_feature_ssse3 = 0x00080000, /**< SSSE3 instructions */
70 arch_feature_3DNow = 0x00100000, /**< 3DNow! instructions */
71 arch_feature_3DNowE = 0x00200000, /**< Enhanced 3DNow! instructions */
72 arch_feature_64bit = 0x00400000, /**< x86_64 support */
74 arch_mmx_insn = arch_feature_mmx, /**< MMX instructions */
75 arch_sse1_insn = arch_feature_sse1 | arch_mmx_insn, /**< SSE1 instructions, include MMX */
76 arch_sse2_insn = arch_feature_sse2 | arch_sse1_insn, /**< SSE2 instructions, include SSE1 */
77 arch_sse3_insn = arch_feature_sse3 | arch_sse2_insn, /**< SSE3 instructions, include SSE2 */
78 arch_ssse3_insn = arch_feature_ssse3 | arch_sse3_insn, /**< SSSE3 instructions, include SSE3 */
80 arch_3DNow_insn = arch_feature_3DNow | arch_feature_mmx, /**< 3DNow! instructions, including MMX */
81 arch_3DNowE_insn = arch_feature_3DNowE | arch_3DNow_insn, /**< Enhanced 3DNow! instructions */
82 arch_64bit_insn = arch_feature_64bit | arch_sse2_insn, /**< x86_64 support, includes SSE2 */
85 #define FLAGS(x, f) (((x) & (f)) != 0)
91 cpu_generic = arch_generic32,
96 cpu_pentium = arch_pentium,
97 cpu_pentium_mmx = arch_pentium | arch_mmx_insn,
98 cpu_pentium_pro = arch_ppro | arch_feature_p6_insn,
99 cpu_pentium_2 = arch_ppro | arch_feature_p6_insn | arch_mmx_insn,
100 cpu_pentium_3 = arch_ppro | arch_feature_p6_insn | arch_sse1_insn,
101 cpu_pentium_m = arch_ppro | arch_feature_p6_insn | arch_sse2_insn,
102 cpu_pentium_4 = arch_netburst | arch_feature_p6_insn | arch_sse2_insn,
103 cpu_prescott = arch_nocona | arch_feature_p6_insn | arch_sse3_insn,
104 cpu_nocona = arch_nocona | arch_feature_p6_insn | arch_64bit_insn | arch_sse3_insn,
105 cpu_core2 = arch_core2 | arch_feature_p6_insn | arch_64bit_insn | arch_ssse3_insn,
108 cpu_k6 = arch_k6 | arch_mmx_insn,
109 cpu_k6_PLUS = arch_k6 | arch_3DNow_insn,
110 cpu_geode = arch_geode | arch_sse1_insn | arch_3DNowE_insn,
111 cpu_athlon_old = arch_athlon | arch_3DNowE_insn | arch_feature_p6_insn,
112 cpu_athlon = arch_athlon | arch_sse1_insn | arch_3DNowE_insn | arch_feature_p6_insn,
113 cpu_athlon64 = arch_athlon | arch_sse2_insn | arch_3DNowE_insn | arch_feature_p6_insn | arch_64bit_insn,
114 cpu_k8 = arch_k8 | arch_3DNowE_insn | arch_feature_p6_insn | arch_64bit_insn,
115 cpu_k8_sse3 = arch_k8 | arch_3DNowE_insn | arch_feature_p6_insn | arch_64bit_insn | arch_sse3_insn,
116 cpu_k10 = arch_k10 | arch_3DNowE_insn | arch_feature_p6_insn | arch_64bit_insn | arch_sse3_insn,
119 cpu_winchip_c6 = arch_i486 | arch_feature_mmx,
120 cpu_winchip2 = arch_i486 | arch_feature_mmx | arch_feature_3DNow,
121 cpu_c3 = arch_i486 | arch_feature_mmx | arch_feature_3DNow,
122 cpu_c3_2 = arch_ppro | arch_feature_p6_insn | arch_sse1_insn, /* really no 3DNow! */
125 static int opt_size = 0;
126 static cpu_support arch = cpu_generic;
127 static cpu_support opt_arch = cpu_generic;
128 static int use_sse2 = 0;
129 static int opt_cc = 1;
130 static int opt_unsafe_floatconv = 0;
132 /* instruction set architectures. */
133 static const lc_opt_enum_int_items_t arch_items[] = {
134 { "i386", cpu_i386 },
135 { "i486", cpu_i486 },
136 { "i586", cpu_pentium },
137 { "pentium", cpu_pentium },
138 { "pentium-mmx", cpu_pentium_mmx },
139 { "i686", cpu_pentium_pro },
140 { "pentiumpro", cpu_pentium_pro },
141 { "pentium2", cpu_pentium_2 },
142 { "p2", cpu_pentium_2 },
143 { "pentium3", cpu_pentium_3 },
144 { "pentium3m", cpu_pentium_3 },
145 { "p3", cpu_pentium_3 },
146 { "pentium-m", cpu_pentium_m },
147 { "pm", cpu_pentium_m },
148 { "pentium4", cpu_pentium_4 },
149 { "pentium4m", cpu_pentium_4 },
150 { "p4", cpu_pentium_4 },
151 { "prescott", cpu_prescott },
152 { "nocona", cpu_nocona },
153 { "merom", cpu_core2 },
154 { "core2", cpu_core2 },
157 { "k6-2", cpu_k6_PLUS },
158 { "k6-3", cpu_k6_PLUS },
159 { "geode", cpu_geode },
160 { "athlon", cpu_athlon_old },
161 { "athlon-tbird", cpu_athlon },
162 { "athlon-4", cpu_athlon },
163 { "athlon-xp", cpu_athlon },
164 { "athlon-mp", cpu_athlon },
165 { "athlon64", cpu_athlon64 },
167 { "opteron", cpu_k8 },
168 { "athlon-fx", cpu_k8 },
169 { "k8-sse3", cpu_k8_sse3 },
170 { "opteron-sse3", cpu_k8_sse3 },
172 { "barcelona", cpu_k10 },
173 { "amdfam10", cpu_k10 },
175 { "winchip-c6", cpu_winchip_c6, },
176 { "winchip2", cpu_winchip2 },
178 { "c3-2", cpu_c3_2 },
180 { "generic", cpu_generic },
181 { "generic32", cpu_generic },
185 static lc_opt_enum_int_var_t arch_var = {
186 (int*) &arch, arch_items
189 static lc_opt_enum_int_var_t opt_arch_var = {
190 (int*) &opt_arch, arch_items
193 static const lc_opt_enum_int_items_t fp_unit_items[] = {
199 static lc_opt_enum_int_var_t fp_unit_var = {
200 &use_sse2, fp_unit_items
203 static const lc_opt_table_entry_t ia32_architecture_options[] = {
204 LC_OPT_ENT_BOOL("size", "optimize for size", &opt_size),
205 LC_OPT_ENT_ENUM_INT("arch", "select the instruction architecture",
207 LC_OPT_ENT_ENUM_INT("opt", "optimize for instruction architecture",
209 LC_OPT_ENT_ENUM_INT("fpunit", "select the floating point unit",
211 LC_OPT_ENT_NEGBIT("nooptcc", "do not optimize calling convention",
213 LC_OPT_ENT_BIT("unsafe_floatconv", "do unsafe floating point controlword "
214 "optimisations", &opt_unsafe_floatconv, 1),
218 typedef struct insn_const {
219 int add_cost; /**< cost of an add instruction */
220 int lea_cost; /**< cost of a lea instruction */
221 int const_shf_cost; /**< cost of a constant shift instruction */
222 int cost_mul_start; /**< starting cost of a multiply instruction */
223 int cost_mul_bit; /**< cost of multiply for every set bit */
224 unsigned function_alignment; /**< logarithm for alignment of function labels */
225 unsigned label_alignment; /**< logarithm for alignment of loops labels */
226 unsigned label_alignment_max_skip; /**< maximum skip for alignment of loops labels */
229 /* costs for optimizing for size */
230 static const insn_const size_cost = {
231 2, /* cost of an add instruction */
232 3, /* cost of a lea instruction */
233 3, /* cost of a constant shift instruction */
234 4, /* starting cost of a multiply instruction */
235 0, /* cost of multiply for every set bit */
236 0, /* logarithm for alignment of function labels */
237 0, /* logarithm for alignment of loops labels */
238 0, /* maximum skip for alignment of loops labels */
241 /* costs for the i386 */
242 static const insn_const i386_cost = {
243 1, /* cost of an add instruction */
244 1, /* cost of a lea instruction */
245 3, /* cost of a constant shift instruction */
246 9, /* starting cost of a multiply instruction */
247 1, /* cost of multiply for every set bit */
248 2, /* logarithm for alignment of function labels */
249 2, /* logarithm for alignment of loops labels */
250 3, /* maximum skip for alignment of loops labels */
253 /* costs for the i486 */
254 static const insn_const i486_cost = {
255 1, /* cost of an add instruction */
256 1, /* cost of a lea instruction */
257 2, /* cost of a constant shift instruction */
258 12, /* starting cost of a multiply instruction */
259 1, /* cost of multiply for every set bit */
260 4, /* logarithm for alignment of function labels */
261 4, /* logarithm for alignment of loops labels */
262 15, /* maximum skip for alignment of loops labels */
265 /* costs for the Pentium */
266 static const insn_const pentium_cost = {
267 1, /* cost of an add instruction */
268 1, /* cost of a lea instruction */
269 1, /* cost of a constant shift instruction */
270 11, /* starting cost of a multiply instruction */
271 0, /* cost of multiply for every set bit */
272 4, /* logarithm for alignment of function labels */
273 4, /* logarithm for alignment of loops labels */
274 7, /* maximum skip for alignment of loops labels */
277 /* costs for the Pentium Pro */
278 static const insn_const pentiumpro_cost = {
279 1, /* cost of an add instruction */
280 1, /* cost of a lea instruction */
281 1, /* cost of a constant shift instruction */
282 4, /* starting cost of a multiply instruction */
283 0, /* cost of multiply for every set bit */
284 4, /* logarithm for alignment of function labels */
285 4, /* logarithm for alignment of loops labels */
286 10, /* maximum skip for alignment of loops labels */
289 /* costs for the K6 */
290 static const insn_const k6_cost = {
291 1, /* cost of an add instruction */
292 2, /* cost of a lea instruction */
293 1, /* cost of a constant shift instruction */
294 3, /* starting cost of a multiply instruction */
295 0, /* cost of multiply for every set bit */
296 5, /* logarithm for alignment of function labels */
297 5, /* logarithm for alignment of loops labels */
298 7, /* maximum skip for alignment of loops labels */
301 /* costs for the Geode */
302 static const insn_const geode_cost = {
303 1, /* cost of an add instruction */
304 1, /* cost of a lea instruction */
305 1, /* cost of a constant shift instruction */
306 7, /* starting cost of a multiply instruction */
307 0, /* cost of multiply for every set bit */
308 0, /* logarithm for alignment of function labels */
309 0, /* logarithm for alignment of loops labels */
310 0, /* maximum skip for alignment of loops labels */
313 /* costs for the Athlon */
314 static const insn_const athlon_cost = {
315 1, /* cost of an add instruction */
316 2, /* cost of a lea instruction */
317 1, /* cost of a constant shift instruction */
318 5, /* starting cost of a multiply instruction */
319 0, /* cost of multiply for every set bit */
320 4, /* logarithm for alignment of function labels */
321 4, /* logarithm for alignment of loops labels */
322 7, /* maximum skip for alignment of loops labels */
325 /* costs for the Opteron/K8 */
326 static const insn_const k8_cost = {
327 1, /* cost of an add instruction */
328 2, /* cost of a lea instruction */
329 1, /* cost of a constant shift instruction */
330 3, /* starting cost of a multiply instruction */
331 0, /* cost of multiply for every set bit */
333 4, /* logarithm for alignment of function labels */
334 4, /* logarithm for alignment of loops labels */
335 7, /* maximum skip for alignment of loops labels */
343 /* costs for the K10 */
344 static const insn_const k10_cost = {
345 1, /* cost of an add instruction */
346 2, /* cost of a lea instruction */
347 1, /* cost of a constant shift instruction */
348 3, /* starting cost of a multiply instruction */
349 0, /* cost of multiply for every set bit */
350 5, /* logarithm for alignment of function labels */
351 5, /* logarithm for alignment of loops labels */
352 7, /* maximum skip for alignment of loops labels */
355 /* costs for the Pentium 4 */
356 static const insn_const netburst_cost = {
357 1, /* cost of an add instruction */
358 3, /* cost of a lea instruction */
359 4, /* cost of a constant shift instruction */
360 15, /* starting cost of a multiply instruction */
361 0, /* cost of multiply for every set bit */
362 4, /* logarithm for alignment of function labels */
363 4, /* logarithm for alignment of loops labels */
364 7, /* maximum skip for alignment of loops labels */
367 /* costs for the Nocona and Core */
368 static const insn_const nocona_cost = {
369 1, /* cost of an add instruction */
370 1, /* cost of a lea instruction */
371 1, /* cost of a constant shift instruction */
372 10, /* starting cost of a multiply instruction */
373 0, /* cost of multiply for every set bit */
374 4, /* logarithm for alignment of function labels */
375 4, /* logarithm for alignment of loops labels */
376 7, /* maximum skip for alignment of loops labels */
379 /* costs for the Core2 */
380 static const insn_const core2_cost = {
381 1, /* cost of an add instruction */
382 1, /* cost of a lea instruction */
383 1, /* cost of a constant shift instruction */
384 3, /* starting cost of a multiply instruction */
385 0, /* cost of multiply for every set bit */
386 4, /* logarithm for alignment of function labels */
387 4, /* logarithm for alignment of loops labels */
388 10, /* maximum skip for alignment of loops labels */
391 /* costs for the generic32 */
392 static const insn_const generic32_cost = {
393 1, /* cost of an add instruction */
394 2, /* cost of a lea instruction */
395 1, /* cost of a constant shift instruction */
396 4, /* starting cost of a multiply instruction */
397 0, /* cost of multiply for every set bit */
398 4, /* logarithm for alignment of function labels */
399 4, /* logarithm for alignment of loops labels */
400 7, /* maximum skip for alignment of loops labels */
403 static const insn_const *arch_costs = &generic32_cost;
405 static void set_arch_costs(void)
408 arch_costs = &size_cost;
411 switch (opt_arch & arch_mask) {
412 case arch_i386: arch_costs = &i386_cost; break;
413 case arch_i486: arch_costs = &i486_cost; break;
414 case arch_pentium: arch_costs = &pentium_cost; break;
415 case arch_ppro: arch_costs = &pentiumpro_cost; break;
416 case arch_netburst: arch_costs = &netburst_cost; break;
417 case arch_nocona: arch_costs = &nocona_cost; break;
418 case arch_core2: arch_costs = &core2_cost; break;
419 case arch_k6: arch_costs = &k6_cost; break;
420 case arch_geode: arch_costs = &geode_cost; break;
421 case arch_athlon: arch_costs = &athlon_cost; break;
422 case arch_k8: arch_costs = &k8_cost; break;
423 case arch_k10: arch_costs = &k10_cost; break;
425 case arch_generic32: arch_costs = &generic32_cost; break;
429 /* Evaluate the costs of an instruction. */
430 int ia32_evaluate_insn(insn_kind kind, tarval *tv) {
435 cost = arch_costs->cost_mul_start;
436 if (arch_costs->cost_mul_bit > 0) {
437 char *bitstr = get_tarval_bitpattern(tv);
440 for (i = 0; bitstr[i] != '\0'; ++i) {
441 if (bitstr[i] == '1') {
442 cost += arch_costs->cost_mul_bit;
449 return arch_costs->lea_cost;
452 return arch_costs->add_cost;
454 return arch_costs->const_shf_cost;
456 return arch_costs->add_cost;
462 void ia32_setup_cg_config(void)
464 ia32_code_gen_config_t *const c = &ia32_cg_config;
465 memset(c, 0, sizeof(*c));
469 c->optimize_size = opt_size != 0;
470 /* on newer intel cpus mov, pop is often faster than leave although it has a
472 c->use_leave = FLAGS(opt_arch, arch_i386 | arch_all_amd | arch_core2) || opt_size;
473 /* P4s don't like inc/decs because they only partially write the flags
474 * register which produces false dependencies */
475 c->use_incdec = !FLAGS(opt_arch, arch_netburst | arch_nocona | arch_core2 | arch_geode) || opt_size;
476 c->use_sse2 = use_sse2 && FLAGS(arch, arch_feature_sse2);
477 c->use_ffreep = FLAGS(opt_arch, arch_athlon_plus);
478 c->use_ftst = !FLAGS(arch, arch_feature_p6_insn);
479 /* valgrind can't cope with femms yet and the usefulness of the optimization
480 * is questionable anyway */
482 c->use_femms = FLAGS(opt_arch, arch_athlon_plus) &&
483 FLAGS(arch, arch_feature_mmx | arch_all_amd);
487 c->use_fucomi = FLAGS(arch, arch_feature_p6_insn);
488 c->use_cmov = FLAGS(arch, arch_feature_p6_insn);
489 c->use_modeD_moves = FLAGS(opt_arch, arch_generic32 | arch_athlon_plus | arch_netburst | arch_nocona | arch_core2 | arch_ppro | arch_geode);
490 c->use_add_esp_4 = FLAGS(opt_arch, arch_generic32 | arch_athlon_plus | arch_netburst | arch_nocona | arch_core2 | arch_geode) && !opt_size;
491 c->use_add_esp_8 = FLAGS(opt_arch, arch_generic32 | arch_athlon_plus | arch_netburst | arch_nocona | arch_core2 | arch_ppro | arch_geode | arch_i386 | arch_i486) && !opt_size;
492 c->use_sub_esp_4 = FLAGS(opt_arch, arch_generic32 | arch_athlon_plus | arch_netburst | arch_nocona | arch_core2 | arch_ppro) && !opt_size;
493 c->use_sub_esp_8 = FLAGS(opt_arch, arch_generic32 | arch_athlon_plus | arch_netburst | arch_nocona | arch_core2 | arch_ppro | arch_i386 | arch_i486) && !opt_size;
494 c->use_imul_mem_imm32 = !FLAGS(opt_arch, arch_k8 | arch_k10) || opt_size;
495 c->use_pxor = FLAGS(opt_arch, arch_netburst);
496 c->use_mov_0 = FLAGS(opt_arch, arch_k6) && !opt_size;
497 c->use_short_sex_eax = !FLAGS(opt_arch, arch_k6) && !opt_size;
498 c->use_pad_return = FLAGS(opt_arch, arch_athlon_plus | arch_core2 | arch_generic32) && !opt_size;
499 c->use_bt = FLAGS(opt_arch, arch_core2 | arch_athlon_plus) || opt_size;
500 c->use_fisttp = FLAGS(opt_arch & arch, arch_feature_sse3);
501 c->use_sse_prefetch = FLAGS(arch, (arch_feature_3DNowE | arch_feature_sse1));
502 c->use_3dnow_prefetch = FLAGS(arch, arch_feature_3DNow);
503 c->optimize_cc = opt_cc;
504 c->use_unsafe_floatconv = opt_unsafe_floatconv;
506 c->function_alignment = arch_costs->function_alignment;
507 c->label_alignment = arch_costs->label_alignment;
508 c->label_alignment_max_skip = arch_costs->label_alignment_max_skip;
510 c->label_alignment_factor =
511 FLAGS(opt_arch, arch_i386 | arch_i486) || opt_size ? 0 :
512 opt_arch & arch_all_amd ? 3 :
516 void ia32_init_architecture(void)
518 lc_opt_entry_t *be_grp, *ia32_grp;
520 memset(&ia32_cg_config, 0, sizeof(ia32_cg_config));
522 be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
523 ia32_grp = lc_opt_get_grp(be_grp, "ia32");
525 lc_opt_add_table(ia32_grp, ia32_architecture_options);