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13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief ia32 architecture variants
23 * @author Michael Beck, Matthias Braun
24 * @version $Id: bearch_ia32_t.h 16363 2007-10-25 23:27:07Z beck $
31 #include "lc_opts_enum.h"
35 #include "bearch_ia32_t.h"
36 #include "ia32_architecture.h"
38 ia32_code_gen_config_t ia32_cg_config;
41 * CPU architectures and features.
43 enum cpu_arch_features {
44 arch_generic32 = 0x00000001, /**< no specific architecture */
46 arch_i386 = 0x00000002, /**< i386 architecture */
47 arch_i486 = 0x00000004, /**< i486 architecture */
48 arch_pentium = 0x00000008, /**< Pentium architecture */
49 arch_ppro = 0x00000010, /**< PentiumPro architecture */
50 arch_netburst = 0x00000020, /**< Netburst architecture */
51 arch_nocona = 0x00000040, /**< Nocona architecture */
52 arch_core2 = 0x00000080, /**< Core2 architecture */
53 arch_atom = 0x00000100, /**< Atom architecture */
55 arch_k6 = 0x00000200, /**< k6 architecture */
56 arch_geode = 0x00000400, /**< Geode architecture */
57 arch_athlon = 0x00000800, /**< Athlon architecture */
58 arch_k8 = 0x00001000, /**< K8/Opteron architecture */
59 arch_k10 = 0x00002000, /**< K10/Barcelona architecture */
61 arch_mask = 0x00003FFF,
63 arch_athlon_plus = arch_athlon | arch_k8 | arch_k10,
64 arch_all_amd = arch_k6 | arch_geode | arch_athlon_plus,
66 arch_feature_mmx = 0x00004000, /**< MMX instructions */
67 arch_feature_p6_insn = 0x00008000, /**< PentiumPro instructions */
68 arch_feature_sse1 = 0x00010000 | arch_feature_mmx, /**< SSE1 instructions, include MMX */
69 arch_feature_sse2 = 0x00020000 | arch_feature_sse1, /**< SSE2 instructions, include SSE1 */
70 arch_feature_sse3 = 0x00040000 | arch_feature_sse2, /**< SSE3 instructions, include SSE2 */
71 arch_feature_ssse3 = 0x00080000 | arch_feature_sse3, /**< SSSE3 instructions, include SSE3 */
72 arch_feature_3DNow = 0x00100000, /**< 3DNow! instructions */
73 arch_feature_3DNowE = 0x00200000 | arch_feature_3DNow, /**< Enhanced 3DNow! instructions */
74 arch_feature_64bit = 0x00400000 | arch_feature_sse2, /**< x86_64 support, includes SSE2 */
77 #define FLAGS(x, f) (((x) & (f)) != 0)
83 cpu_generic = arch_generic32,
88 cpu_pentium = arch_pentium,
89 cpu_pentium_mmx = arch_pentium | arch_feature_mmx,
90 cpu_pentium_pro = arch_ppro | arch_feature_p6_insn,
91 cpu_pentium_2 = arch_ppro | arch_feature_p6_insn | arch_feature_mmx,
92 cpu_pentium_3 = arch_ppro | arch_feature_p6_insn | arch_feature_sse1,
93 cpu_pentium_m = arch_ppro | arch_feature_p6_insn | arch_feature_sse2,
94 cpu_pentium_4 = arch_netburst | arch_feature_p6_insn | arch_feature_sse2,
95 cpu_prescott = arch_nocona | arch_feature_p6_insn | arch_feature_sse3,
96 cpu_nocona = arch_nocona | arch_feature_p6_insn | arch_feature_64bit | arch_feature_sse3,
97 cpu_core2 = arch_core2 | arch_feature_p6_insn | arch_feature_64bit | arch_feature_ssse3,
100 cpu_k6 = arch_k6 | arch_feature_mmx,
101 cpu_k6_PLUS = arch_k6 | arch_feature_mmx | arch_feature_3DNow,
102 cpu_geode = arch_geode | arch_feature_sse1 | arch_feature_3DNowE,
103 cpu_athlon = arch_athlon | arch_feature_sse1 | arch_feature_3DNowE | arch_feature_p6_insn,
104 cpu_athlon64 = arch_athlon | arch_feature_sse2 | arch_feature_3DNowE | arch_feature_p6_insn | arch_feature_64bit,
105 cpu_k8 = arch_k8 | arch_feature_sse2 | arch_feature_3DNowE | arch_feature_p6_insn | arch_feature_64bit,
106 cpu_k8_sse3 = arch_k8 | arch_feature_sse3 | arch_feature_3DNowE | arch_feature_p6_insn | arch_feature_64bit,
107 cpu_k10 = arch_k10 | arch_feature_sse3 | arch_feature_3DNowE | arch_feature_p6_insn | arch_feature_64bit,
110 cpu_winchip_c6 = arch_i486 | arch_feature_mmx,
111 cpu_winchip2 = arch_i486 | arch_feature_mmx | arch_feature_3DNow,
112 cpu_c3 = arch_i486 | arch_feature_mmx | arch_feature_3DNow,
113 cpu_c3_2 = arch_ppro | arch_feature_sse1, /* really no 3DNow! */
116 static cpu_support arch = cpu_generic;
117 static cpu_support opt_arch = cpu_core2;
118 static int use_sse2 = 0;
119 static int opt_cc = 1;
120 static int opt_unsafe_floatconv = 0;
122 /* instruction set architectures. */
123 static const lc_opt_enum_int_items_t arch_items[] = {
124 { "i386", cpu_i386 },
125 { "i486", cpu_i486 },
126 { "i586", cpu_pentium },
127 { "pentium", cpu_pentium },
128 { "pentium-mmx", cpu_pentium_mmx },
129 { "i686", cpu_pentium_pro },
130 { "pentiumpro", cpu_pentium_pro },
131 { "pentium2", cpu_pentium_2 },
132 { "p2", cpu_pentium_2 },
133 { "pentium3", cpu_pentium_3 },
134 { "pentium3m", cpu_pentium_3 },
135 { "p3", cpu_pentium_3 },
136 { "pentium-m", cpu_pentium_m },
137 { "pm", cpu_pentium_m },
138 { "pentium4", cpu_pentium_4 },
139 { "pentium4m", cpu_pentium_4 },
140 { "p4", cpu_pentium_4 },
141 { "prescott", cpu_prescott },
142 { "nocona", cpu_nocona },
143 { "merom", cpu_core2 },
144 { "core2", cpu_core2 },
147 { "k6-2", cpu_k6_PLUS },
148 { "k6-3", cpu_k6_PLUS },
149 { "geode", cpu_geode },
150 { "athlon", cpu_athlon },
151 { "athlon-tbird", cpu_athlon },
152 { "athlon-4", cpu_athlon },
153 { "athlon-xp", cpu_athlon },
154 { "athlon-mp", cpu_athlon },
155 { "athlon64", cpu_athlon64 },
157 { "opteron", cpu_k8 },
158 { "athlon-fx", cpu_k8 },
159 { "k8-sse3", cpu_k8_sse3 },
160 { "opteron-sse3", cpu_k8_sse3 },
162 { "barcelona", cpu_k10 },
163 { "amdfam10", cpu_k10 },
165 { "winchip-c6", cpu_winchip_c6, },
166 { "winchip2", cpu_winchip2 },
168 { "c3-2", cpu_c3_2 },
170 { "generic", cpu_generic },
171 { "generic32", cpu_generic },
175 static lc_opt_enum_int_var_t arch_var = {
176 (int*) &arch, arch_items
179 static lc_opt_enum_int_var_t opt_arch_var = {
180 (int*) &opt_arch, arch_items
183 static const lc_opt_enum_int_items_t fp_unit_items[] = {
189 static lc_opt_enum_int_var_t fp_unit_var = {
190 &use_sse2, fp_unit_items
193 static const lc_opt_table_entry_t ia32_architecture_options[] = {
194 LC_OPT_ENT_ENUM_INT("arch", "select the instruction architecture",
196 LC_OPT_ENT_ENUM_INT("opt", "optimize for instruction architecture",
198 LC_OPT_ENT_ENUM_INT("fpunit", "select the floating point unit",
200 LC_OPT_ENT_NEGBIT("nooptcc", "do not optimize calling convention",
202 LC_OPT_ENT_BIT("unsafe_floatconv", "do unsafe floating point controlword "
203 "optimisations", &opt_unsafe_floatconv, 1),
207 typedef struct insn_const {
208 int add_cost; /**< cost of an add instruction */
209 int lea_cost; /**< cost of a lea instruction */
210 int const_shf_cost; /**< cost of a constant shift instruction */
211 int cost_mul_start; /**< starting cost of a multiply instruction */
212 int cost_mul_bit; /**< cost of multiply for every set bit */
213 unsigned function_alignment; /**< logarithm for alignment of function labels */
214 unsigned label_alignment; /**< logarithm for alignment of loops labels */
215 unsigned label_alignment_max_skip; /**< maximum skip for alignment of loops labels */
218 /* costs for the i386 */
219 static const insn_const i386_cost = {
220 1, /* cost of an add instruction */
221 1, /* cost of a lea instruction */
222 3, /* cost of a constant shift instruction */
223 9, /* starting cost of a multiply instruction */
224 1, /* cost of multiply for every set bit */
225 2, /* logarithm for alignment of function labels */
226 2, /* logarithm for alignment of loops labels */
227 3, /* maximum skip for alignment of loops labels */
230 /* costs for the i486 */
231 static const insn_const i486_cost = {
232 1, /* cost of an add instruction */
233 1, /* cost of a lea instruction */
234 2, /* cost of a constant shift instruction */
235 12, /* starting cost of a multiply instruction */
236 1, /* cost of multiply for every set bit */
237 4, /* logarithm for alignment of function labels */
238 4, /* logarithm for alignment of loops labels */
239 15, /* maximum skip for alignment of loops labels */
242 /* costs for the Pentium */
243 static const insn_const pentium_cost = {
244 1, /* cost of an add instruction */
245 1, /* cost of a lea instruction */
246 1, /* cost of a constant shift instruction */
247 11, /* starting cost of a multiply instruction */
248 0, /* cost of multiply for every set bit */
249 4, /* logarithm for alignment of function labels */
250 4, /* logarithm for alignment of loops labels */
251 7, /* maximum skip for alignment of loops labels */
254 /* costs for the Pentium Pro */
255 static const insn_const pentiumpro_cost = {
256 1, /* cost of an add instruction */
257 1, /* cost of a lea instruction */
258 1, /* cost of a constant shift instruction */
259 4, /* starting cost of a multiply instruction */
260 0, /* cost of multiply for every set bit */
261 4, /* logarithm for alignment of function labels */
262 4, /* logarithm for alignment of loops labels */
263 10, /* maximum skip for alignment of loops labels */
266 /* costs for the K6 */
267 static const insn_const k6_cost = {
268 1, /* cost of an add instruction */
269 2, /* cost of a lea instruction */
270 1, /* cost of a constant shift instruction */
271 3, /* starting cost of a multiply instruction */
272 0, /* cost of multiply for every set bit */
273 5, /* logarithm for alignment of function labels */
274 5, /* logarithm for alignment of loops labels */
275 7, /* maximum skip for alignment of loops labels */
278 /* costs for the Geode */
279 static const insn_const geode_cost = {
280 1, /* cost of an add instruction */
281 1, /* cost of a lea instruction */
282 1, /* cost of a constant shift instruction */
283 7, /* starting cost of a multiply instruction */
284 0, /* cost of multiply for every set bit */
285 0, /* logarithm for alignment of function labels */
286 0, /* logarithm for alignment of loops labels */
287 0, /* maximum skip for alignment of loops labels */
290 /* costs for the Athlon */
291 static const insn_const athlon_cost = {
292 1, /* cost of an add instruction */
293 2, /* cost of a lea instruction */
294 1, /* cost of a constant shift instruction */
295 5, /* starting cost of a multiply instruction */
296 0, /* cost of multiply for every set bit */
297 4, /* logarithm for alignment of function labels */
298 4, /* logarithm for alignment of loops labels */
299 7, /* maximum skip for alignment of loops labels */
302 /* costs for the Opteron/K8/K10 */
303 static const insn_const k8_cost = {
304 1, /* cost of an add instruction */
305 2, /* cost of a lea instruction */
306 1, /* cost of a constant shift instruction */
307 3, /* starting cost of a multiply instruction */
308 0, /* cost of multiply for every set bit */
309 4, /* logarithm for alignment of function labels */
310 4, /* logarithm for alignment of loops labels */
311 7, /* maximum skip for alignment of loops labels */
314 /* costs for the K10 */
315 static const insn_const k10_cost = {
316 1, /* cost of an add instruction */
317 2, /* cost of a lea instruction */
318 1, /* cost of a constant shift instruction */
319 3, /* starting cost of a multiply instruction */
320 0, /* cost of multiply for every set bit */
321 5, /* logarithm for alignment of function labels */
322 5, /* logarithm for alignment of loops labels */
323 7, /* maximum skip for alignment of loops labels */
326 /* costs for the Pentium 4 */
327 static const insn_const netburst_cost = {
328 1, /* cost of an add instruction */
329 3, /* cost of a lea instruction */
330 4, /* cost of a constant shift instruction */
331 15, /* starting cost of a multiply instruction */
332 0, /* cost of multiply for every set bit */
333 4, /* logarithm for alignment of function labels */
334 4, /* logarithm for alignment of loops labels */
335 7, /* maximum skip for alignment of loops labels */
338 /* costs for the Nocona and Core */
339 static const insn_const nocona_cost = {
340 1, /* cost of an add instruction */
341 1, /* cost of a lea instruction */
342 1, /* cost of a constant shift instruction */
343 10, /* starting cost of a multiply instruction */
344 0, /* cost of multiply for every set bit */
345 4, /* logarithm for alignment of function labels */
346 4, /* logarithm for alignment of loops labels */
347 7, /* maximum skip for alignment of loops labels */
350 /* costs for the Core2 */
351 static const insn_const core2_cost = {
352 1, /* cost of an add instruction */
353 1, /* cost of a lea instruction */
354 1, /* cost of a constant shift instruction */
355 3, /* starting cost of a multiply instruction */
356 0, /* cost of multiply for every set bit */
357 4, /* logarithm for alignment of function labels */
358 4, /* logarithm for alignment of loops labels */
359 10, /* maximum skip for alignment of loops labels */
362 /* costs for the generic32 */
363 static const insn_const generic32_cost = {
364 1, /* cost of an add instruction */
365 2, /* cost of a lea instruction */
366 1, /* cost of a constant shift instruction */
367 4, /* starting cost of a multiply instruction */
368 0, /* cost of multiply for every set bit */
369 4, /* logarithm for alignment of function labels */
370 4, /* logarithm for alignment of loops labels */
371 7, /* maximum skip for alignment of loops labels */
374 static const insn_const *arch_costs = &generic32_cost;
376 static void set_arch_costs(void)
378 switch (opt_arch & arch_mask) {
380 arch_costs = &i386_cost;
383 arch_costs = &i486_cost;
386 arch_costs = &pentium_cost;
389 arch_costs = &pentiumpro_cost;
392 arch_costs = &netburst_cost;
395 arch_costs = &nocona_cost;
398 arch_costs = &core2_cost;
401 arch_costs = &k6_cost;
404 arch_costs = &geode_cost;
407 arch_costs = &athlon_cost;
410 arch_costs = &k8_cost;
413 arch_costs = &k10_cost;
417 arch_costs = &generic32_cost;
422 * Evaluate a given simple instruction.
424 int ia32_evaluate_insn(insn_kind kind, tarval *tv) {
429 cost = arch_costs->cost_mul_start;
430 if (arch_costs->cost_mul_bit > 0) {
431 char *bitstr = get_tarval_bitpattern(tv);
434 for (i = 0; bitstr[i] != '\0'; ++i) {
435 if (bitstr[i] == '1') {
436 cost += arch_costs->cost_mul_bit;
443 return arch_costs->lea_cost;
446 return arch_costs->add_cost;
448 return arch_costs->const_shf_cost;
450 return arch_costs->add_cost;
456 void ia32_setup_cg_config(void)
458 memset(&ia32_cg_config, 0, sizeof(ia32_cg_config));
462 /* on newer intel cpus mov, pop is often faster then leave although it has a
464 ia32_cg_config.use_leave = FLAGS(opt_arch, arch_i386 | arch_all_amd | arch_core2);
465 /* P4s don't like inc/decs because they only partially write the flags
466 register which produces false dependencies */
467 ia32_cg_config.use_incdec = !FLAGS(opt_arch, arch_netburst | arch_nocona | arch_geode);
468 ia32_cg_config.use_sse2 = use_sse2;
469 ia32_cg_config.use_ffreep = FLAGS(opt_arch, arch_athlon_plus);
470 ia32_cg_config.use_ftst = !FLAGS(arch, arch_feature_p6_insn);
471 ia32_cg_config.use_femms = FLAGS(opt_arch, arch_athlon_plus) &&
472 FLAGS(arch, arch_feature_mmx | arch_all_amd);
473 ia32_cg_config.use_fucomi = FLAGS(arch, arch_feature_p6_insn);
474 ia32_cg_config.use_cmov = FLAGS(arch, arch_feature_p6_insn);
475 ia32_cg_config.use_modeD_moves = FLAGS(opt_arch, arch_athlon_plus | arch_geode | arch_ppro |
476 arch_netburst | arch_nocona | arch_core2 | arch_generic32);
477 ia32_cg_config.use_add_esp_4 = FLAGS(opt_arch, arch_geode | arch_athlon_plus |
478 arch_netburst | arch_nocona | arch_core2 | arch_generic32);
479 ia32_cg_config.use_add_esp_8 = FLAGS(opt_arch, arch_geode | arch_athlon_plus |
480 arch_i386 | arch_i486 | arch_ppro | arch_netburst |
481 arch_nocona | arch_core2 | arch_generic32);
482 ia32_cg_config.use_sub_esp_4 = FLAGS(opt_arch, arch_athlon_plus | arch_ppro |
483 arch_netburst | arch_nocona | arch_core2 | arch_generic32);
484 ia32_cg_config.use_sub_esp_8 = FLAGS(opt_arch, arch_athlon_plus | arch_i386 | arch_i486 |
485 arch_ppro | arch_netburst | arch_nocona | arch_core2 | arch_generic32);
486 ia32_cg_config.use_imul_mem_imm32 = !FLAGS(opt_arch, arch_k8 | arch_k10);
487 ia32_cg_config.use_mov_0 = FLAGS(opt_arch, arch_k6);
488 ia32_cg_config.use_pad_return = FLAGS(opt_arch, arch_athlon_plus | cpu_core2 | arch_generic32);
489 ia32_cg_config.optimize_cc = opt_cc;
490 ia32_cg_config.use_unsafe_floatconv = opt_unsafe_floatconv;
492 ia32_cg_config.function_alignment = arch_costs->function_alignment;
493 ia32_cg_config.label_alignment = arch_costs->label_alignment;
494 ia32_cg_config.label_alignment_max_skip = arch_costs->label_alignment_max_skip;
496 if (opt_arch & (arch_i386 | arch_i486)) {
497 ia32_cg_config.label_alignment_factor = 0;
498 } else if (opt_arch & arch_all_amd) {
499 ia32_cg_config.label_alignment_factor = 3;
501 ia32_cg_config.label_alignment_factor = 2;
505 void ia32_init_architecture(void)
507 lc_opt_entry_t *be_grp, *ia32_grp;
509 memset(&ia32_cg_config, 0, sizeof(ia32_cg_config));
511 be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
512 ia32_grp = lc_opt_get_grp(be_grp, "ia32");
514 lc_opt_add_table(ia32_grp, ia32_architecture_options);