2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file contains functions for matching firm graphs for
23 * nodes that can be used as address mode for x86 instructions
24 * @author Matthias Braun
31 #include "ia32_address_mode.h"
32 #include "ia32_transform.h"
38 #include "iredges_t.h"
41 #include "../benode_t.h"
45 /* gas/ld don't support negative symconsts :-( */
46 #undef SUPPORT_NEGATIVE_SYMCONSTS
48 static bitset_t *non_address_mode_nodes;
51 * Recursive worker for checking if a DAG with root node can be represented as a simple immediate,
53 * @param node the node
54 * @param symconsts number of symconsts found so far
55 * @param negate if set, the immediate must be negated
57 * @return non-zero if the DAG represents an immediate, 0 else
59 static int do_is_immediate(const ir_node *node, int *symconsts, int negate)
64 switch (get_irn_opcode(node)) {
66 /* Consts are typically immediates */
67 if (!tarval_is_long(get_Const_tarval(node))) {
69 ir_fprintf(stderr, "Optimisation warning tarval of %+F(%+F) is not "
70 "a long.\n", node, current_ir_graph);
76 /* the first SymConst of a DAG can be fold into an immediate */
77 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
78 /* unfortunately the assembler/linker doesn't support -symconst */
83 if(get_SymConst_kind(node) != symconst_addr_ent)
92 /* Add's and Sub's are typically supported as long as both operands are immediates */
93 if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
96 left = get_binop_left(node);
97 right = get_binop_right(node);
98 if(!do_is_immediate(left, symconsts, negate))
100 if(!do_is_immediate(right, symconsts, is_Sub(node) ? !negate : negate))
105 /* all other nodes are NO immediates */
111 * Checks if a DAG with a single root node can be represented as a simple immediate.
113 * @param node the node
115 * @return non-zero if the DAG represents an immediate, 0 else
117 static int is_immediate_simple(const ir_node *node) {
119 return do_is_immediate(node, &symconsts, 0);
123 * Check if a DAG starting with root node can be folded into an address mode
126 * @param addr the address mode data so far
127 * @param node the node
128 * @param negate if set, the immediate must be negated
130 static int is_immediate(ia32_address_t *addr, const ir_node *node, int negate)
132 int symconsts = (addr->symconst_ent != NULL);
133 return do_is_immediate(node, &symconsts, negate);
137 * Place a DAG with root node into an address mode.
139 * @param addr the address mode data so far
140 * @param node the node
141 * @param negate if set, the immediate must be negated
143 static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate)
150 switch (get_irn_opcode(node)) {
152 /* simply add the value to the offset */
153 tv = get_Const_tarval(node);
154 val = get_tarval_long(tv);
162 /* place the entity into the symconst */
163 if (addr->symconst_ent != NULL) {
164 panic("Internal error: more than 1 symconst in address "
167 addr->symconst_ent = get_SymConst_entity(node);
168 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
171 addr->symconst_sign = negate;
174 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
175 left = get_Add_left(node);
176 right = get_Add_right(node);
177 eat_immediate(addr, left, negate);
178 eat_immediate(addr, right, negate);
181 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
182 left = get_Sub_left(node);
183 right = get_Sub_right(node);
184 eat_immediate(addr, left, negate);
185 eat_immediate(addr, right, !negate);
188 panic("Internal error in immediate address calculation");
193 * Place operands of node into an address mode.
195 * @param addr the address mode data so far
196 * @param node the node
197 * @param force if set, ignore the marking of node as a non-address-mode node
199 * @return the folded node
201 static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node, int force)
203 if(!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
207 ir_node *left = get_Add_left(node);
208 ir_node *right = get_Add_right(node);
210 if(is_immediate(addr, left, 0)) {
211 eat_immediate(addr, left, 0);
212 return eat_immediates(addr, right, 0);
214 if(is_immediate(addr, right, 0)) {
215 eat_immediate(addr, right, 0);
216 return eat_immediates(addr, left, 0);
218 } else if(is_Sub(node)) {
219 ir_node *left = get_Sub_left(node);
220 ir_node *right = get_Sub_right(node);
222 if(is_immediate(addr, right, 1)) {
223 eat_immediate(addr, right, 1);
224 return eat_immediates(addr, left, 0);
232 * Try to place a Shl into an address mode.
234 * @param addr the address mode data so far
235 * @param node the node to place
237 * @return non-zero on success
239 static int eat_shl(ia32_address_t *addr, ir_node *node)
241 ir_node *right = get_Shl_right(node);
245 /* we can only eat a shl if we don't have a scale or index set yet */
246 if(addr->scale != 0 || addr->index != NULL)
249 /* we can use shl with 1, 2 or 3 shift */
252 tv = get_Const_tarval(right);
253 if(!tarval_is_long(tv))
255 val = get_tarval_long(tv);
256 if(val < 0 || val > 3)
259 ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
261 if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
264 #ifndef AGGRESSIVE_AM
265 if(get_irn_n_edges(node) > 1)
270 addr->index = eat_immediates(addr, get_Shl_left(node), 0);
275 * Returns non-zero if a value of a given mode can be stored in GP registers.
277 static INLINE int mode_needs_gp_reg(ir_mode *mode) {
278 if(mode == mode_fpcw)
280 if(get_mode_size_bits(mode) > 32)
282 return mode_is_int(mode) || mode_is_reference(mode) || mode == mode_b;
285 /* Create an address mode for a given node. */
286 void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
291 if(is_immediate(addr, node, 0)) {
292 eat_immediate(addr, node, 0);
296 #ifndef AGGRESSIVE_AM
297 if(!force && get_irn_n_edges(node) > 1) {
303 if(!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
308 eat_imms = eat_immediates(addr, node, force);
309 if(eat_imms != node) {
311 eat_imms = ia32_skip_downconv(eat_imms);
316 #ifndef AGGRESSIVE_AM
317 if(get_irn_n_edges(node) > 1) {
322 if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
328 /* starting point Add, Sub or Shl, FrameAddr */
330 if(eat_shl(addr, node))
332 } else if(is_immediate(addr, node, 0)) {
333 eat_immediate(addr, node, 0);
335 } else if(be_is_FrameAddr(node)) {
336 assert(addr->base == NULL);
337 assert(addr->frame_entity == NULL);
338 addr->base = be_get_FrameAddr_frame(node);
340 addr->frame_entity = be_get_FrameAddr_entity(node);
342 } else if(is_Add(node)) {
343 ir_node *left = get_Add_left(node);
344 ir_node *right = get_Add_right(node);
347 left = ia32_skip_downconv(left);
348 right = ia32_skip_downconv(right);
351 assert(force || !is_immediate(addr, left, 0));
352 assert(force || !is_immediate(addr, right, 0));
354 if(is_Shl(left) && eat_shl(addr, left)) {
356 } else if(is_Shl(right) && eat_shl(addr, right)) {
359 if(left != NULL && be_is_FrameAddr(left)
360 && !bitset_is_set(non_address_mode_nodes, get_irn_idx(left))) {
361 assert(addr->base == NULL);
362 assert(addr->frame_entity == NULL);
363 addr->base = be_get_FrameAddr_frame(left);
365 addr->frame_entity = be_get_FrameAddr_entity(left);
367 } else if(right != NULL && be_is_FrameAddr(right)
368 && !bitset_is_set(non_address_mode_nodes, get_irn_idx(right))) {
369 assert(addr->base == NULL);
370 assert(addr->frame_entity == NULL);
371 addr->base = be_get_FrameAddr_frame(right);
373 addr->frame_entity = be_get_FrameAddr_entity(right);
378 if(addr->base != NULL) {
379 assert(addr->index == NULL && addr->scale == 0);
380 assert(right == NULL);
387 if(addr->base == NULL) {
390 assert(addr->index == NULL && addr->scale == 0);
402 * Walker: mark those nodes that cannot be part of an address mode because
403 * there value must be access through an register
405 static void mark_non_address_nodes(ir_node *node, void *env)
415 switch(get_irn_opcode(node)) {
417 ptr = get_Load_ptr(node);
418 mem = get_Load_mem(node);
420 bitset_set(non_address_mode_nodes, get_irn_idx(mem));
424 val = get_Store_value(node);
425 ptr = get_Store_ptr(node);
426 mem = get_Store_mem(node);
428 bitset_set(non_address_mode_nodes, get_irn_idx(val));
429 bitset_set(non_address_mode_nodes, get_irn_idx(mem));
433 left = get_Add_left(node);
434 right = get_Add_right(node);
435 /* if we can do source address mode then we will never fold the add
436 * into address mode */
437 if(!mode_is_float(get_irn_mode(node)) && (is_immediate_simple(right) ||
438 (!ia32_use_source_address_mode(get_nodes_block(node), left, right)
439 && !ia32_use_source_address_mode(get_nodes_block(node), right, left))))
443 bitset_set(non_address_mode_nodes, get_irn_idx(node));
447 arity = get_irn_arity(node);
449 for(i = 0; i < arity; ++i) {
450 ir_node *in = get_irn_n(node, i);
451 bitset_set(non_address_mode_nodes, get_irn_idx(in));
457 void calculate_non_address_mode_nodes(ir_graph *irg)
459 non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg));
461 irg_walk_graph(irg, NULL, mark_non_address_nodes, NULL);
464 void free_non_address_mode_nodes(void)
466 bitset_free(non_address_mode_nodes);