2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file contains functions for matching firm graphs for
23 * nodes that can be used as address mode for x86 instructions
24 * @author Matthias Braun
31 #include "ia32_address_mode.h"
32 #include "ia32_transform.h"
38 #include "iredges_t.h"
41 #include "../benode_t.h"
45 /* gas/ld don't support negative symconsts :-( */
46 #undef SUPPORT_NEGATIVE_SYMCONSTS
49 static bitset_t *non_address_mode_nodes;
52 * Recursive worker for checking if a DAG with root node can be represented as a simple immediate,
54 * @param node the node
55 * @param symconsts number of symconsts found so far
56 * @param negate if set, the immediate must be negated
58 * @return non-zero if the DAG represents an immediate, 0 else
60 static int do_is_immediate(const ir_node *node, int *symconsts, int negate)
65 switch (get_irn_opcode(node)) {
67 /* Consts are typically immediates */
68 if (!tarval_is_long(get_Const_tarval(node))) {
70 ir_fprintf(stderr, "Optimisation warning tarval of %+F(%+F) is not "
71 "a long.\n", node, current_ir_graph);
77 /* the first SymConst of a DAG can be fold into an immediate */
78 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
79 /* unfortunately the assembler/linker doesn't support -symconst */
84 if(get_SymConst_kind(node) != symconst_addr_ent)
93 /* Add's and Sub's are typically supported as long as both operands are immediates */
94 if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
97 left = get_binop_left(node);
98 right = get_binop_right(node);
99 if(!do_is_immediate(left, symconsts, negate))
101 if(!do_is_immediate(right, symconsts, is_Sub(node) ? !negate : negate))
106 /* all other nodes are NO immediates */
112 * Checks if a DAG with a single root node can be represented as a simple immediate.
114 * @param node the node
116 * @return non-zero if the DAG represents an immediate, 0 else
119 static int is_immediate_simple(const ir_node *node) {
121 return do_is_immediate(node, &symconsts, 0);
126 * Check if a DAG starting with root node can be folded into an address mode
129 * @param addr the address mode data so far
130 * @param node the node
131 * @param negate if set, the immediate must be negated
133 static int is_immediate(ia32_address_t *addr, const ir_node *node, int negate)
135 int symconsts = (addr->symconst_ent != NULL);
136 return do_is_immediate(node, &symconsts, negate);
140 * Place a DAG with root node into an address mode.
142 * @param addr the address mode data so far
143 * @param node the node
144 * @param negate if set, the immediate must be negated
146 static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate)
153 switch (get_irn_opcode(node)) {
155 /* simply add the value to the offset */
156 tv = get_Const_tarval(node);
157 val = get_tarval_long(tv);
165 /* place the entity into the symconst */
166 if (addr->symconst_ent != NULL) {
167 panic("Internal error: more than 1 symconst in address "
170 addr->symconst_ent = get_SymConst_entity(node);
171 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
174 addr->symconst_sign = negate;
177 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
178 left = get_Add_left(node);
179 right = get_Add_right(node);
180 eat_immediate(addr, left, negate);
181 eat_immediate(addr, right, negate);
184 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
185 left = get_Sub_left(node);
186 right = get_Sub_right(node);
187 eat_immediate(addr, left, negate);
188 eat_immediate(addr, right, !negate);
191 panic("Internal error in immediate address calculation");
196 * Place operands of node into an address mode.
198 * @param addr the address mode data so far
199 * @param node the node
200 * @param force if set, ignore the marking of node as a non-address-mode node
202 * @return the folded node
204 static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node, int force)
206 if(!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
210 ir_node *left = get_Add_left(node);
211 ir_node *right = get_Add_right(node);
213 if(is_immediate(addr, left, 0)) {
214 eat_immediate(addr, left, 0);
215 return eat_immediates(addr, right, 0);
217 if(is_immediate(addr, right, 0)) {
218 eat_immediate(addr, right, 0);
219 return eat_immediates(addr, left, 0);
221 } else if(is_Sub(node)) {
222 ir_node *left = get_Sub_left(node);
223 ir_node *right = get_Sub_right(node);
225 if(is_immediate(addr, right, 1)) {
226 eat_immediate(addr, right, 1);
227 return eat_immediates(addr, left, 0);
235 * Try to place a Shl into an address mode.
237 * @param addr the address mode data so far
238 * @param node the node to place
240 * @return non-zero on success
242 static int eat_shl(ia32_address_t *addr, ir_node *node)
244 ir_node *shifted_val;
248 ir_node *right = get_Shl_right(node);
251 /* we can use shl with 1, 2 or 3 shift */
254 tv = get_Const_tarval(right);
255 if(!tarval_is_long(tv))
258 val = get_tarval_long(tv);
259 if(val < 0 || val > 3)
262 ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) "
266 shifted_val = get_Shl_left(node);
267 } else if(is_Add(node)) {
268 /* might be an add x, x */
269 ir_node *left = get_Add_left(node);
270 ir_node *right = get_Add_right(node);
283 /* we can only eat a shl if we don't have a scale or index set yet */
284 if(addr->scale != 0 || addr->index != NULL)
286 if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
289 #ifndef AGGRESSIVE_AM
290 if(get_irn_n_edges(node) > 1)
295 addr->index = shifted_val;
300 * Returns non-zero if a value of a given mode can be stored in GP registers.
302 static INLINE int mode_needs_gp_reg(ir_mode *mode) {
303 if(mode == mode_fpcw)
305 if(get_mode_size_bits(mode) > 32)
307 return mode_is_int(mode) || mode_is_reference(mode) || mode == mode_b;
310 /* Create an address mode for a given node. */
311 void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
316 if(is_immediate(addr, node, 0)) {
317 eat_immediate(addr, node, 0);
321 #ifndef AGGRESSIVE_AM
322 if(!force && get_irn_n_edges(node) > 1) {
328 if(!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
333 eat_imms = eat_immediates(addr, node, force);
334 if(eat_imms != node) {
336 eat_imms = ia32_skip_downconv(eat_imms);
341 #ifndef AGGRESSIVE_AM
342 if(get_irn_n_edges(node) > 1) {
347 if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
353 /* starting point Add, Sub or Shl, FrameAddr */
354 if(is_Shl(node)) { /* we don't want to eat add x, x as shl here, so only
355 test for real Shl instructions */
356 if(eat_shl(addr, node))
358 } else if(is_immediate(addr, node, 0)) {
359 eat_immediate(addr, node, 0);
361 } else if(be_is_FrameAddr(node)) {
362 assert(addr->base == NULL);
363 assert(addr->frame_entity == NULL);
364 addr->base = be_get_FrameAddr_frame(node);
366 addr->frame_entity = be_get_FrameAddr_entity(node);
368 } else if(is_Add(node)) {
369 ir_node *left = get_Add_left(node);
370 ir_node *right = get_Add_right(node);
373 left = ia32_skip_downconv(left);
374 right = ia32_skip_downconv(right);
377 assert(force || !is_immediate(addr, left, 0));
378 assert(force || !is_immediate(addr, right, 0));
380 if(eat_shl(addr, left)) {
382 } else if(eat_shl(addr, right)) {
385 if(left != NULL && be_is_FrameAddr(left)
386 && !bitset_is_set(non_address_mode_nodes, get_irn_idx(left))) {
387 assert(addr->base == NULL);
388 assert(addr->frame_entity == NULL);
389 addr->base = be_get_FrameAddr_frame(left);
391 addr->frame_entity = be_get_FrameAddr_entity(left);
393 } else if(right != NULL && be_is_FrameAddr(right)
394 && !bitset_is_set(non_address_mode_nodes, get_irn_idx(right))) {
395 assert(addr->base == NULL);
396 assert(addr->frame_entity == NULL);
397 addr->base = be_get_FrameAddr_frame(right);
399 addr->frame_entity = be_get_FrameAddr_entity(right);
404 if(addr->base != NULL) {
405 assert(addr->index == NULL && addr->scale == 0);
406 assert(right == NULL);
413 if(addr->base == NULL) {
416 assert(addr->index == NULL && addr->scale == 0);
426 void ia32_mark_non_am(ir_node *node)
428 bitset_set(non_address_mode_nodes, get_irn_idx(node));
432 * Walker: mark those nodes that cannot be part of an address mode because
433 * there value must be access through an register
435 static void mark_non_address_nodes(ir_node *node, void *env)
445 const ir_edge_t *edge;
448 mode = get_irn_mode(node);
449 if(!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
452 switch(get_irn_opcode(node)) {
454 ptr = get_Load_ptr(node);
455 mem = get_Load_mem(node);
457 bitset_set(non_address_mode_nodes, get_irn_idx(mem));
461 val = get_Store_value(node);
462 ptr = get_Store_ptr(node);
463 mem = get_Store_mem(node);
465 bitset_set(non_address_mode_nodes, get_irn_idx(val));
466 bitset_set(non_address_mode_nodes, get_irn_idx(mem));
471 /* only 1 user: AM folding is always beneficial */
472 if(get_irn_n_edges(node) <= 1)
475 /* for adds and shls with multiple users we use this heuristic:
476 * we do not fold them into address mode if their operands don't live
477 * out of the block, because in this case we will reduce register
478 * pressure. Otherwise we fold them in aggressively in the hope, that
479 * the node itself doesn't exist anymore and we were able to save the
480 * register for the result */
481 block = get_nodes_block(node);
482 left = get_binop_left(node);
483 right = get_binop_right(node);
485 /* live end: we won't save a register by AM folding */
486 if(be_is_live_end(lv, block, left) || be_is_live_end(lv, block, right))
489 /* if multiple nodes in this block use left/right values, then we
490 * can't really decide wether the values will die after node.
491 * We use aggressive mode then, since it's usually just multiple address
493 foreach_out_edge(left, edge) {
494 ir_node *user = get_edge_src_irn(edge);
495 if(user != node && get_nodes_block(user) == block)
498 foreach_out_edge(right, edge) {
499 ir_node *user = get_edge_src_irn(edge);
500 if(user != node && get_nodes_block(user) == block)
504 /* noone-else in this block is using left/right so we'll reduce register
505 * pressure if we don't fold the node */
506 bitset_set(non_address_mode_nodes, get_irn_idx(node));
510 arity = get_irn_arity(node);
512 for(i = 0; i < arity; ++i) {
513 ir_node *in = get_irn_n(node, i);
514 bitset_set(non_address_mode_nodes, get_irn_idx(in));
520 void ia32_calculate_non_address_mode_nodes(be_irg_t *birg)
522 ir_graph *irg = be_get_birg_irg(birg);
524 lv = be_assure_liveness(birg);
525 non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg));
527 irg_walk_graph(irg, NULL, mark_non_address_nodes, NULL);
530 void ia32_free_non_address_mode_nodes(void)
532 bitset_free(non_address_mode_nodes);