2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file contains functions for matching firm graphs for
23 * nodes that can be used as address mode for x86 instructions
24 * @author Matthias Braun
29 #include "ia32_address_mode.h"
30 #include "ia32_transform.h"
36 #include "iredges_t.h"
39 #include "../benode_t.h"
43 /* gas/ld don't support negative symconsts :-( */
44 #undef SUPPORT_NEGATIVE_SYMCONSTS
47 static bitset_t *non_address_mode_nodes;
50 * Recursive worker for checking if a DAG with root node can be represented as a simple immediate,
52 * @param node the node
53 * @param symconsts number of symconsts found so far
54 * @param negate if set, the immediate must be negated
56 * @return non-zero if the DAG represents an immediate, 0 else
58 static int do_is_immediate(const ir_node *node, int *symconsts, int negate)
63 switch (get_irn_opcode(node)) {
65 /* Consts are typically immediates */
66 if (!tarval_is_long(get_Const_tarval(node))) {
69 "Optimisation warning tarval of %+F(%+F) is not a long.\n",
70 node, current_ir_graph);
76 /* the first SymConst of a DAG can be fold into an immediate */
77 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
78 /* unfortunately the assembler/linker doesn't support -symconst */
83 if (get_SymConst_kind(node) != symconst_addr_ent)
92 /* Add's and Sub's are typically supported as long as both operands are
94 if (bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
97 left = get_binop_left(node);
98 right = get_binop_right(node);
99 if (!do_is_immediate(left, symconsts, negate))
101 if (!do_is_immediate(right, symconsts, is_Sub(node) ? !negate : negate))
106 /* all other nodes are NO immediates */
112 * Checks if a DAG with a single root node can be represented as a simple immediate.
114 * @param node the node
116 * @return non-zero if the DAG represents an immediate, 0 else
119 static int is_immediate_simple(const ir_node *node) {
121 return do_is_immediate(node, &symconsts, 0);
126 * Check if a DAG starting with root node can be folded into an address mode
129 * @param addr the address mode data so far
130 * @param node the node
131 * @param negate if set, the immediate must be negated
133 static int is_immediate(ia32_address_t *addr, const ir_node *node, int negate)
135 int symconsts = (addr->symconst_ent != NULL);
136 return do_is_immediate(node, &symconsts, negate);
140 * Place a DAG with root node into an address mode.
142 * @param addr the address mode data so far
143 * @param node the node
144 * @param negate if set, the immediate must be negated
146 static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate)
153 switch (get_irn_opcode(node)) {
155 /* simply add the value to the offset */
156 tv = get_Const_tarval(node);
157 val = get_tarval_long(tv);
165 /* place the entity into the symconst */
166 if (addr->symconst_ent != NULL) {
167 panic("Internal error: more than 1 symconst in address calculation");
169 addr->symconst_ent = get_SymConst_entity(node);
170 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
173 addr->symconst_sign = negate;
176 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
177 left = get_Add_left(node);
178 right = get_Add_right(node);
179 eat_immediate(addr, left, negate);
180 eat_immediate(addr, right, negate);
183 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
184 left = get_Sub_left(node);
185 right = get_Sub_right(node);
186 eat_immediate(addr, left, negate);
187 eat_immediate(addr, right, !negate);
190 panic("Internal error in immediate address calculation");
195 * Place operands of node into an address mode.
197 * @param addr the address mode data so far
198 * @param node the node
199 * @param force if set, ignore the marking of node as a non-address-mode node
201 * @return the folded node
203 static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node, int force)
205 if (!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
209 ir_node *left = get_Add_left(node);
210 ir_node *right = get_Add_right(node);
212 if (is_immediate(addr, left, 0)) {
213 eat_immediate(addr, left, 0);
214 return eat_immediates(addr, right, 0);
216 if (is_immediate(addr, right, 0)) {
217 eat_immediate(addr, right, 0);
218 return eat_immediates(addr, left, 0);
220 } else if (is_Sub(node)) {
221 ir_node *left = get_Sub_left(node);
222 ir_node *right = get_Sub_right(node);
224 if (is_immediate(addr, right, 1)) {
225 eat_immediate(addr, right, 1);
226 return eat_immediates(addr, left, 0);
234 * Try to place a Shl into an address mode.
236 * @param addr the address mode data so far
237 * @param node the node to place
239 * @return non-zero on success
241 static int eat_shl(ia32_address_t *addr, ir_node *node)
243 ir_node *shifted_val;
247 ir_node *right = get_Shl_right(node);
250 /* we can use shl with 1, 2 or 3 shift */
251 if (!is_Const(right))
253 tv = get_Const_tarval(right);
254 if (!tarval_is_long(tv))
257 val = get_tarval_long(tv);
258 if (val < 0 || val > 3)
261 ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
264 shifted_val = get_Shl_left(node);
265 } else if (is_Add(node)) {
266 /* might be an add x, x */
267 ir_node *left = get_Add_left(node);
268 ir_node *right = get_Add_right(node);
281 /* we can only eat a shl if we don't have a scale or index set yet */
282 if (addr->scale != 0 || addr->index != NULL)
284 if (bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
287 #ifndef AGGRESSIVE_AM
288 if (get_irn_n_edges(node) > 1)
293 addr->index = shifted_val;
297 /* Create an address mode for a given node. */
298 void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
303 if (is_immediate(addr, node, 0)) {
304 eat_immediate(addr, node, 0);
308 #ifndef AGGRESSIVE_AM
309 if (!force && get_irn_n_edges(node) > 1) {
315 if (!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
320 eat_imms = eat_immediates(addr, node, force);
321 if (eat_imms != node) {
323 eat_imms = ia32_skip_downconv(eat_imms);
328 #ifndef AGGRESSIVE_AM
329 if (get_irn_n_edges(node) > 1) {
334 if (bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
340 /* starting point Add, Sub or Shl, FrameAddr */
342 /* We don't want to eat add x, x as shl here, so only test for real Shl
343 * instructions, because we want the former as Lea x, x, not Shl x, 1 */
344 if (eat_shl(addr, node))
346 } else if (is_immediate(addr, node, 0)) {
347 eat_immediate(addr, node, 0);
349 } else if (be_is_FrameAddr(node)) {
350 assert(addr->base == NULL);
351 assert(addr->frame_entity == NULL);
352 addr->base = be_get_FrameAddr_frame(node);
354 addr->frame_entity = be_get_FrameAddr_entity(node);
356 } else if (is_Add(node)) {
357 ir_node *left = get_Add_left(node);
358 ir_node *right = get_Add_right(node);
361 left = ia32_skip_downconv(left);
362 right = ia32_skip_downconv(right);
365 assert(force || !is_immediate(addr, left, 0));
366 assert(force || !is_immediate(addr, right, 0));
368 if (eat_shl(addr, left)) {
370 } else if (eat_shl(addr, right)) {
374 be_is_FrameAddr(left) &&
375 !bitset_is_set(non_address_mode_nodes, get_irn_idx(left))) {
376 assert(addr->base == NULL);
377 assert(addr->frame_entity == NULL);
378 addr->base = be_get_FrameAddr_frame(left);
380 addr->frame_entity = be_get_FrameAddr_entity(left);
382 } else if (right != NULL &&
383 be_is_FrameAddr(right) &&
384 !bitset_is_set(non_address_mode_nodes, get_irn_idx(right))) {
385 assert(addr->base == NULL);
386 assert(addr->frame_entity == NULL);
387 addr->base = be_get_FrameAddr_frame(right);
389 addr->frame_entity = be_get_FrameAddr_entity(right);
394 if (addr->base != NULL) {
395 assert(addr->index == NULL && addr->scale == 0);
396 assert(right == NULL);
403 if (addr->base == NULL) {
406 assert(addr->index == NULL && addr->scale == 0);
416 void ia32_mark_non_am(ir_node *node)
418 bitset_set(non_address_mode_nodes, get_irn_idx(node));
421 int ia32_is_non_address_mode_node(ir_node *node)
423 return bitset_is_set(non_address_mode_nodes, get_irn_idx(node));
426 static int value_last_used_here(ir_node *here, ir_node *value)
428 ir_node *block = get_nodes_block(here);
429 const ir_edge_t *edge;
431 /* If the value is live end it is for sure it does not die here */
432 if (be_is_live_end(lv, block, value)) return 0;
434 /* if multiple nodes in this block use the value, then we cannot decide
435 * whether the value will die here (because there is no schedule yet).
436 * Assume it does not die in this case. */
437 foreach_out_edge(value, edge) {
438 ir_node *user = get_edge_src_irn(edge);
439 if (user != here && get_nodes_block(user) == block) {
448 * Walker: mark those nodes that cannot be part of an address mode because
449 * their value must be accessed through a register
451 static void mark_non_address_nodes(ir_node *node, void *env)
460 mode = get_irn_mode(node);
461 if (!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
464 switch (get_irn_opcode(node)) {
466 /* Nothing to do. especially do not mark the pointer, because we want to
467 * turn it into AM. */
471 /* Do not mark the pointer, because we want to turn it into AM. */
472 val = get_Store_value(node);
473 bitset_set(non_address_mode_nodes, get_irn_idx(val));
478 /* only 1 user: AM folding is always beneficial */
479 if (get_irn_n_edges(node) <= 1)
482 /* for adds and shls with multiple users we use this heuristic:
483 * we do not fold them into address mode if their operands don't live
484 * out of the block, because in this case we will reduce register
485 * pressure. Otherwise we fold them in aggressively in the hope, that
486 * the node itself doesn't exist anymore and we were able to save the
487 * register for the result */
488 left = get_binop_left(node);
489 right = get_binop_right(node);
491 /* Fold AM if any of the two operands does not die here. This duplicates
492 * an addition and has the same register pressure for the case that only
493 * one operand dies, but is faster (on Pentium 4).
494 * && instead of || only folds AM if both operands do not die here */
495 if (!value_last_used_here(node, left) ||
496 !value_last_used_here(node, right)) {
500 /* At least one of left and right are not used by anyone else, so it is
501 * beneficial for the register pressure (if both are unused otherwise,
502 * else neutral) and ALU use to not fold AM. */
503 bitset_set(non_address_mode_nodes, get_irn_idx(node));
507 arity = get_irn_arity(node);
509 for (i = 0; i < arity; ++i) {
510 ir_node *in = get_irn_n(node, i);
511 bitset_set(non_address_mode_nodes, get_irn_idx(in));
517 void ia32_calculate_non_address_mode_nodes(be_irg_t *birg)
519 ir_graph *irg = be_get_birg_irg(birg);
521 lv = be_assure_liveness(birg);
522 non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg));
524 irg_walk_graph(irg, NULL, mark_non_address_nodes, NULL);
527 void ia32_free_non_address_mode_nodes(void)
529 bitset_free(non_address_mode_nodes);