2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file contains functions for matching firm graphs for
23 * nodes that can be used as address mode for x86 instructions
24 * @author Matthias Braun
29 #include "ia32_address_mode.h"
30 #include "ia32_transform.h"
36 #include "iredges_t.h"
39 #include "../benode_t.h"
43 /* gas/ld don't support negative symconsts :-( */
44 #undef SUPPORT_NEGATIVE_SYMCONSTS
47 static bitset_t *non_address_mode_nodes;
50 * Recursive worker for checking if a DAG with root node can be represented as a simple immediate,
52 * @param node the node
53 * @param symconsts number of symconsts found so far
54 * @param negate if set, the immediate must be negated
56 * @return non-zero if the DAG represents an immediate, 0 else
58 static int do_is_immediate(const ir_node *node, int *symconsts, int negate)
63 switch (get_irn_opcode(node)) {
65 /* Consts are typically immediates */
66 if (!tarval_is_long(get_Const_tarval(node))) {
69 "Optimisation warning tarval of %+F(%+F) is not a long.\n",
70 node, current_ir_graph);
76 /* the first SymConst of a DAG can be fold into an immediate */
77 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
78 /* unfortunately the assembler/linker doesn't support -symconst */
83 if (get_SymConst_kind(node) != symconst_addr_ent)
92 /* Add's and Sub's are typically supported as long as both operands are
94 if (bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
97 left = get_binop_left(node);
98 right = get_binop_right(node);
99 if (!do_is_immediate(left, symconsts, negate))
101 if (!do_is_immediate(right, symconsts, is_Sub(node) ? !negate : negate))
106 /* all other nodes are NO immediates */
112 * Checks if a DAG with a single root node can be represented as a simple immediate.
114 * @param node the node
116 * @return non-zero if the DAG represents an immediate, 0 else
119 static int is_immediate_simple(const ir_node *node) {
121 return do_is_immediate(node, &symconsts, 0);
126 * Check if a DAG starting with root node can be folded into an address mode
129 * @param addr the address mode data so far
130 * @param node the node
131 * @param negate if set, the immediate must be negated
133 static int is_immediate(ia32_address_t *addr, const ir_node *node, int negate)
135 int symconsts = (addr->symconst_ent != NULL);
136 return do_is_immediate(node, &symconsts, negate);
140 * Place a DAG with root node into an address mode.
142 * @param addr the address mode data so far
143 * @param node the node
144 * @param negate if set, the immediate must be negated
146 static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate)
153 switch (get_irn_opcode(node)) {
155 /* simply add the value to the offset */
156 tv = get_Const_tarval(node);
157 val = get_tarval_long(tv);
165 /* place the entity into the symconst */
166 if (addr->symconst_ent != NULL) {
167 panic("Internal error: more than 1 symconst in address calculation");
169 addr->symconst_ent = get_SymConst_entity(node);
170 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
173 addr->symconst_sign = negate;
176 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
177 left = get_Add_left(node);
178 right = get_Add_right(node);
179 eat_immediate(addr, left, negate);
180 eat_immediate(addr, right, negate);
183 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
184 left = get_Sub_left(node);
185 right = get_Sub_right(node);
186 eat_immediate(addr, left, negate);
187 eat_immediate(addr, right, !negate);
190 panic("Internal error in immediate address calculation");
195 * Place operands of node into an address mode.
197 * @param addr the address mode data so far
198 * @param node the node
199 * @param flags the flags
201 * @return the folded node
203 static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node,
204 ia32_create_am_flags_t flags)
206 if (!(flags & ia32_create_am_force) &&
207 bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
211 ir_node *left = get_Add_left(node);
212 ir_node *right = get_Add_right(node);
214 if (is_immediate(addr, left, 0)) {
215 eat_immediate(addr, left, 0);
216 return eat_immediates(addr, right, 0);
218 if (is_immediate(addr, right, 0)) {
219 eat_immediate(addr, right, 0);
220 return eat_immediates(addr, left, 0);
222 } else if (is_Sub(node)) {
223 ir_node *left = get_Sub_left(node);
224 ir_node *right = get_Sub_right(node);
226 if (is_immediate(addr, right, 1)) {
227 eat_immediate(addr, right, 1);
228 return eat_immediates(addr, left, 0);
236 * Try to place a Shl into an address mode.
238 * @param addr the address mode data so far
239 * @param node the node to place
241 * @return non-zero on success
243 static int eat_shl(ia32_address_t *addr, ir_node *node)
245 ir_node *shifted_val;
249 ir_node *right = get_Shl_right(node);
252 /* we can use shl with 1, 2 or 3 shift */
253 if (!is_Const(right))
255 tv = get_Const_tarval(right);
256 if (!tarval_is_long(tv))
259 val = get_tarval_long(tv);
260 if (val < 0 || val > 3)
263 ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
266 shifted_val = get_Shl_left(node);
267 } else if (is_Add(node)) {
268 /* might be an add x, x */
269 ir_node *left = get_Add_left(node);
270 ir_node *right = get_Add_right(node);
283 /* we can only eat a shl if we don't have a scale or index set yet */
284 if (addr->scale != 0 || addr->index != NULL)
286 if (bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
289 #ifndef AGGRESSIVE_AM
290 if (get_irn_n_edges(node) > 1)
295 addr->index = shifted_val;
299 /* Create an address mode for a given node. */
300 void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, ia32_create_am_flags_t flags)
305 if (is_immediate(addr, node, 0)) {
306 eat_immediate(addr, node, 0);
310 #ifndef AGGRESSIVE_AM
311 if (!(flags & ia32_create_am_force) && get_irn_n_edges(node) > 1) {
317 if (!(flags & ia32_create_am_force) &&
318 bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
323 eat_imms = eat_immediates(addr, node, flags);
324 if (eat_imms != node) {
325 if (flags & ia32_create_am_force) {
326 eat_imms = ia32_skip_downconv(eat_imms);
331 #ifndef AGGRESSIVE_AM
332 if (get_irn_n_edges(node) > 1) {
337 if (bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
343 /* starting point Add, Sub or Shl, FrameAddr */
345 /* We don't want to eat add x, x as shl here, so only test for real Shl
346 * instructions, because we want the former as Lea x, x, not Shl x, 1 */
347 if (eat_shl(addr, node))
349 } else if (is_immediate(addr, node, 0)) {
350 eat_immediate(addr, node, 0);
352 } else if (be_is_FrameAddr(node)) {
353 assert(addr->base == NULL);
354 assert(addr->frame_entity == NULL);
355 addr->base = be_get_FrameAddr_frame(node);
357 addr->frame_entity = be_get_FrameAddr_entity(node);
359 } else if (is_Add(node)) {
360 ir_node *left = get_Add_left(node);
361 ir_node *right = get_Add_right(node);
363 if (flags & ia32_create_am_force) {
364 left = ia32_skip_downconv(left);
365 right = ia32_skip_downconv(right);
368 assert(flags & ia32_create_am_force || !is_immediate(addr, left, 0));
369 assert(flags & ia32_create_am_force || !is_immediate(addr, right, 0));
371 if (eat_shl(addr, left)) {
373 } else if (eat_shl(addr, right)) {
377 be_is_FrameAddr(left) &&
378 !bitset_is_set(non_address_mode_nodes, get_irn_idx(left))) {
379 assert(addr->base == NULL);
380 assert(addr->frame_entity == NULL);
381 addr->base = be_get_FrameAddr_frame(left);
383 addr->frame_entity = be_get_FrameAddr_entity(left);
385 } else if (right != NULL &&
386 be_is_FrameAddr(right) &&
387 !bitset_is_set(non_address_mode_nodes, get_irn_idx(right))) {
388 assert(addr->base == NULL);
389 assert(addr->frame_entity == NULL);
390 addr->base = be_get_FrameAddr_frame(right);
392 addr->frame_entity = be_get_FrameAddr_entity(right);
397 if (addr->base != NULL) {
398 assert(addr->index == NULL && addr->scale == 0);
399 assert(right == NULL);
406 if (addr->base == NULL) {
409 assert(addr->index == NULL && addr->scale == 0);
419 void ia32_mark_non_am(ir_node *node)
421 bitset_set(non_address_mode_nodes, get_irn_idx(node));
424 int ia32_is_non_address_mode_node(ir_node *node)
426 return bitset_is_set(non_address_mode_nodes, get_irn_idx(node));
429 static int value_last_used_here(ir_node *here, ir_node *value)
431 ir_node *block = get_nodes_block(here);
432 const ir_edge_t *edge;
434 /* If the value is live end it is for sure it does not die here */
435 if (be_is_live_end(lv, block, value)) return 0;
437 /* if multiple nodes in this block use the value, then we cannot decide
438 * whether the value will die here (because there is no schedule yet).
439 * Assume it does not die in this case. */
440 foreach_out_edge(value, edge) {
441 ir_node *user = get_edge_src_irn(edge);
442 if (user != here && get_nodes_block(user) == block) {
451 * Walker: mark those nodes that cannot be part of an address mode because
452 * their value must be accessed through a register
454 static void mark_non_address_nodes(ir_node *node, void *env)
463 mode = get_irn_mode(node);
464 if (!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
467 switch (get_irn_opcode(node)) {
469 /* Nothing to do. especially do not mark the pointer, because we want to
470 * turn it into AM. */
474 /* Do not mark the pointer, because we want to turn it into AM. */
475 val = get_Store_value(node);
476 bitset_set(non_address_mode_nodes, get_irn_idx(val));
481 /* only 1 user: AM folding is always beneficial */
482 if (get_irn_n_edges(node) <= 1)
485 /* for adds and shls with multiple users we use this heuristic:
486 * we do not fold them into address mode if their operands don't live
487 * out of the block, because in this case we will reduce register
488 * pressure. Otherwise we fold them in aggressively in the hope, that
489 * the node itself doesn't exist anymore and we were able to save the
490 * register for the result */
491 left = get_binop_left(node);
492 right = get_binop_right(node);
494 /* Fold AM if any of the two operands does not die here. This duplicates
495 * an addition and has the same register pressure for the case that only
496 * one operand dies, but is faster (on Pentium 4).
497 * && instead of || only folds AM if both operands do not die here */
498 if (!value_last_used_here(node, left) ||
499 !value_last_used_here(node, right)) {
503 /* At least one of left and right are not used by anyone else, so it is
504 * beneficial for the register pressure (if both are unused otherwise,
505 * else neutral) and ALU use to not fold AM. */
506 bitset_set(non_address_mode_nodes, get_irn_idx(node));
510 arity = get_irn_arity(node);
512 for (i = 0; i < arity; ++i) {
513 ir_node *in = get_irn_n(node, i);
514 bitset_set(non_address_mode_nodes, get_irn_idx(in));
520 void ia32_calculate_non_address_mode_nodes(be_irg_t *birg)
522 ir_graph *irg = be_get_birg_irg(birg);
524 lv = be_assure_liveness(birg);
525 non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg));
527 irg_walk_graph(irg, NULL, mark_non_address_nodes, NULL);
530 void ia32_free_non_address_mode_nodes(void)
532 bitset_free(non_address_mode_nodes);