2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file contains functions for matching firm graphs for
23 * nodes that can be used as address mode for x86 instructions
24 * @author Matthias Braun
29 #include "ia32_address_mode.h"
30 #include "ia32_transform.h"
36 #include "iredges_t.h"
39 #include "../benode_t.h"
43 /* gas/ld don't support negative symconsts :-( */
44 #undef SUPPORT_NEGATIVE_SYMCONSTS
46 static bitset_t *non_address_mode_nodes;
49 * Recursive worker for checking if a DAG with root node can be represented as a simple immediate,
51 * @param node the node
52 * @param symconsts number of symconsts found so far
53 * @param negate if set, the immediate must be negated
55 * @return non-zero if the DAG represents an immediate, 0 else
57 static int do_is_immediate(const ir_node *node, int *symconsts, int negate)
62 switch (get_irn_opcode(node)) {
64 /* Consts are typically immediates */
65 if (!tarval_is_long(get_Const_tarval(node))) {
68 "Optimisation warning tarval of %+F(%+F) is not a long.\n",
69 node, current_ir_graph);
75 /* the first SymConst of a DAG can be fold into an immediate */
76 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
77 /* unfortunately the assembler/linker doesn't support -symconst */
82 if (get_SymConst_kind(node) != symconst_addr_ent)
91 /* Add's and Sub's are typically supported as long as both operands are
93 if (ia32_is_non_address_mode_node(node))
96 left = get_binop_left(node);
97 right = get_binop_right(node);
98 if (!do_is_immediate(left, symconsts, negate))
100 if (!do_is_immediate(right, symconsts, is_Sub(node) ? !negate : negate))
105 /* all other nodes are NO immediates */
111 * Checks if a DAG with a single root node can be represented as a simple immediate.
113 * @param node the node
115 * @return non-zero if the DAG represents an immediate, 0 else
118 static int is_immediate_simple(const ir_node *node) {
120 return do_is_immediate(node, &symconsts, 0);
125 * Check if a DAG starting with root node can be folded into an address mode
128 * @param addr the address mode data so far
129 * @param node the node
130 * @param negate if set, the immediate must be negated
132 static int is_immediate(ia32_address_t *addr, const ir_node *node, int negate)
134 int symconsts = (addr->symconst_ent != NULL);
135 return do_is_immediate(node, &symconsts, negate);
139 * Place a DAG with root node into an address mode.
141 * @param addr the address mode data so far
142 * @param node the node
143 * @param negate if set, the immediate must be negated
145 static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate)
152 switch (get_irn_opcode(node)) {
154 /* simply add the value to the offset */
155 tv = get_Const_tarval(node);
156 val = get_tarval_long(tv);
164 /* place the entity into the symconst */
165 if (addr->symconst_ent != NULL) {
166 panic("Internal error: more than 1 symconst in address calculation");
168 addr->symconst_ent = get_SymConst_entity(node);
169 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
172 addr->symconst_sign = negate;
175 assert(!ia32_is_non_address_mode_node(node));
176 left = get_Add_left(node);
177 right = get_Add_right(node);
178 eat_immediate(addr, left, negate);
179 eat_immediate(addr, right, negate);
182 assert(!ia32_is_non_address_mode_node(node));
183 left = get_Sub_left(node);
184 right = get_Sub_right(node);
185 eat_immediate(addr, left, negate);
186 eat_immediate(addr, right, !negate);
189 panic("Internal error in immediate address calculation");
194 * Place operands of node into an address mode.
196 * @param addr the address mode data so far
197 * @param node the node
198 * @param flags the flags
200 * @return the folded node
202 static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node,
203 ia32_create_am_flags_t flags)
205 if (!(flags & ia32_create_am_force) &&
206 ia32_is_non_address_mode_node(node) &&
207 (!(flags & ia32_create_am_double_use) || get_irn_n_edges(node) > 2))
211 ir_node *left = get_Add_left(node);
212 ir_node *right = get_Add_right(node);
214 if (is_immediate(addr, left, 0)) {
215 eat_immediate(addr, left, 0);
216 return eat_immediates(addr, right, 0);
218 if (is_immediate(addr, right, 0)) {
219 eat_immediate(addr, right, 0);
220 return eat_immediates(addr, left, 0);
222 } else if (is_Sub(node)) {
223 ir_node *left = get_Sub_left(node);
224 ir_node *right = get_Sub_right(node);
226 if (is_immediate(addr, right, 1)) {
227 eat_immediate(addr, right, 1);
228 return eat_immediates(addr, left, 0);
236 * Try to place a Shl into an address mode.
238 * @param addr the address mode data so far
239 * @param node the node to place
241 * @return non-zero on success
243 static int eat_shl(ia32_address_t *addr, ir_node *node)
245 ir_node *shifted_val;
249 ir_node *right = get_Shl_right(node);
252 /* we can use shl with 1, 2 or 3 shift */
253 if (!is_Const(right))
255 tv = get_Const_tarval(right);
256 if (!tarval_is_long(tv))
259 val = get_tarval_long(tv);
260 if (val < 0 || val > 3)
263 ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
266 shifted_val = get_Shl_left(node);
267 } else if (is_Add(node)) {
268 /* might be an add x, x */
269 ir_node *left = get_Add_left(node);
270 ir_node *right = get_Add_right(node);
283 /* we can only eat a shl if we don't have a scale or index set yet */
284 if (addr->scale != 0 || addr->index != NULL)
286 if (ia32_is_non_address_mode_node(node))
289 #ifndef AGGRESSIVE_AM
290 if (get_irn_n_edges(node) > 1)
295 addr->index = shifted_val;
299 /* Create an address mode for a given node. */
300 void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, ia32_create_am_flags_t flags)
305 if (is_immediate(addr, node, 0)) {
306 eat_immediate(addr, node, 0);
310 #ifndef AGGRESSIVE_AM
311 if (!(flags & ia32_create_am_force) && get_irn_n_edges(node) > 1) {
317 if (!(flags & ia32_create_am_force) &&
318 ia32_is_non_address_mode_node(node) &&
319 (!(flags & ia32_create_am_double_use) || get_irn_n_edges(node) > 2)) {
324 eat_imms = eat_immediates(addr, node, flags);
325 if (eat_imms != node) {
326 if (flags & ia32_create_am_force) {
327 eat_imms = ia32_skip_downconv(eat_imms);
332 #ifndef AGGRESSIVE_AM
333 if (get_irn_n_edges(node) > 1) {
338 if (ia32_is_non_address_mode_node(node)) {
344 /* starting point Add, Sub or Shl, FrameAddr */
346 /* We don't want to eat add x, x as shl here, so only test for real Shl
347 * instructions, because we want the former as Lea x, x, not Shl x, 1 */
348 if (eat_shl(addr, node))
350 } else if (is_immediate(addr, node, 0)) {
351 eat_immediate(addr, node, 0);
353 } else if (be_is_FrameAddr(node)) {
354 assert(addr->base == NULL);
355 assert(addr->frame_entity == NULL);
356 addr->base = be_get_FrameAddr_frame(node);
358 addr->frame_entity = be_get_FrameAddr_entity(node);
360 } else if (is_Add(node)) {
361 ir_node *left = get_Add_left(node);
362 ir_node *right = get_Add_right(node);
364 if (flags & ia32_create_am_force) {
365 left = ia32_skip_downconv(left);
366 right = ia32_skip_downconv(right);
369 assert(flags & ia32_create_am_force || !is_immediate(addr, left, 0));
370 assert(flags & ia32_create_am_force || !is_immediate(addr, right, 0));
372 if (eat_shl(addr, left)) {
374 } else if (eat_shl(addr, right)) {
378 be_is_FrameAddr(left) &&
379 !ia32_is_non_address_mode_node(left)) {
380 assert(addr->base == NULL);
381 assert(addr->frame_entity == NULL);
382 addr->base = be_get_FrameAddr_frame(left);
384 addr->frame_entity = be_get_FrameAddr_entity(left);
386 } else if (right != NULL &&
387 be_is_FrameAddr(right) &&
388 !ia32_is_non_address_mode_node(right)) {
389 assert(addr->base == NULL);
390 assert(addr->frame_entity == NULL);
391 addr->base = be_get_FrameAddr_frame(right);
393 addr->frame_entity = be_get_FrameAddr_entity(right);
398 if (addr->base != NULL) {
399 assert(addr->index == NULL && addr->scale == 0);
400 assert(right == NULL);
407 if (addr->base == NULL) {
410 assert(addr->index == NULL && addr->scale == 0);
420 void ia32_mark_non_am(ir_node *node)
422 bitset_set(non_address_mode_nodes, get_irn_idx(node));
425 int ia32_is_non_address_mode_node(ir_node const *node)
427 return bitset_is_set(non_address_mode_nodes, get_irn_idx(node));
430 static int value_last_used_here(be_lv_t *lv, ir_node *here, ir_node *value)
432 ir_node *block = get_nodes_block(here);
433 const ir_edge_t *edge;
435 /* If the value is live end it is for sure it does not die here */
436 if (be_is_live_end(lv, block, value)) return 0;
438 /* if multiple nodes in this block use the value, then we cannot decide
439 * whether the value will die here (because there is no schedule yet).
440 * Assume it does not die in this case. */
441 foreach_out_edge(value, edge) {
442 ir_node *user = get_edge_src_irn(edge);
443 if (user != here && get_nodes_block(user) == block) {
452 * Walker: mark those nodes that cannot be part of an address mode because
453 * their value must be accessed through a register
455 static void mark_non_address_nodes(ir_node *node, void *env)
465 mode = get_irn_mode(node);
466 if (!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
469 switch (get_irn_opcode(node)) {
471 /* Nothing to do. especially do not mark the pointer, because we want to
472 * turn it into AM. */
476 /* Do not mark the pointer, because we want to turn it into AM. */
477 val = get_Store_value(node);
478 ia32_mark_non_am(val);
483 /* only 1 user: AM folding is always beneficial */
484 if (get_irn_n_edges(node) <= 1)
487 /* for adds and shls with multiple users we use this heuristic:
488 * we do not fold them into address mode if their operands don't live
489 * out of the block, because in this case we will reduce register
490 * pressure. Otherwise we fold them in aggressively in the hope, that
491 * the node itself doesn't exist anymore and we were able to save the
492 * register for the result */
493 left = get_binop_left(node);
494 right = get_binop_right(node);
496 /* Fold AM if any of the two operands does not die here. This duplicates
497 * an addition and has the same register pressure for the case that only
498 * one operand dies, but is faster (on Pentium 4).
499 * && instead of || only folds AM if both operands do not die here */
500 if (!value_last_used_here(lv, node, left) ||
501 !value_last_used_here(lv, node, right)) {
505 /* At least one of left and right are not used by anyone else, so it is
506 * beneficial for the register pressure (if both are unused otherwise,
507 * else neutral) and ALU use to not fold AM. */
508 ia32_mark_non_am(node);
512 arity = get_irn_arity(node);
514 for (i = 0; i < arity; ++i) {
515 ir_node *in = get_irn_n(node, i);
516 ia32_mark_non_am(in);
522 void ia32_calculate_non_address_mode_nodes(be_irg_t *birg)
524 ir_graph *irg = be_get_birg_irg(birg);
525 be_lv_t *lv = be_assure_liveness(birg);
527 non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg));
529 irg_walk_graph(irg, NULL, mark_non_address_nodes, lv);
532 void ia32_free_non_address_mode_nodes(void)
534 bitset_free(non_address_mode_nodes);