2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This file contains functions for matching firm graphs for
23 * nodes that can be used as address mode for x86 instructions
24 * @author Matthias Braun
31 #include "ia32_address_mode.h"
32 #include "ia32_transform.h"
38 #include "iredges_t.h"
41 #include "../benode_t.h"
45 /* gas/ld don't support negative symconsts :-( */
46 #undef SUPPORT_NEGATIVE_SYMCONSTS
49 static bitset_t *non_address_mode_nodes;
52 * Recursive worker for checking if a DAG with root node can be represented as a simple immediate,
54 * @param node the node
55 * @param symconsts number of symconsts found so far
56 * @param negate if set, the immediate must be negated
58 * @return non-zero if the DAG represents an immediate, 0 else
60 static int do_is_immediate(const ir_node *node, int *symconsts, int negate)
65 switch (get_irn_opcode(node)) {
67 /* Consts are typically immediates */
68 if (!tarval_is_long(get_Const_tarval(node))) {
71 "Optimisation warning tarval of %+F(%+F) is not a long.\n",
72 node, current_ir_graph);
78 /* the first SymConst of a DAG can be fold into an immediate */
79 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
80 /* unfortunately the assembler/linker doesn't support -symconst */
85 if(get_SymConst_kind(node) != symconst_addr_ent)
94 /* Add's and Sub's are typically supported as long as both operands are
96 if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
99 left = get_binop_left(node);
100 right = get_binop_right(node);
101 if(!do_is_immediate(left, symconsts, negate))
103 if(!do_is_immediate(right, symconsts, is_Sub(node) ? !negate : negate))
108 /* all other nodes are NO immediates */
114 * Checks if a DAG with a single root node can be represented as a simple immediate.
116 * @param node the node
118 * @return non-zero if the DAG represents an immediate, 0 else
121 static int is_immediate_simple(const ir_node *node) {
123 return do_is_immediate(node, &symconsts, 0);
128 * Check if a DAG starting with root node can be folded into an address mode
131 * @param addr the address mode data so far
132 * @param node the node
133 * @param negate if set, the immediate must be negated
135 static int is_immediate(ia32_address_t *addr, const ir_node *node, int negate)
137 int symconsts = (addr->symconst_ent != NULL);
138 return do_is_immediate(node, &symconsts, negate);
142 * Place a DAG with root node into an address mode.
144 * @param addr the address mode data so far
145 * @param node the node
146 * @param negate if set, the immediate must be negated
148 static void eat_immediate(ia32_address_t *addr, ir_node *node, int negate)
155 switch (get_irn_opcode(node)) {
157 /* simply add the value to the offset */
158 tv = get_Const_tarval(node);
159 val = get_tarval_long(tv);
167 /* place the entity into the symconst */
168 if (addr->symconst_ent != NULL) {
169 panic("Internal error: more than 1 symconst in address calculation");
171 addr->symconst_ent = get_SymConst_entity(node);
172 #ifndef SUPPORT_NEGATIVE_SYMCONSTS
175 addr->symconst_sign = negate;
178 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
179 left = get_Add_left(node);
180 right = get_Add_right(node);
181 eat_immediate(addr, left, negate);
182 eat_immediate(addr, right, negate);
185 assert(!bitset_is_set(non_address_mode_nodes, get_irn_idx(node)));
186 left = get_Sub_left(node);
187 right = get_Sub_right(node);
188 eat_immediate(addr, left, negate);
189 eat_immediate(addr, right, !negate);
192 panic("Internal error in immediate address calculation");
197 * Place operands of node into an address mode.
199 * @param addr the address mode data so far
200 * @param node the node
201 * @param force if set, ignore the marking of node as a non-address-mode node
203 * @return the folded node
205 static ir_node *eat_immediates(ia32_address_t *addr, ir_node *node, int force)
207 if(!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
211 ir_node *left = get_Add_left(node);
212 ir_node *right = get_Add_right(node);
214 if(is_immediate(addr, left, 0)) {
215 eat_immediate(addr, left, 0);
216 return eat_immediates(addr, right, 0);
218 if(is_immediate(addr, right, 0)) {
219 eat_immediate(addr, right, 0);
220 return eat_immediates(addr, left, 0);
222 } else if(is_Sub(node)) {
223 ir_node *left = get_Sub_left(node);
224 ir_node *right = get_Sub_right(node);
226 if(is_immediate(addr, right, 1)) {
227 eat_immediate(addr, right, 1);
228 return eat_immediates(addr, left, 0);
236 * Try to place a Shl into an address mode.
238 * @param addr the address mode data so far
239 * @param node the node to place
241 * @return non-zero on success
243 static int eat_shl(ia32_address_t *addr, ir_node *node)
245 ir_node *shifted_val;
249 ir_node *right = get_Shl_right(node);
252 /* we can use shl with 1, 2 or 3 shift */
255 tv = get_Const_tarval(right);
256 if(!tarval_is_long(tv))
259 val = get_tarval_long(tv);
260 if(val < 0 || val > 3)
263 ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
266 shifted_val = get_Shl_left(node);
267 } else if(is_Add(node)) {
268 /* might be an add x, x */
269 ir_node *left = get_Add_left(node);
270 ir_node *right = get_Add_right(node);
283 /* we can only eat a shl if we don't have a scale or index set yet */
284 if(addr->scale != 0 || addr->index != NULL)
286 if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
289 #ifndef AGGRESSIVE_AM
290 if(get_irn_n_edges(node) > 1)
295 addr->index = shifted_val;
299 /* Create an address mode for a given node. */
300 void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
305 if(is_immediate(addr, node, 0)) {
306 eat_immediate(addr, node, 0);
310 #ifndef AGGRESSIVE_AM
311 if(!force && get_irn_n_edges(node) > 1) {
317 if(!force && bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
322 eat_imms = eat_immediates(addr, node, force);
323 if(eat_imms != node) {
325 eat_imms = ia32_skip_downconv(eat_imms);
330 #ifndef AGGRESSIVE_AM
331 if(get_irn_n_edges(node) > 1) {
336 if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node))) {
342 /* starting point Add, Sub or Shl, FrameAddr */
344 /* We don't want to eat add x, x as shl here, so only test for real Shl
345 * instructions, because we want the former as Lea x, x, not Shl x, 1 */
346 if(eat_shl(addr, node))
348 } else if(is_immediate(addr, node, 0)) {
349 eat_immediate(addr, node, 0);
351 } else if(be_is_FrameAddr(node)) {
352 assert(addr->base == NULL);
353 assert(addr->frame_entity == NULL);
354 addr->base = be_get_FrameAddr_frame(node);
356 addr->frame_entity = be_get_FrameAddr_entity(node);
358 } else if(is_Add(node)) {
359 ir_node *left = get_Add_left(node);
360 ir_node *right = get_Add_right(node);
363 left = ia32_skip_downconv(left);
364 right = ia32_skip_downconv(right);
367 assert(force || !is_immediate(addr, left, 0));
368 assert(force || !is_immediate(addr, right, 0));
370 if(eat_shl(addr, left)) {
372 } else if(eat_shl(addr, right)) {
375 if(left != NULL && be_is_FrameAddr(left)
376 && !bitset_is_set(non_address_mode_nodes, get_irn_idx(left))) {
377 assert(addr->base == NULL);
378 assert(addr->frame_entity == NULL);
379 addr->base = be_get_FrameAddr_frame(left);
381 addr->frame_entity = be_get_FrameAddr_entity(left);
383 } else if(right != NULL && be_is_FrameAddr(right)
384 && !bitset_is_set(non_address_mode_nodes, get_irn_idx(right))) {
385 assert(addr->base == NULL);
386 assert(addr->frame_entity == NULL);
387 addr->base = be_get_FrameAddr_frame(right);
389 addr->frame_entity = be_get_FrameAddr_entity(right);
394 if(addr->base != NULL) {
395 assert(addr->index == NULL && addr->scale == 0);
396 assert(right == NULL);
403 if(addr->base == NULL) {
406 assert(addr->index == NULL && addr->scale == 0);
416 void ia32_mark_non_am(ir_node *node)
418 bitset_set(non_address_mode_nodes, get_irn_idx(node));
421 int ia32_is_non_address_mode_node(ir_node *node)
423 return bitset_is_set(non_address_mode_nodes, get_irn_idx(node));
426 static int value_last_used_here(ir_node *here, ir_node *value)
428 ir_node *block = get_nodes_block(here);
429 const ir_edge_t *edge;
431 /* If the value is live end it is for sure it does not die here */
432 if (be_is_live_end(lv, block, value)) return 0;
434 /* if multiple nodes in this block use the value, then we cannot decide
435 * whether the value will die here (because there is no schedule yet).
436 * Assume it does not die in this case. */
437 foreach_out_edge(value, edge) {
438 ir_node *user = get_edge_src_irn(edge);
439 if (user != here && get_nodes_block(user) == block) {
448 * Walker: mark those nodes that cannot be part of an address mode because
449 * their value must be accessed through a register
451 static void mark_non_address_nodes(ir_node *node, void *env)
460 mode = get_irn_mode(node);
461 if(!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
464 switch(get_irn_opcode(node)) {
466 /* Nothing to do. especially do not mark the pointer, because we want to
467 * turn it into AM. */
471 /* Do not mark the pointer, because we want to turn it into AM. */
472 val = get_Store_value(node);
473 bitset_set(non_address_mode_nodes, get_irn_idx(val));
478 /* only 1 user: AM folding is always beneficial */
479 if(get_irn_n_edges(node) <= 1)
482 /* for adds and shls with multiple users we use this heuristic:
483 * we do not fold them into address mode if their operands don't live
484 * out of the block, because in this case we will reduce register
485 * pressure. Otherwise we fold them in aggressively in the hope, that
486 * the node itself doesn't exist anymore and we were able to save the
487 * register for the result */
488 left = get_binop_left(node);
489 right = get_binop_right(node);
491 /* Fold AM if any of the two operands does not die here. This duplicates
492 * an addition and has the same register pressure for the case that only
493 * one operand dies, but is faster (on Pentium 4).
494 * && instead of || only folds AM if both operands do not die here */
495 if (!value_last_used_here(node, left) ||
496 !value_last_used_here(node, right)) {
500 /* At least one of left and right are not used by anyone else, so it is
501 * beneficial for the register pressure (if both are unused otherwise,
502 * else neutral) and ALU use to not fold AM. */
503 bitset_set(non_address_mode_nodes, get_irn_idx(node));
507 arity = get_irn_arity(node);
509 for(i = 0; i < arity; ++i) {
510 ir_node *in = get_irn_n(node, i);
511 bitset_set(non_address_mode_nodes, get_irn_idx(in));
517 void ia32_calculate_non_address_mode_nodes(be_irg_t *birg)
519 ir_graph *irg = be_get_birg_irg(birg);
521 lv = be_assure_liveness(birg);
522 non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg));
524 irg_walk_graph(irg, NULL, mark_non_address_nodes, NULL);
527 void ia32_free_non_address_mode_nodes(void)
529 bitset_free(non_address_mode_nodes);