1 #ifndef _BEARCH_IA32_T_H_
2 #define _BEARCH_IA32_T_H_
4 #include "firm_config.h"
7 #include "bearch_ia32.h"
8 #include "ia32_nodes_attr.h"
13 #define SET_IA32_ORIG_NODE(n, o)
15 #define SET_IA32_ORIG_NODE(n, o) set_ia32_orig_node(n, o);
21 * Bitmask for the backend optimization settings.
23 typedef struct _ia32_optimize_t {
24 unsigned incdec : 1; /**< optimize add/sub 1/-1 to inc/dec */
25 unsigned doam : 1; /**< do address mode optimizations */
26 unsigned placecnst : 1; /**< place constants in the blocks where they are used */
27 unsigned immops : 1; /**< create operations with immediate operands */
28 unsigned extbb : 1; /**< do extended basic block scheduling */
32 typedef enum cpu_support {
33 arch_i386, /**< i386 */
34 arch_i486, /**< i486 */
35 arch_pentium, /**< Pentium */
36 arch_pentium_pro, /**< Pentium Pro */
37 arch_pentium_mmx, /**< Pentium MMX */
38 arch_pentium_2, /**< Pentium II */
39 arch_pentium_3, /**< Pentium III */
40 arch_pentium_4, /**< Pentium IV */
41 arch_pentium_m, /**< Pentium M */
42 arch_core, /**< Core */
44 arch_athlon, /**< Athlon */
45 arch_athlon_64, /**< Athlon64 */
46 arch_opteron, /**< Opteron */
49 /** floating point support */
50 typedef enum fp_support {
51 fp_x87, /**< use x87 instructions */
52 fp_sse2 /**< use SSE2 instructions */
58 typedef struct _ia32_code_gen_t {
59 const arch_code_generator_if_t *impl; /**< implementation */
60 ir_graph *irg; /**< current irg */
61 FILE *out; /**< output file */
62 const arch_env_t *arch_env; /**< the arch env */
63 set *reg_set; /**< set to memorize registers for non-ia32 nodes (e.g. phi nodes) */
64 int emit_decls; /**< flag indicating if decls were already emitted */
65 pmap *types; /**< A map of modes to primitive types */
66 pmap *tv_ent; /**< A map of entities that store tarvals */
67 const be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */
68 ir_node **blk_sched; /**< an array containing the scheduled blocks */
69 ia32_optimize_t opt; /**< contains optimization information */
70 int arch; /**< instruction architecture */
71 int opt_arch; /**< optimize for architecture */
72 int fp_kind; /**< floating point kind */
73 char used_x87; /**< x87 floating point unit used in this graph */
74 DEBUG_ONLY(firm_dbg_module_t *mod;) /**< debugging module */
77 typedef struct _ia32_isa_t {
78 const arch_isa_if_t *impl;
79 const arch_register_t *sp; /**< The stack pointer register. */
80 const arch_register_t *bp; /**< The base pointer register. */
81 const int stack_dir; /**< -1 for decreasing, 1 for increasing. */
82 int num_codegens; /**< The number of code generator objects created so far */
83 pmap *regs_16bit; /**< Contains the 16bits names of the gp registers */
84 pmap *regs_8bit; /**< Contains the 8bits names of the gp registers */
85 int arch; /**< instruction architecture */
86 int opt_arch; /**< optimize for architecture */
87 int fp_kind; /**< floating point kind */
89 struct obstack *name_obst; /**< holds the original node names (for debugging) */
90 unsigned long name_obst_size;
94 typedef struct _ia32_irn_ops_t {
95 const arch_irn_ops_if_t *impl;
99 /* this is a struct to minimize the number of parameters
100 for transformation walker */
101 typedef struct _ia32_transform_env_t {
102 dbg_info *dbg; /**< The node debug info */
103 ir_graph *irg; /**< The irg, the node should be created in */
104 ir_node *block; /**< The block, the node should belong to */
105 ir_node *irn; /**< The irn, to be transformed */
106 ir_mode *mode; /**< The mode of the irn */
107 ia32_code_gen_t *cg; /**< The code generator */
108 DEBUG_ONLY(firm_dbg_module_t *mod;) /**< The firm debugger */
109 } ia32_transform_env_t;
112 * Creates the unique per irg GP NoReg node.
114 ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg);
117 * Creates the unique per irg FP NoReg node.
119 ir_node *ia32_new_NoReg_fp(ia32_code_gen_t *cg);
121 #endif /* _BEARCH_IA32_T_H_ */