2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief This is the main ia32 firm backend driver.
23 * @author Christian Wuerdig
26 #ifndef FIRM_BE_IA32_BEARCH_IA32_T_H
27 #define FIRM_BE_IA32_BEARCH_IA32_T_H
32 #include "ia32_nodes_attr.h"
37 #include "../bemachine.h"
38 #include "../beemitter.h"
41 #define SET_IA32_ORIG_NODE(n, o)
43 #define SET_IA32_ORIG_NODE(n, o) set_ia32_orig_node(n, o)
47 typedef enum ia32_optimize_t ia32_optimize_t;
48 typedef enum cpu_support cpu_support;
49 typedef enum fp_support fp_support;
51 typedef struct ia32_isa_t ia32_isa_t;
52 typedef struct ia32_code_gen_t ia32_code_gen_t;
53 typedef struct ia32_irn_ops_t ia32_irn_ops_t;
54 typedef struct ia32_intrinsic_env_t ia32_intrinsic_env_t;
59 struct ia32_code_gen_t {
60 const arch_code_generator_if_t *impl; /**< implementation */
61 ir_graph *irg; /**< current irg */
62 set *reg_set; /**< set to memorize registers for non-ia32 nodes (e.g. phi nodes) */
63 ia32_isa_t *isa; /**< for fast access to the isa object */
64 be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */
65 ir_node **blk_sched; /**< an array containing the scheduled blocks */
66 unsigned do_x87_sim:1; /**< set to 1 if x87 simulation should be enforced */
67 unsigned dump:1; /**< set to 1 if graphs should be dumped */
68 unsigned gprof:1; /**< set to 1 grof profiling is in use */
69 ir_node *unknown_gp; /**< unique Unknown_GP node */
70 ir_node *unknown_vfp; /**< unique Unknown_VFP node */
71 ir_node *unknown_xmm; /**< unique Unknown_XMM node */
72 ir_node *noreg_gp; /**< unique NoReg_GP node */
73 ir_node *noreg_vfp; /**< unique NoReg_VFP node */
74 ir_node *noreg_xmm; /**< unique NoReg_XMM node */
76 ir_node *fpu_trunc_mode; /**< truncate fpu mode */
77 ir_node *get_eip; /**< get eip node */
86 arch_env_t arch_env; /**< must be derived from arch_env_t */
87 pmap *regs_16bit; /**< Contains the 16bits names of the gp registers */
88 pmap *regs_8bit; /**< Contains the 8bits names of the gp registers */
89 pmap *regs_8bit_high; /**< contains the high part of the 8 bit names of the gp registers */
90 pmap *types; /**< A map of modes to primitive types */
91 pmap *tv_ent; /**< A map of entities that store const tarvals */
92 ia32_code_gen_t *cg; /**< the current code generator */
93 const be_machine_t *cpu; /**< the abstract machine */
95 struct obstack *name_obst; /**< holds the original node names (for debugging) */
100 * A helper type collecting needed info for IA32 intrinsic lowering.
102 struct ia32_intrinsic_env_t {
103 ia32_isa_t *isa; /**< the isa object */
104 ir_graph *irg; /**< the irg, these entities belong to */
105 ir_entity *divdi3; /**< entity for __divdi3 library call */
106 ir_entity *moddi3; /**< entity for __moddi3 library call */
107 ir_entity *udivdi3; /**< entity for __udivdi3 library call */
108 ir_entity *umoddi3; /**< entity for __umoddi3 library call */
111 typedef enum transformer_t {
120 /** The selected transformer. */
121 extern transformer_t be_transformer;
124 #define be_transformer TRANSFORMER_DEFAULT
127 /** The mode for the floating point control word. */
128 extern ir_mode *mode_fpcw;
130 /** The current code generator. */
131 extern ia32_code_gen_t *ia32_current_cg;
134 * Returns the unique per irg GP NoReg node.
136 ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg);
137 ir_node *ia32_new_NoReg_xmm(ia32_code_gen_t *cg);
138 ir_node *ia32_new_NoReg_vfp(ia32_code_gen_t *cg);
141 * Returns the unique per irg GP Unknown node.
142 * (warning: cse has to be activated)
144 ir_node *ia32_new_Unknown_gp(ia32_code_gen_t *cg);
145 ir_node *ia32_new_Unknown_xmm(ia32_code_gen_t *cg);
146 ir_node *ia32_new_Unknown_vfp(ia32_code_gen_t *cg);
149 * Returns the unique per irg FPU truncation mode node.
151 ir_node *ia32_new_Fpu_truncate(ia32_code_gen_t *cg);
154 * Split instruction with source AM into Load and separate instruction.
155 * @return result of the Load
157 ir_node *turn_back_am(ir_node *node);
160 * Maps all intrinsic calls that the backend support
161 * and map all instructions the backend did not support
164 void ia32_handle_intrinsics(void);
167 * Ia32 implementation.
169 * @param method the method type of the emulation function entity
170 * @param op the emulated ir_op
171 * @param imode the input mode of the emulated opcode
172 * @param omode the output mode of the emulated opcode
173 * @param context the context parameter
175 ir_entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op,
176 const ir_mode *imode, const ir_mode *omode,
180 * Return the stack entity that contains the return address.
182 ir_entity *ia32_get_return_address_entity(void);
185 * Return the stack entity that contains the frame address.
187 ir_entity *ia32_get_frame_address_entity(void);