1 #ifndef _BEARCH_IA32_T_H_
2 #define _BEARCH_IA32_T_H_
4 #include "firm_config.h"
8 #include "bearch_ia32.h"
9 #include "ia32_nodes_attr.h"
14 #define SET_IA32_ORIG_NODE(n, o)
16 #define SET_IA32_ORIG_NODE(n, o) set_ia32_orig_node(n, o);
22 * Bitmask for the backend optimization settings.
24 typedef enum _ia32_optimize_t {
25 IA32_OPT_INCDEC = 1, /**< optimize add/sub 1/-1 to inc/dec */
26 IA32_OPT_DOAM = 2, /**< do address mode optimizations */
27 IA32_OPT_PLACECNST = 4, /**< place constants in the blocks where they are used */
28 IA32_OPT_IMMOPS = 8, /**< create operations with immediate operands */
29 IA32_OPT_EXTBB = 16, /**< do extended basic block scheduling */
33 * Architectures. Clustered for easier macro implementation,
36 typedef enum cpu_support {
37 arch_i386, /**< i386 */
38 arch_i486, /**< i486 */
39 arch_pentium, /**< Pentium */
40 arch_pentium_pro, /**< Pentium Pro */
41 arch_pentium_mmx, /**< Pentium MMX */
42 arch_pentium_2, /**< Pentium II */
43 arch_pentium_3, /**< Pentium III */
44 arch_pentium_4, /**< Pentium IV */
45 arch_pentium_m, /**< Pentium M */
46 arch_core, /**< Core */
48 arch_athlon, /**< Athlon */
49 arch_athlon_64, /**< Athlon64 */
50 arch_opteron, /**< Opteron */
53 /** checks for l <= x <= h */
54 #define _IN_RANGE(x, l, h) ((unsigned)((x) - (l)) <= (unsigned)((h) - (l)))
56 /** returns true if it's Intel architecture */
57 #define ARCH_INTEL(x) _IN_RANGE((x), arch_i386, arch_core)
59 /** returns true if it's AMD architecture */
60 #define ARCH_AMD(x) _IN_RANGE((x), arch_k6, arch_opteron)
62 #define IS_P6_ARCH(x) (_IN_RANGE((x), arch_pentium_pro, arch_core) || \
63 _IN_RANGE((x), arch_athlon, arch_opteron))
65 /** floating point support */
66 typedef enum fp_support {
67 fp_none, /**< no floating point instructions are used */
68 fp_x87, /**< use x87 instructions */
69 fp_sse2 /**< use SSE2 instructions */
72 /** Sets the used flag to the current floating point architecture. */
73 #define FP_USED(cg) ((cg)->used_fp = (cg)->fp_kind)
75 /** Returns non-zero if the current floating point architecture is SSE2. */
76 #define USE_SSE2(cg) ((cg)->fp_kind == fp_sse2)
78 /** Returns non-zero if the current floating point architecture is x87. */
79 #define USE_x87(cg) ((cg)->fp_kind == fp_x87)
81 typedef struct _ia32_isa_t ia32_isa_t;
86 typedef struct _ia32_code_gen_t {
87 const arch_code_generator_if_t *impl; /**< implementation */
88 ir_graph *irg; /**< current irg */
89 const arch_env_t *arch_env; /**< the arch env */
90 set *reg_set; /**< set to memorize registers for non-ia32 nodes (e.g. phi nodes) */
91 ia32_isa_t *isa; /**< for fast access to the isa object */
92 const be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */
93 ir_node **blk_sched; /**< an array containing the scheduled blocks */
94 ia32_optimize_t opt; /**< contains optimization information */
95 entity *fp_to_gp; /**< allocated entity for fp to gp conversion */
96 entity *gp_to_fp; /**< allocated entity for gp to fp conversion */
97 int arch; /**< instruction architecture */
98 int opt_arch; /**< optimize for architecture */
99 int fp_kind; /**< floating point kind */
100 char used_fp; /**< which floating point unit used in this graph */
101 DEBUG_ONLY(firm_dbg_module_t *mod;) /**< debugging module */
108 arch_isa_t arch_isa; /**< must be derived from arch_isa_t */
109 pmap *regs_16bit; /**< Contains the 16bits names of the gp registers */
110 pmap *regs_8bit; /**< Contains the 8bits names of the gp registers */
111 pmap *types; /**< A map of modes to primitive types */
112 pmap *tv_ent; /**< A map of entities that store const tarvals */
113 ia32_optimize_t opt; /**< contains optimization information */
114 int arch; /**< instruction architecture */
115 int opt_arch; /**< optimize for architecture */
116 int fp_kind; /**< floating point kind */
117 ia32_code_gen_t *cg; /**< the current code generator */
118 FILE *out; /**< output file */
120 struct obstack *name_obst; /**< holds the original node names (for debugging) */
121 unsigned long name_obst_size;
125 typedef struct _ia32_irn_ops_t {
126 const arch_irn_ops_if_t *impl;
130 /* this is a struct to minimize the number of parameters
131 for transformation walker */
132 typedef struct _ia32_transform_env_t {
133 dbg_info *dbg; /**< The node debug info */
134 ir_graph *irg; /**< The irg, the node should be created in */
135 ir_node *block; /**< The block, the node should belong to */
136 ir_node *irn; /**< The irn, to be transformed */
137 ir_mode *mode; /**< The mode of the irn */
138 ia32_code_gen_t *cg; /**< The code generator */
139 DEBUG_ONLY(firm_dbg_module_t *mod;) /**< The firm debugger */
140 } ia32_transform_env_t;
143 * Creates the unique per irg GP NoReg node.
145 ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg);
148 * Creates the unique per irg FP NoReg node.
150 ir_node *ia32_new_NoReg_fp(ia32_code_gen_t *cg);
152 #endif /* _BEARCH_IA32_T_H_ */