11 #include "pseudo_irg.h"
15 #include "iredges_t.h"
22 #include "../beabi.h" /* the general register allocator interface */
23 #include "../benode_t.h"
24 #include "../belower.h"
25 #include "../besched_t.h"
27 #include "bearch_ia32_t.h"
29 #include "ia32_new_nodes.h" /* ia32 nodes interface */
30 #include "gen_ia32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
31 #include "ia32_gen_decls.h" /* interface declaration emitter */
32 #include "ia32_transform.h"
33 #include "ia32_emitter.h"
34 #include "ia32_map_regs.h"
35 #include "ia32_optimize.h"
37 #define DEBUG_MODULE "firm.be.ia32.isa"
40 static set *cur_reg_set = NULL;
43 #define is_Start(irn) (get_irn_opcode(irn) == iro_Start)
45 ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg) {
46 return be_abi_get_callee_save_irn(cg->birg->abi, &ia32_gp_regs[REG_XXX]);
49 ir_node *ia32_new_NoReg_fp(ia32_code_gen_t *cg) {
50 return be_abi_get_callee_save_irn(cg->birg->abi, &ia32_fp_regs[REG_XXXX]);
53 /**************************************************
56 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
57 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
58 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
59 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
62 **************************************************/
64 static ir_node *my_skip_proj(const ir_node *n) {
71 * Return register requirements for an ia32 node.
72 * If the node returns a tuple (mode_T) then the proj's
73 * will be asked for this information.
75 static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos) {
76 const ia32_register_req_t *irn_req;
77 long node_pos = pos == -1 ? 0 : pos;
78 ir_mode *mode = get_irn_mode(irn);
79 firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
80 const ia32_irn_ops_t *ops = self;
82 if (mode == mode_T || mode == mode_M) {
83 DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
87 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
92 node_pos = ia32_translate_proj_pos(irn);
98 irn = my_skip_proj(irn);
100 DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
103 if (is_ia32_irn(irn)) {
105 irn_req = get_ia32_in_req(irn, pos);
108 irn_req = get_ia32_out_req(irn, node_pos);
111 DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
113 memcpy(req, &(irn_req->req), sizeof(*req));
115 if (arch_register_req_is(&(irn_req->req), should_be_same)) {
116 assert(irn_req->same_pos >= 0 && "should be same constraint for in -> out NYI");
117 req->other_same = get_irn_n(irn, irn_req->same_pos);
120 if (arch_register_req_is(&(irn_req->req), should_be_different)) {
121 assert(irn_req->different_pos >= 0 && "should be different constraint for in -> out NYI");
122 req->other_different = get_irn_n(irn, irn_req->different_pos);
126 /* treat Phi like Const with default requirements */
128 DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
129 if (mode_is_float(mode))
130 memcpy(req, &(ia32_default_req_ia32_fp.req), sizeof(*req));
131 else if (mode_is_int(mode) || mode_is_reference(mode))
132 memcpy(req, &(ia32_default_req_ia32_gp.req), sizeof(*req));
133 else if (mode == mode_T || mode == mode_M) {
134 DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
138 assert(0 && "unsupported Phi-Mode");
141 DB((mod, LEVEL_1, "returning NULL for %+F (not ia32)\n", irn));
149 static void ia32_set_irn_reg(const void *self, ir_node *irn, const arch_register_t *reg) {
153 pos = ia32_translate_proj_pos(irn);
154 irn = my_skip_proj(irn);
157 if (is_ia32_irn(irn)) {
158 const arch_register_t **slots;
160 slots = get_ia32_slots(irn);
164 ia32_set_firm_reg(irn, reg, cur_reg_set);
168 static const arch_register_t *ia32_get_irn_reg(const void *self, const ir_node *irn) {
170 const arch_register_t *reg = NULL;
173 pos = ia32_translate_proj_pos(irn);
174 irn = my_skip_proj(irn);
177 if (is_ia32_irn(irn)) {
178 const arch_register_t **slots;
179 slots = get_ia32_slots(irn);
183 reg = ia32_get_firm_reg(irn, cur_reg_set);
189 static arch_irn_class_t ia32_classify(const void *self, const ir_node *irn) {
190 irn = my_skip_proj(irn);
192 return arch_irn_class_branch;
193 else if (is_ia32_Call(irn))
194 return arch_irn_class_call;
195 else if (is_ia32_irn(irn))
196 return arch_irn_class_normal;
201 static arch_irn_flags_t ia32_get_flags(const void *self, const ir_node *irn) {
202 irn = my_skip_proj(irn);
203 if (is_ia32_irn(irn))
204 return get_ia32_flags(irn);
210 static void ia32_set_stack_bias(const void *self, ir_node *irn, int bias) {
211 if (get_ia32_use_frame(irn)) {
212 /* TODO: correct offset */
216 /* fill register allocator interface */
218 static const arch_irn_ops_if_t ia32_irn_ops_if = {
219 ia32_get_irn_reg_req,
227 ia32_irn_ops_t ia32_irn_ops = {
234 /**************************************************
237 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
238 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
239 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
240 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
243 **************************************************/
246 * Transforms the standard firm graph into
249 static void ia32_prepare_graph(void *self) {
250 ia32_code_gen_t *cg = self;
252 irg_walk_blkwise_graph(cg->irg, ia32_place_consts, ia32_transform_node, cg);
253 dump_ir_block_graph_sched(cg->irg, "-transformed");
254 edges_deactivate(cg->irg);
255 edges_activate(cg->irg);
256 irg_walk_blkwise_graph(cg->irg, NULL, ia32_optimize_am, cg);
257 dump_ir_block_graph_sched(cg->irg, "-am");
263 * Stack reservation and StackParam lowering.
265 static void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg) {
272 * Dummy functions for hooks we don't need but which must be filled.
274 static void ia32_before_sched(void *self) {
277 static void ia32_before_ra(void *self) {
282 * Creates a Store for a Spill
284 static ir_node *ia32_lower_spill(void *self, ir_node *spill) {
285 ia32_code_gen_t *cg = self;
286 ir_graph *irg = cg->irg;
287 dbg_info *dbg = get_irn_dbg_info(spill);
288 ir_node *block = get_nodes_block(spill);
289 ir_node *ptr = get_irg_frame(irg);
290 ir_node *val = be_get_Spill_context(spill);
291 ir_node *mem = new_rd_NoMem(irg);
292 ir_mode *mode = get_irn_mode(spill);
293 entity *ent = be_get_spill_entity(spill);
294 unsigned offs = get_entity_offset_bytes(ent);
295 ir_node *noreg, *res;
298 DB((cg->mod, LEVEL_1, "lower_spill: got offset %d for %+F\n", offs, ent));
300 if (mode_is_float(mode)) {
301 noreg = ia32_new_NoReg_fp(cg);
302 res = new_rd_ia32_fStore(dbg, irg, block, ptr, noreg, val, mem, mode);
305 noreg = ia32_new_NoReg_gp(cg);
306 res = new_rd_ia32_Store(dbg, irg, block, ptr, noreg, val, mem, mode);
309 snprintf(buf, sizeof(buf), "%d", offs);
310 add_ia32_am_offs(res, buf);
316 * Create a Load for a Spill
318 static ir_node *ia32_lower_reload(void *self, ir_node *reload) {
319 ia32_code_gen_t *cg = self;
320 ir_graph *irg = cg->irg;
321 dbg_info *dbg = get_irn_dbg_info(reload);
322 ir_node *block = get_nodes_block(reload);
323 ir_node *ptr = get_irg_frame(irg);
324 ir_mode *mode = get_irn_mode(reload);
325 ir_node *pred = get_irn_n(reload, 0);
328 ir_node *noreg, *res;
330 /* Get the offset to Load from. It can either be a Spill or a Store. */
331 if (be_is_Spill(pred)) {
332 entity *ent = be_get_spill_entity(pred);
333 unsigned offs = get_entity_offset_bytes(ent);
334 DB((cg->mod, LEVEL_1, "lower_reload: got offset %d for %+F\n", offs, ent));
336 snprintf(buf, sizeof(buf), "%d", offs);
338 else if (is_ia32_Store(pred) || is_ia32_fStore(pred)) {
339 ofs = get_ia32_am_offs(pred);
340 strncpy(buf, ofs, sizeof(buf));
344 assert(0 && "unsupported Reload predecessor");
347 /* Create the Load */
348 if (mode_is_float(mode)) {
349 noreg = ia32_new_NoReg_fp(cg);
350 res = new_rd_ia32_fLoad(dbg, irg, block, ptr, noreg, pred, mode_T);
353 noreg = ia32_new_NoReg_gp(cg);
354 res = new_rd_ia32_Load(dbg, irg, block, ptr, noreg, pred, mode_T);
358 add_ia32_am_offs(res, buf);
360 /* Return the result Proj */
361 return new_rd_Proj(dbg, irg, block, res, mode, 0);
365 * Emits the code, closes the output file and frees
366 * the code generator interface.
368 static void ia32_codegen(void *self) {
369 ia32_code_gen_t *cg = self;
370 ir_graph *irg = cg->irg;
373 if (cg->emit_decls) {
374 ia32_gen_decls(cg->out);
378 ia32_finish_irg(irg, cg);
379 //dump_ir_block_graph_sched(irg, "-finished");
380 ia32_gen_routine(out, irg, cg);
384 pmap_destroy(cg->tv_ent);
385 pmap_destroy(cg->types);
387 /* de-allocate code generator */
388 del_set(cg->reg_set);
392 static void *ia32_cg_init(FILE *F, const be_irg_t *birg);
394 static const arch_code_generator_if_t ia32_code_gen_if = {
397 ia32_before_sched, /* before scheduling hook */
398 ia32_before_ra, /* before register allocation hook */
401 ia32_codegen /* emit && done */
405 * Initializes the code generator.
407 static void *ia32_cg_init(FILE *F, const be_irg_t *birg) {
408 ia32_isa_t *isa = (ia32_isa_t *)birg->main_env->arch_env->isa;
409 ia32_code_gen_t *cg = xcalloc(1, sizeof(*cg));
411 cg->impl = &ia32_code_gen_if;
413 cg->reg_set = new_set(ia32_cmp_irn_reg_assoc, 1024);
414 cg->mod = firm_dbg_register("firm.be.ia32.cg");
416 cg->arch_env = birg->main_env->arch_env;
417 cg->types = pmap_create();
418 cg->tv_ent = pmap_create();
423 if (isa->num_codegens > 1)
428 cur_reg_set = cg->reg_set;
430 ia32_irn_ops.cg = cg;
432 return (arch_code_generator_t *)cg;
437 /*****************************************************************
438 * ____ _ _ _____ _____
439 * | _ \ | | | | |_ _|/ ____| /\
440 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
441 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
442 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
443 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
445 *****************************************************************/
447 static ia32_isa_t ia32_isa_template = {
449 &ia32_gp_regs[REG_ESP],
450 &ia32_gp_regs[REG_EBP],
456 * Initializes the backend ISA.
458 static void *ia32_init(void) {
459 static int inited = 0;
465 isa = xcalloc(1, sizeof(*isa));
466 memcpy(isa, &ia32_isa_template, sizeof(*isa));
468 ia32_register_init(isa);
469 ia32_create_opcodes();
479 * Closes the output file and frees the ISA structure.
481 static void ia32_done(void *self) {
487 static int ia32_get_n_reg_class(const void *self) {
491 static const arch_register_class_t *ia32_get_reg_class(const void *self, int i) {
492 assert(i >= 0 && i < N_CLASSES && "Invalid ia32 register class requested.");
493 return &ia32_reg_classes[i];
497 * Get the register class which shall be used to store a value of a given mode.
498 * @param self The this pointer.
499 * @param mode The mode in question.
500 * @return A register class which can hold values of the given mode.
502 const arch_register_class_t *ia32_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
503 if (mode_is_float(mode))
504 return &ia32_reg_classes[CLASS_ia32_fp];
506 return &ia32_reg_classes[CLASS_ia32_gp];
510 * Get the ABI restrictions for procedure calls.
511 * @param self The this pointer.
512 * @param method_type The type of the method (procedure) in question.
513 * @param abi The abi object to be modified
515 void ia32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
518 unsigned cc = get_method_calling_convention(method_type);
519 int n = get_method_n_params(method_type);
524 const arch_register_t *reg;
526 /* set stack parameter passing style */
527 be_abi_call_set_flags(abi, BE_ABI_FRAME_POINTER_DEDICATED, 4);
529 /* collect the mode for each type */
530 modes = alloca(n * sizeof(modes[0]));
532 for (i = 0; i < n; i++) {
533 tp = get_method_param_type(method_type, i);
534 modes[i] = get_type_mode(tp);
537 /* set register parameters */
538 if (cc & cc_reg_param) {
539 /* determine the number of parameters passed via registers */
540 biggest_n = ia32_get_n_regparam_class(n, modes, &ignore, &ignore);
542 /* loop over all parameters and set the register requirements */
543 for (i = 0; i <= biggest_n; i++) {
544 reg = ia32_get_RegParam_reg(n, modes, i, cc);
545 assert(reg && "kaputt");
546 be_abi_call_param_reg(abi, i, reg);
553 /* set stack parameters */
554 for (i = stack_idx; i < n; i++) {
555 be_abi_call_param_stack(abi, i);
559 /* set return registers */
560 n = get_method_n_ress(method_type);
562 assert(n <= 2 && "more than two results not supported");
564 /* In case of 64bit returns, we will have two 32bit values */
566 tp = get_method_res_type(method_type, 0);
567 mode = get_type_mode(tp);
569 assert(!mode_is_float(mode) && "two FP results not supported");
571 tp = get_method_res_type(method_type, 1);
572 mode = get_type_mode(tp);
574 assert(!mode_is_float(mode) && "two FP results not supported");
576 be_abi_call_res_reg(abi, 0, &ia32_gp_regs[REG_EAX]);
577 be_abi_call_res_reg(abi, 1, &ia32_gp_regs[REG_EDX]);
580 tp = get_method_res_type(method_type, 0);
581 mode = get_type_mode(tp);
583 if (mode_is_float(mode)) {
584 be_abi_call_res_reg(abi, 1, &ia32_fp_regs[REG_XMM0]);
587 be_abi_call_res_reg(abi, 1, &ia32_gp_regs[REG_EAX]);
593 static const void *ia32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
594 return &ia32_irn_ops;
597 const arch_irn_handler_t ia32_irn_handler = {
601 const arch_irn_handler_t *ia32_get_irn_handler(const void *self) {
602 return &ia32_irn_handler;
605 int ia32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
606 return is_ia32_irn(irn);
610 * Initializes the code generator interface.
612 static const arch_code_generator_if_t *ia32_get_code_generator_if(void *self) {
613 return &ia32_code_gen_if;
616 list_sched_selector_t ia32_sched_selector;
619 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
621 static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) {
622 memcpy(&ia32_sched_selector, trivial_selector, sizeof(list_sched_selector_t));
623 ia32_sched_selector.to_appear_in_schedule = ia32_to_appear_in_schedule;
624 return &ia32_sched_selector;
628 static void ia32_register_options(lc_opt_entry_t *ent)
631 #endif /* WITH_LIBCORE */
633 const arch_isa_if_t ia32_isa_if = {
635 ia32_register_options,
639 ia32_get_n_reg_class,
641 ia32_get_reg_class_for_mode,
643 ia32_get_irn_handler,
644 ia32_get_code_generator_if,
645 ia32_get_list_sched_selector