11 #include "pseudo_irg.h"
15 #include "iredges_t.h"
22 #include "../beabi.h" /* the general register allocator interface */
23 #include "../benode_t.h"
24 #include "../belower.h"
25 #include "../besched_t.h"
26 #include "bearch_ia32_t.h"
28 #include "ia32_new_nodes.h" /* ia32 nodes interface */
29 #include "gen_ia32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
30 #include "ia32_gen_decls.h" /* interface declaration emitter */
31 #include "ia32_transform.h"
32 #include "ia32_emitter.h"
33 #include "ia32_map_regs.h"
34 #include "ia32_optimize.h"
36 #define DEBUG_MODULE "firm.be.ia32.isa"
39 static set *cur_reg_set = NULL;
42 #define is_Start(irn) (get_irn_opcode(irn) == iro_Start)
44 ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg) {
46 cg->noreg_gp = be_new_NoReg(&ia32_gp_regs[REG_XXX], cg->irg, get_irg_start_block(cg->irg));
52 ir_node *ia32_new_NoReg_fp(ia32_code_gen_t *cg) {
54 cg->noreg_fp = be_new_NoReg(&ia32_fp_regs[REG_XXXX], cg->irg, get_irg_start_block(cg->irg));
60 /**************************************************
63 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
64 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
65 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
66 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
69 **************************************************/
71 static ir_node *my_skip_proj(const ir_node *n) {
77 static int is_Call_Proj(const ir_node *n) {
79 is_Proj(get_Proj_pred(n)) &&
80 get_irn_mode(get_Proj_pred(n)) == mode_T &&
81 is_ia32_Call(get_Proj_pred(get_Proj_pred(n))))
89 static int is_Start_Proj(const ir_node *n) {
91 is_Proj(get_Proj_pred(n)) &&
92 get_irn_mode(get_Proj_pred(n)) == mode_T &&
93 is_Start(get_Proj_pred(get_Proj_pred(n))))
101 static int is_P_frame_base_Proj(const ir_node *n) {
103 is_Start(get_Proj_pred(n)) &&
104 get_Proj_proj(n) == pn_Start_P_frame_base)
112 static int is_used_by_Keep(const ir_node *n) {
113 return be_is_Keep(get_edge_src_irn(get_irn_out_edge_first(n)));
117 * Return register requirements for an ia32 node.
118 * If the node returns a tuple (mode_T) then the proj's
119 * will be asked for this information.
121 static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos) {
122 const ia32_register_req_t *irn_req;
123 long node_pos = pos == -1 ? 0 : pos;
124 ir_mode *mode = get_irn_mode(irn);
125 firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
126 const ia32_irn_ops_t *ops = self;
128 if (mode == mode_T || mode == mode_M) {
129 DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
133 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
138 node_pos = ia32_translate_proj_pos(irn);
144 irn = my_skip_proj(irn);
146 DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
149 if (is_ia32_irn(irn)) {
151 irn_req = get_ia32_in_req(irn, pos);
154 irn_req = get_ia32_out_req(irn, node_pos);
157 DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
159 memcpy(req, &(irn_req->req), sizeof(*req));
161 if (arch_register_req_is(&(irn_req->req), should_be_same)) {
162 assert(irn_req->same_pos >= 0 && "should be same constraint for in -> out NYI");
163 req->other_same = get_irn_n(irn, irn_req->same_pos);
166 if (arch_register_req_is(&(irn_req->req), should_be_different)) {
167 assert(irn_req->different_pos >= 0 && "should be different constraint for in -> out NYI");
168 req->other_different = get_irn_n(irn, irn_req->different_pos);
172 /* treat Phi like Const with default requirements */
174 DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
175 if (mode_is_float(mode))
176 memcpy(req, &(ia32_default_req_ia32_fp.req), sizeof(*req));
177 else if (mode_is_int(mode) || mode_is_reference(mode))
178 memcpy(req, &(ia32_default_req_ia32_gp.req), sizeof(*req));
179 else if (mode == mode_T || mode == mode_M) {
180 DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
184 assert(0 && "unsupported Phi-Mode");
187 DB((mod, LEVEL_1, "returning NULL for %+F (not ia32)\n", irn));
195 static void ia32_set_irn_reg(const void *self, ir_node *irn, const arch_register_t *reg) {
199 pos = ia32_translate_proj_pos(irn);
200 irn = my_skip_proj(irn);
203 if (is_ia32_irn(irn)) {
204 const arch_register_t **slots;
206 slots = get_ia32_slots(irn);
210 ia32_set_firm_reg(irn, reg, cur_reg_set);
214 static const arch_register_t *ia32_get_irn_reg(const void *self, const ir_node *irn) {
216 const arch_register_t *reg = NULL;
219 pos = ia32_translate_proj_pos(irn);
220 irn = my_skip_proj(irn);
223 if (is_ia32_irn(irn)) {
224 const arch_register_t **slots;
225 slots = get_ia32_slots(irn);
229 reg = ia32_get_firm_reg(irn, cur_reg_set);
235 static arch_irn_class_t ia32_classify(const void *self, const ir_node *irn) {
236 irn = my_skip_proj(irn);
238 return arch_irn_class_branch;
239 else if (is_ia32_Call(irn))
240 return arch_irn_class_call;
241 else if (is_ia32_irn(irn))
242 return arch_irn_class_normal;
247 static arch_irn_flags_t ia32_get_flags(const void *self, const ir_node *irn) {
248 irn = my_skip_proj(irn);
249 if (is_ia32_irn(irn))
250 return get_ia32_flags(irn);
256 static void ia32_set_stack_bias(const void *self, ir_node *irn, int bias) {
257 if (get_ia32_use_frame(irn)) {
258 /* TODO: correct offset */
262 /* fill register allocator interface */
264 static const arch_irn_ops_if_t ia32_irn_ops_if = {
265 ia32_get_irn_reg_req,
273 ia32_irn_ops_t ia32_irn_ops = {
280 /**************************************************
283 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
284 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
285 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
286 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
289 **************************************************/
292 * Transforms the standard firm graph into
295 static void ia32_prepare_graph(void *self) {
296 ia32_code_gen_t *cg = self;
298 irg_walk_blkwise_graph(cg->irg, ia32_place_consts, ia32_transform_node, cg);
299 dump_ir_block_graph_sched(cg->irg, "-transformed");
300 edges_deactivate(cg->irg);
301 edges_activate(cg->irg);
302 irg_walk_blkwise_graph(cg->irg, NULL, ia32_optimize_am, cg);
303 dump_ir_block_graph_sched(cg->irg, "-am");
309 * Stack reservation and StackParam lowering.
311 static void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg) {
318 * Dummy functions for hooks we don't need but which must be filled.
320 static void ia32_before_sched(void *self) {
323 static void ia32_before_ra(void *self) {
328 * Creates a Store for a Spill
330 static ir_node *ia32_lower_spill(void *self, ir_node *spill) {
331 ia32_code_gen_t *cg = self;
332 ir_graph *irg = cg->irg;
333 dbg_info *dbg = get_irn_dbg_info(spill);
334 ir_node *block = get_nodes_block(spill);
335 ir_node *ptr = get_irg_frame(irg);
336 ir_node *val = be_get_Spill_context(spill);
337 ir_node *mem = new_rd_NoMem(irg);
338 ir_mode *mode = get_irn_mode(spill);
339 entity *ent = be_get_spill_entity(spill);
340 unsigned offs = get_entity_offset_bytes(ent);
341 ir_node *noreg, *res;
344 DB((cg->mod, LEVEL_1, "lower_spill: got offset %d for %+F\n", offs, ent));
346 if (mode_is_float(mode)) {
347 noreg = ia32_new_NoReg_fp(cg);
348 res = new_rd_ia32_fStore(dbg, irg, block, ptr, noreg, val, mem, mode);
351 noreg = ia32_new_NoReg_gp(cg);
352 res = new_rd_ia32_Store(dbg, irg, block, ptr, noreg, val, mem, mode);
355 snprintf(buf, sizeof(buf), "%d", offs);
356 add_ia32_am_offs(res, buf);
362 * Create a Load for a Spill
364 static ir_node *ia32_lower_reload(void *self, ir_node *reload) {
365 ia32_code_gen_t *cg = self;
366 ir_graph *irg = cg->irg;
367 dbg_info *dbg = get_irn_dbg_info(reload);
368 ir_node *block = get_nodes_block(reload);
369 ir_node *ptr = get_irg_frame(irg);
370 ir_mode *mode = get_irn_mode(reload);
371 ir_node *pred = get_irn_n(reload, 0);
374 ir_node *noreg, *res;
376 /* Get the offset to Load from. It can either be a Spill or a Store. */
377 if (be_is_Spill(pred)) {
378 entity *ent = be_get_spill_entity(pred);
379 unsigned offs = get_entity_offset_bytes(ent);
380 DB((cg->mod, LEVEL_1, "lower_reload: got offset %d for %+F\n", offs, ent));
382 snprintf(buf, sizeof(buf), "%d", offs);
384 else if (is_ia32_Store(pred) || is_ia32_fStore(pred)) {
385 ofs = get_ia32_am_offs(pred);
386 strncpy(buf, ofs, sizeof(buf));
390 assert(0 && "unsupported Reload predecessor");
393 /* Create the Load */
394 if (mode_is_float(mode)) {
395 noreg = ia32_new_NoReg_fp(cg);
396 res = new_rd_ia32_fLoad(dbg, irg, block, ptr, noreg, pred, mode_T);
399 noreg = ia32_new_NoReg_gp(cg);
400 res = new_rd_ia32_Load(dbg, irg, block, ptr, noreg, pred, mode_T);
404 add_ia32_am_offs(res, buf);
406 /* Return the result Proj */
407 return new_rd_Proj(dbg, irg, block, res, mode, 0);
411 * Emits the code, closes the output file and frees
412 * the code generator interface.
414 static void ia32_codegen(void *self) {
415 ia32_code_gen_t *cg = self;
416 ir_graph *irg = cg->irg;
419 if (cg->emit_decls) {
420 ia32_gen_decls(cg->out);
424 ia32_finish_irg(irg, cg);
425 //dump_ir_block_graph_sched(irg, "-finished");
426 ia32_gen_routine(out, irg, cg);
430 pmap_destroy(cg->tv_ent);
431 pmap_destroy(cg->types);
433 /* de-allocate code generator */
434 del_set(cg->reg_set);
438 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env);
440 static const arch_code_generator_if_t ia32_code_gen_if = {
443 ia32_before_sched, /* before scheduling hook */
444 ia32_before_ra, /* before register allocation hook */
447 ia32_codegen /* emit && done */
451 * Initializes the code generator.
453 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env) {
454 ia32_isa_t *isa = (ia32_isa_t *)arch_env->isa;
455 ia32_code_gen_t *cg = xcalloc(1, sizeof(*cg));
457 cg->impl = &ia32_code_gen_if;
459 cg->reg_set = new_set(ia32_cmp_irn_reg_assoc, 1024);
460 cg->mod = firm_dbg_register("firm.be.ia32.cg");
462 cg->arch_env = arch_env;
463 cg->types = pmap_create();
464 cg->tv_ent = pmap_create();
470 if (isa->num_codegens > 1)
475 cur_reg_set = cg->reg_set;
477 ia32_irn_ops.cg = cg;
479 return (arch_code_generator_t *)cg;
484 /*****************************************************************
485 * ____ _ _ _____ _____
486 * | _ \ | | | | |_ _|/ ____| /\
487 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
488 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
489 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
490 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
492 *****************************************************************/
494 static ia32_isa_t ia32_isa_template = {
496 &ia32_gp_regs[REG_ESP],
497 &ia32_gp_regs[REG_EBP],
503 * Initializes the backend ISA.
505 static void *ia32_init(void) {
506 static int inited = 0;
512 isa = xcalloc(1, sizeof(*isa));
513 memcpy(isa, &ia32_isa_template, sizeof(*isa));
515 ia32_register_init(isa);
516 ia32_create_opcodes();
526 * Closes the output file and frees the ISA structure.
528 static void ia32_done(void *self) {
534 static int ia32_get_n_reg_class(const void *self) {
538 static const arch_register_class_t *ia32_get_reg_class(const void *self, int i) {
539 assert(i >= 0 && i < N_CLASSES && "Invalid ia32 register class requested.");
540 return &ia32_reg_classes[i];
544 * Get the register class which shall be used to store a value of a given mode.
545 * @param self The this pointer.
546 * @param mode The mode in question.
547 * @return A register class which can hold values of the given mode.
549 const arch_register_class_t *ia32_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
550 if (mode_is_float(mode))
551 return &ia32_reg_classes[CLASS_ia32_fp];
553 return &ia32_reg_classes[CLASS_ia32_gp];
557 * Get the ABI restrictions for procedure calls.
558 * @param self The this pointer.
559 * @param method_type The type of the method (procedure) in question.
560 * @param abi The abi object to be modified
562 void ia32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
565 unsigned cc = get_method_calling_convention(method_type);
566 int n = get_method_n_params(method_type);
571 const arch_register_t *reg;
573 /* set stack parameter passing style */
574 be_abi_call_set_flags(abi, BE_ABI_FRAME_POINTER_DEDICATED, 4);
576 /* collect the mode for each type */
577 modes = alloca(n * sizeof(modes[0]));
579 for (i = 0; i < n; i++) {
580 tp = get_method_param_type(method_type, i);
581 modes[i] = get_type_mode(tp);
584 /* set register parameters */
585 if (cc & cc_reg_param) {
586 /* determine the number of parameters passed via registers */
587 biggest_n = ia32_get_n_regparam_class(n, modes, &ignore, &ignore);
589 /* loop over all parameters and set the register requirements */
590 for (i = 0; i <= biggest_n; i++) {
591 reg = ia32_get_RegParam_reg(n, modes, i, cc);
592 assert(reg && "kaputt");
593 be_abi_call_param_reg(abi, i, reg);
600 /* set stack parameters */
601 for (i = stack_idx; i < n; i++) {
602 be_abi_call_param_stack(abi, i);
606 /* set return registers */
607 n = get_method_n_ress(method_type);
609 assert(n <= 2 && "more than two results not supported");
611 /* In case of 64bit returns, we will have two 32bit values */
613 tp = get_method_res_type(method_type, 0);
614 mode = get_type_mode(tp);
616 assert(!mode_is_float(mode) && "two FP results not supported");
618 tp = get_method_res_type(method_type, 1);
619 mode = get_type_mode(tp);
621 assert(!mode_is_float(mode) && "two FP results not supported");
623 be_abi_call_res_reg(abi, 0, &ia32_gp_regs[REG_EAX]);
624 be_abi_call_res_reg(abi, 1, &ia32_gp_regs[REG_EDX]);
627 tp = get_method_res_type(method_type, 0);
628 mode = get_type_mode(tp);
630 if (mode_is_float(mode)) {
631 be_abi_call_res_reg(abi, 1, &ia32_fp_regs[REG_XMM0]);
634 be_abi_call_res_reg(abi, 1, &ia32_gp_regs[REG_EAX]);
640 static const void *ia32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
641 return &ia32_irn_ops;
644 const arch_irn_handler_t ia32_irn_handler = {
648 const arch_irn_handler_t *ia32_get_irn_handler(const void *self) {
649 return &ia32_irn_handler;
652 int ia32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
653 return is_ia32_irn(irn);
657 * Initializes the code generator interface.
659 static const arch_code_generator_if_t *ia32_get_code_generator_if(void *self) {
660 return &ia32_code_gen_if;
663 list_sched_selector_t ia32_sched_selector;
666 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
668 static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) {
669 memcpy(&ia32_sched_selector, trivial_selector, sizeof(list_sched_selector_t));
670 ia32_sched_selector.to_appear_in_schedule = ia32_to_appear_in_schedule;
671 return &ia32_sched_selector;
675 static void ia32_register_options(lc_opt_entry_t *ent)
678 #endif /* WITH_LIBCORE */
680 const arch_isa_if_t ia32_isa_if = {
682 ia32_register_options,
686 ia32_get_n_reg_class,
688 ia32_get_reg_class_for_mode,
690 ia32_get_irn_handler,
691 ia32_get_code_generator_if,
692 ia32_get_list_sched_selector