5 #include "pseudo_irg.h"
14 #include "../bearch.h" /* the general register allocator interface */
15 #include "../benode_t.h"
16 #include "bearch_ia32_t.h"
18 #include "ia32_new_nodes.h" /* ia32 nodes interface */
19 #include "gen_ia32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
20 #include "ia32_gen_decls.h" /* interface declaration emitter */
21 #include "ia32_transform.h"
22 #include "ia32_emitter.h"
23 #include "ia32_map_regs.h"
25 #define DEBUG_MODULE "ir.be.isa.ia32"
28 static set *cur_reg_set = NULL;
32 /**************************************************
35 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
36 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
37 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
38 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
41 **************************************************/
43 static ir_node *my_skip_proj(const ir_node *n) {
49 static int is_Call_Proj(const ir_node *n) {
51 is_Proj(get_Proj_pred(n)) &&
52 get_irn_mode(get_Proj_pred(n)) == mode_T &&
53 is_ia32_Call(get_Proj_pred(get_Proj_pred(n))))
61 static int is_used_by_Keep(const ir_node *n) {
62 return be_is_Keep(get_edge_src_irn(get_irn_out_edge_first(n)));
66 * Return register requirements for an ia32 node.
67 * If the node returns a tuple (mode_T) then the proj's
68 * will be asked for this information.
70 static const arch_register_req_t *ia32_get_irn_reg_req(const arch_irn_ops_t *self, arch_register_req_t *req, const ir_node *irn, int pos) {
71 const ia32_register_req_t *irn_req;
72 long node_pos = pos == -1 ? 0 : pos;
73 ir_mode *mode = get_irn_mode(irn);
74 firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
76 if (mode == mode_T || mode == mode_M) {
77 DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
81 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
84 if (is_Call_Proj(irn) && is_used_by_Keep(irn)) {
85 irn_req = ia32_projnum_reg_req_map[get_Proj_proj(irn)];
86 memcpy(req, &(irn_req->req), sizeof(*req));
89 else if (is_Proj(irn)) {
91 node_pos = ia32_translate_proj_pos(irn);
97 irn = my_skip_proj(irn);
99 DBG((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
102 if (is_ia32_irn(irn)) {
104 irn_req = get_ia32_in_req(irn, pos);
107 irn_req = get_ia32_out_req(irn, node_pos);
110 DBG((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
112 memcpy(req, &(irn_req->req), sizeof(*req));
114 if (arch_register_req_is(&(irn_req->req), should_be_same) ||
115 arch_register_req_is(&(irn_req->req), should_be_different)) {
116 assert(irn_req->pos >= 0 && "should be same/different constraint for in -> out NYI");
117 req->other = get_irn_n(irn, irn_req->pos);
121 /* treat Phi like Const with default requirements */
123 DBG((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
124 if (mode_is_float(mode))
125 memcpy(req, &(ia32_default_req_ia32_floating_point.req), sizeof(*req));
126 else if (mode_is_int(mode) || mode_is_reference(mode))
127 memcpy(req, &(ia32_default_req_ia32_general_purpose.req), sizeof(*req));
128 else if (mode == mode_T || mode == mode_M) {
129 DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
133 assert(0 && "unsupported Phi-Mode");
135 else if (get_irn_op(irn) == op_Start) {
136 DBG((mod, LEVEL_1, "returning reqs none for ProjX -> Start (%+F )\n", irn));
138 case pn_Start_X_initial_exec:
139 case pn_Start_P_value_arg_base:
140 case pn_Start_P_globals:
141 memcpy(req, &(ia32_default_req_none.req), sizeof(*req));
143 case pn_Start_P_frame_base:
144 memcpy(req, &(ia32_default_req_none.req), sizeof(*req));
146 case pn_Start_T_args:
147 assert(0 && "ProjT(pn_Start_T_args) should not be asked");
150 else if (get_irn_op(irn) == op_Return && pos > 0) {
151 DBG((mod, LEVEL_1, "returning reqs EAX for %+F\n", irn));
152 memcpy(req, &(ia32_default_req_ia32_general_purpose_eax.req), sizeof(*req));
155 DBG((mod, LEVEL_1, "returning NULL for %+F (not ia32)\n", irn));
163 static void ia32_set_irn_reg(const arch_irn_ops_t *self, ir_node *irn, const arch_register_t *reg) {
166 if (is_Call_Proj(irn) && is_used_by_Keep(irn)) {
167 /* don't skip the proj, we want to take the else below */
170 pos = ia32_translate_proj_pos(irn);
171 irn = my_skip_proj(irn);
174 if (is_ia32_irn(irn)) {
175 const arch_register_t **slots;
177 slots = get_ia32_slots(irn);
181 ia32_set_firm_reg(irn, reg, cur_reg_set);
185 static const arch_register_t *ia32_get_irn_reg(const arch_irn_ops_t *self, const ir_node *irn) {
187 const arch_register_t *reg = NULL;
189 if (is_Call_Proj(irn) && is_used_by_Keep(irn)) {
190 /* don't skip the proj, we want to take the else below */
192 else if (is_Proj(irn)) {
193 pos = ia32_translate_proj_pos(irn);
194 irn = my_skip_proj(irn);
197 if (is_ia32_irn(irn)) {
198 const arch_register_t **slots;
199 slots = get_ia32_slots(irn);
203 reg = ia32_get_firm_reg(irn, cur_reg_set);
209 static arch_irn_class_t ia32_classify(const arch_irn_ops_t *self, const ir_node *irn) {
210 irn = my_skip_proj(irn);
212 return arch_irn_class_branch;
213 else if (is_ia32_Call(irn))
214 return arch_irn_class_call;
215 else if (is_ia32_irn(irn))
216 return arch_irn_class_normal;
221 static arch_irn_flags_t ia32_get_flags(const arch_irn_ops_t *self, const ir_node *irn) {
222 irn = my_skip_proj(irn);
223 if (is_ia32_irn(irn))
224 return get_ia32_flags(irn);
226 ir_printf("don't know flags of %+F\n", irn);
231 /* fill register allocator interface */
233 static const arch_irn_ops_t ia32_irn_ops = {
234 ia32_get_irn_reg_req,
243 /**************************************************
246 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
247 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
248 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
249 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
252 **************************************************/
255 * Transforms the standard firm graph into
258 static void ia32_prepare_graph(void *self) {
259 ia32_code_gen_t *cg = self;
261 if (! is_pseudo_ir_graph(cg->irg))
262 irg_walk_blkwise_graph(cg->irg, NULL, ia32_transform_node, cg);
268 * Dummy functions for hooks we don't need but which must be filled.
270 static void ia32_before_sched(void *self) {
273 static void ia32_before_ra(void *self) {
279 * Emits the code, closes the output file and frees
280 * the code generator interface.
282 static void ia32_codegen(void *self) {
283 ia32_code_gen_t *cg = self;
284 ir_graph *irg = cg->irg;
287 if (cg->emit_decls) {
288 ia32_gen_decls(cg->out);
292 // ia32_finish_irg(irg);
293 ia32_gen_routine(out, irg, cg->arch_env);
297 /* de-allocate code generator */
298 del_set(cg->reg_set);
302 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env);
304 static const arch_code_generator_if_t ia32_code_gen_if = {
307 ia32_before_sched, /* before scheduling hook */
308 ia32_before_ra, /* before register allocation hook */
309 ia32_codegen /* emit && done */
313 * Initializes the code generator.
315 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env) {
316 ia32_isa_t *isa = (ia32_isa_t *)arch_env->isa;
317 ia32_code_gen_t *cg = malloc(sizeof(*cg));
319 cg->impl = &ia32_code_gen_if;
321 cg->reg_set = new_set(ia32_cmp_irn_reg_assoc, 1024);
322 cg->mod = firm_dbg_register("be.transform.ia32");
324 cg->arch_env = arch_env;
328 if (isa->num_codegens > 1)
333 cur_reg_set = cg->reg_set;
335 return (arch_code_generator_t *)cg;
340 /*****************************************************************
341 * ____ _ _ _____ _____
342 * | _ \ | | | | |_ _|/ ____| /\
343 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
344 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
345 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
346 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
348 *****************************************************************/
351 * Initializes the backend ISA and opens the output file.
353 static void *ia32_init(void) {
354 static int inited = 0;
355 ia32_isa_t *isa = malloc(sizeof(*isa));
357 isa->impl = &ia32_isa_if;
364 isa->num_codegens = 0;
365 isa->reg_projnum_map = new_set(ia32_cmp_reg_projnum_assoc, 1024);
367 ia32_register_init(isa);
368 ia32_create_opcodes();
376 * Closes the output file and frees the ISA structure.
378 static void ia32_done(void *self) {
384 static int ia32_get_n_reg_class(const void *self) {
388 static const arch_register_class_t *ia32_get_reg_class(const void *self, int i) {
389 assert(i >= 0 && i < N_CLASSES && "Invalid ia32 register class requested.");
390 return &ia32_reg_classes[i];
393 static const arch_irn_ops_t *ia32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
394 return &ia32_irn_ops;
397 const arch_irn_handler_t ia32_irn_handler = {
401 const arch_irn_handler_t *ia32_get_irn_handler(const void *self) {
402 return &ia32_irn_handler;
405 long ia32_get_call_projnum_for_reg(const void *self, const arch_register_t *reg) {
406 ia32_isa_t *isa = (ia32_isa_t *)self;
407 return ia32_get_reg_projnum(reg, isa->reg_projnum_map);
410 int ia32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
411 return is_ia32_irn(irn);
415 * Initializes the code generator interface.
417 static const arch_code_generator_if_t *ia32_get_code_generator_if(void *self) {
418 return &ia32_code_gen_if;
421 list_sched_selector_t ia32_sched_selector;
424 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
426 static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) {
427 memcpy(&ia32_sched_selector, reg_pressure_selector, sizeof(list_sched_selector_t));
428 ia32_sched_selector.to_appear_in_schedule = ia32_to_appear_in_schedule;
429 return &ia32_sched_selector;
433 static void ia32_register_options(lc_opt_entry_t *ent)
436 #endif /* WITH_LIBCORE */
438 const arch_isa_if_t ia32_isa_if = {
440 ia32_register_options,
444 ia32_get_n_reg_class,
446 ia32_get_irn_handler,
447 ia32_get_code_generator_if,
448 ia32_get_list_sched_selector,
449 ia32_get_call_projnum_for_reg