5 #include "pseudo_irg.h"
15 #ifdef obstack_chunk_alloc
16 # undef obstack_chunk_alloc
17 # define obstack_chunk_alloc malloc
19 # define obstack_chunk_alloc malloc
20 # define obstack_chunk_free free
23 #include "../bearch.h" /* the general register allocator interface */
24 #include "bearch_ia32_t.h"
26 #include "ia32_new_nodes.h" /* ia32 nodes interface */
27 #include "gen_ia32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
28 #include "ia32_gen_decls.h" /* interface declaration emitter */
29 #include "ia32_transform.h"
30 #include "ia32_emitter.h"
31 #include "ia32_map_regs.h"
33 #define DEBUG_MODULE "ir.be.isa.ia32"
36 static set *cur_reg_set = NULL;
40 /**************************************************
43 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
44 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
45 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
46 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
49 **************************************************/
51 static ir_node *my_skip_proj(const ir_node *n) {
57 static int is_Call_Proj(const ir_node *n) {
59 is_Proj(get_Proj_pred(n)) &&
60 get_irn_mode(get_Proj_pred(n)) == mode_T &&
61 is_ia32_Call(get_Proj_pred(get_Proj_pred(n))))
70 * Return register requirements for an ia32 node.
71 * If the node returns a tuple (mode_T) then the proj's
72 * will be asked for this information.
74 static const arch_register_req_t *ia32_get_irn_reg_req(const arch_irn_ops_t *self, arch_register_req_t *req, const ir_node *irn, int pos) {
75 const ia32_register_req_t *irn_req;
76 long node_pos = pos == -1 ? 0 : pos;
77 ir_mode *mode = get_irn_mode(irn);
78 firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
80 if (mode == mode_T || mode == mode_M) {
81 DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
85 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
88 if (is_Call_Proj(irn)) {
89 irn_req = ia32_projnum_reg_req_map[get_Proj_proj(irn)];
90 memcpy(req, &(irn_req->req), sizeof(*req));
93 else if (is_Proj(irn)) {
95 node_pos = ia32_translate_proj_pos(irn);
101 irn = my_skip_proj(irn);
103 DBG((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
106 if (is_ia32_irn(irn)) {
108 irn_req = get_ia32_in_req(irn, pos);
111 irn_req = get_ia32_out_req(irn, node_pos);
114 DBG((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
116 memcpy(req, &(irn_req->req), sizeof(*req));
118 if (arch_register_req_is(&(irn_req->req), should_be_same) ||
119 arch_register_req_is(&(irn_req->req), should_be_different)) {
120 assert(irn_req->pos >= 0 && "should be same/different constraint for in -> out NYI");
121 req->other = get_irn_n(irn, irn_req->pos);
125 /* treat Phi like Const with default requirements */
127 DBG((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
128 if (mode_is_float(mode))
129 memcpy(req, &(ia32_default_req_ia32_floating_point.req), sizeof(*req));
130 else if (mode_is_int(mode) || mode_is_reference(mode))
131 memcpy(req, &(ia32_default_req_ia32_general_purpose.req), sizeof(*req));
132 else if (mode == mode_T || mode == mode_M) {
133 DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
137 assert(0 && "unsupported Phi-Mode");
139 else if (get_irn_op(irn) == op_Start) {
140 DBG((mod, LEVEL_1, "returning reqs none for ProjX -> Start (%+F )\n", irn));
142 case pn_Start_X_initial_exec:
143 case pn_Start_P_value_arg_base:
144 case pn_Start_P_globals:
145 memcpy(req, &(ia32_default_req_none.req), sizeof(*req));
147 case pn_Start_P_frame_base:
148 memcpy(req, &(ia32_default_req_none.req), sizeof(*req));
150 case pn_Start_T_args:
151 assert(0 && "ProjT(pn_Start_T_args) should not be asked");
154 else if (get_irn_op(irn) == op_Return && pos > 0) {
155 DBG((mod, LEVEL_1, "returning reqs EAX for %+F\n", irn));
156 memcpy(req, &(ia32_default_req_ia32_general_purpose_eax.req), sizeof(*req));
159 DBG((mod, LEVEL_1, "returning NULL for %+F (not ia32)\n", irn));
167 static void ia32_set_irn_reg(const arch_irn_ops_t *self, ir_node *irn, const arch_register_t *reg) {
170 if (is_Call_Proj(irn)) {
171 /* don't skip the proj, we want to take the else below */
174 pos = ia32_translate_proj_pos(irn);
175 irn = my_skip_proj(irn);
178 if (is_ia32_irn(irn)) {
179 const arch_register_t **slots;
181 slots = get_ia32_slots(irn);
185 ia32_set_firm_reg(irn, reg, cur_reg_set);
189 static const arch_register_t *ia32_get_irn_reg(const arch_irn_ops_t *self, const ir_node *irn) {
191 const arch_register_t *reg = NULL;
193 if (is_Call_Proj(irn)) {
194 /* don't skip the proj, we want to take the else below */
196 else if (is_Proj(irn)) {
197 pos = ia32_translate_proj_pos(irn);
198 irn = my_skip_proj(irn);
201 if (is_ia32_irn(irn)) {
202 const arch_register_t **slots;
203 slots = get_ia32_slots(irn);
207 reg = ia32_get_firm_reg(irn, cur_reg_set);
213 static arch_irn_class_t ia32_classify(const arch_irn_ops_t *self, const ir_node *irn) {
214 irn = my_skip_proj(irn);
216 return arch_irn_class_branch;
217 else if (is_ia32_Call(irn))
218 return arch_irn_class_call;
219 else if (is_ia32_irn(irn))
220 return arch_irn_class_normal;
225 static arch_irn_flags_t ia32_get_flags(const arch_irn_ops_t *self, const ir_node *irn) {
226 irn = my_skip_proj(irn);
227 if (is_ia32_irn(irn))
228 return get_ia32_flags(irn);
230 ir_printf("don't know flags of %+F\n", irn);
235 /* fill register allocator interface */
237 static const arch_irn_ops_t ia32_irn_ops = {
238 ia32_get_irn_reg_req,
247 /**************************************************
250 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
251 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
252 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
253 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
256 **************************************************/
259 * Transforms the standard firm graph into
262 static void ia32_prepare_graph(void *self) {
263 ia32_code_gen_t *cg = self;
265 if (! is_pseudo_ir_graph(cg->irg))
266 irg_walk_blkwise_graph(cg->irg, NULL, ia32_transform_node, cg);
272 * Dummy functions for hooks we don't need but which must be filled.
274 static void ia32_before_sched(void *self) {
277 static void ia32_before_ra(void *self) {
283 * Emits the code, closes the output file and frees
284 * the code generator interface.
286 static void ia32_codegen(void *self) {
287 ia32_code_gen_t *cg = self;
288 ir_graph *irg = cg->irg;
291 if (cg->emit_decls) {
292 ia32_gen_decls(cg->out);
296 // ia32_finish_irg(irg);
297 ia32_gen_routine(out, irg, cg->arch_env);
301 /* de-allocate code generator */
302 del_set(cg->reg_set);
306 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env);
308 static const arch_code_generator_if_t ia32_code_gen_if = {
311 ia32_before_sched, /* before scheduling hook */
312 ia32_before_ra, /* before register allocation hook */
313 ia32_codegen /* emit && done */
317 * Initializes the code generator.
319 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env) {
320 ia32_isa_t *isa = (ia32_isa_t *)arch_env->isa;
321 ia32_code_gen_t *cg = malloc(sizeof(*cg));
323 cg->impl = &ia32_code_gen_if;
325 cg->reg_set = new_set(ia32_cmp_irn_reg_assoc, 1024);
326 cg->mod = firm_dbg_register("be.transform.ia32");
328 cg->arch_env = arch_env;
332 if (isa->num_codegens > 1)
337 cur_reg_set = cg->reg_set;
339 return (arch_code_generator_t *)cg;
344 /*****************************************************************
345 * ____ _ _ _____ _____
346 * | _ \ | | | | |_ _|/ ____| /\
347 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
348 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
349 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
350 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
352 *****************************************************************/
355 * Initializes the backend ISA and opens the output file.
357 static void *ia32_init(void) {
358 static int inited = 0;
359 ia32_isa_t *isa = malloc(sizeof(*isa));
361 isa->impl = &ia32_isa_if;
368 isa->num_codegens = 0;
369 isa->reg_projnum_map = new_set(ia32_cmp_reg_projnum_assoc, 1024);
371 ia32_register_init(isa);
372 ia32_create_opcodes();
380 * Closes the output file and frees the ISA structure.
382 static void ia32_done(void *self) {
388 static int ia32_get_n_reg_class(const void *self) {
392 static const arch_register_class_t *ia32_get_reg_class(const void *self, int i) {
393 assert(i >= 0 && i < N_CLASSES && "Invalid ia32 register class requested.");
394 return &ia32_reg_classes[i];
397 static const arch_irn_ops_t *ia32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
398 return &ia32_irn_ops;
401 const arch_irn_handler_t ia32_irn_handler = {
405 const arch_irn_handler_t *ia32_get_irn_handler(const void *self) {
406 return &ia32_irn_handler;
409 long ia32_get_call_projnum_for_reg(const void *self, const arch_register_t *reg) {
410 ia32_isa_t *isa = (ia32_isa_t *)self;
411 return ia32_get_reg_projnum(reg, isa->reg_projnum_map);
415 * Initializes the code generator interface.
417 static const arch_code_generator_if_t *ia32_get_code_generator_if(void *self) {
418 return &ia32_code_gen_if;
422 * Returns the default scheduler
424 static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) {
425 return reg_pressure_selector;
429 static void ia32_register_options(lc_opt_entry_t *ent)
432 #endif /* WITH_LIBCORE */
434 const arch_isa_if_t ia32_isa_if = {
436 ia32_register_options,
440 ia32_get_n_reg_class,
442 ia32_get_irn_handler,
443 ia32_get_code_generator_if,
444 ia32_get_list_sched_selector,
445 ia32_get_call_projnum_for_reg