1 #include "pseudo_irg.h"
5 #include "bearch_ia32.h"
12 #ifdef obstack_chunk_alloc
13 # undef obstack_chunk_alloc
14 # define obstack_chunk_alloc malloc
16 # define obstack_chunk_alloc malloc
17 # define obstack_chunk_free free
20 #include "../bearch.h" /* the general register allocator interface */
22 #include "ia32_new_nodes.h" /* ia32 nodes interface */
23 #include "gen_ia32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
24 #include "ia32_gen_decls.h" /* interface declaration emitter */
25 #include "ia32_transform.h"
26 #include "ia32_emitter.h"
27 #include "ia32_map_regs.h"
29 #define DEBUG_MODULE "ir.be.isa.ia32"
32 static set *cur_reg_set = NULL;
36 /**************************************************
39 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
40 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
41 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
42 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
45 **************************************************/
47 static ir_node *my_skip_proj(const ir_node *n) {
54 * Return register requirements for an ia32 node.
55 * If the node returns a tuple (mode_T) then the proj's
56 * will be asked for this information.
58 static const arch_register_req_t *ia32_get_irn_reg_req(const arch_irn_ops_t *self, arch_register_req_t *req, const ir_node *irn, int pos) {
59 const arch_register_req_t *irn_req;
60 long node_pos = pos == -1 ? 0 : pos;
61 ir_mode *mode = get_irn_mode(irn);
62 firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
64 if (mode == mode_T || mode == mode_M) {
65 DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
69 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
73 node_pos = translate_proj_pos(irn);
77 irn = my_skip_proj(irn);
79 DBG((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
82 if (is_ia32_irn(irn)) {
84 irn_req = get_ia32_in_req(irn, pos);
87 irn_req = get_ia32_out_req(irn, pos);
91 DBG((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
93 memcpy(req, irn_req, sizeof(*req));
97 /* treat Phi like Const with default requirements */
99 DBG((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
100 if (mode_is_float(mode))
101 memcpy(req, &ia32_default_req_ia32_floating_point, sizeof(*req));
102 else if (mode_is_int(mode) || mode_is_reference(mode))
103 memcpy(req, &ia32_default_req_ia32_general_purpose, sizeof(*req));
104 else if (mode == mode_T || mode == mode_M) {
105 DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
109 assert(0 && "unsupported Phi-Mode");
111 else if (get_irn_op(irn) == op_Start) {
112 DBG((mod, LEVEL_1, "returning reqs none for ProjX -> Start (%+F )\n", irn));
114 case pn_Start_X_initial_exec:
115 case pn_Start_P_value_arg_base:
116 case pn_Start_P_globals:
117 memcpy(req, &ia32_default_req_none, sizeof(*req));
119 case pn_Start_P_frame_base:
120 memcpy(req, &ia32_default_req_none, sizeof(*req));
122 case pn_Start_T_args:
123 assert(0 && "ProjT(pn_Start_T_args) should not be asked");
126 else if (get_irn_op(irn) == op_Return && pos > 0) {
127 DBG((mod, LEVEL_1, "returning reqs EAX for %+F\n", irn));
128 memcpy(req, &ia32_default_req_ia32_general_purpose_eax, sizeof(*req));
131 DBG((mod, LEVEL_1, "returning NULL for %+F (not ia32)\n", irn));
139 static void ia32_set_irn_reg(const arch_irn_ops_t *self, ir_node *irn, const arch_register_t *reg) {
143 pos = translate_proj_pos(irn);
144 irn = my_skip_proj(irn);
147 if (is_ia32_irn(irn)) {
148 const arch_register_t **slots;
150 slots = get_ia32_slots(irn);
154 ia32_set_firm_reg(self, irn, reg, cur_reg_set);
158 static const arch_register_t *ia32_get_irn_reg(const arch_irn_ops_t *self, const ir_node *irn) {
160 const arch_register_t *reg = NULL;
163 pos = translate_proj_pos(irn);
164 irn = my_skip_proj(irn);
167 if (is_ia32_irn(irn)) {
168 const arch_register_t **slots;
169 slots = get_ia32_slots(irn);
173 reg = ia32_get_firm_reg(self, irn, cur_reg_set);
179 static arch_irn_class_t ia32_classify(const arch_irn_ops_t *self, const ir_node *irn) {
180 irn = my_skip_proj(irn);
182 return arch_irn_class_branch;
183 else if (is_ia32_irn(irn))
184 return arch_irn_class_normal;
189 static arch_irn_flags_t ia32_get_flags(const arch_irn_ops_t *self, const ir_node *irn) {
190 irn = my_skip_proj(irn);
191 if (is_ia32_irn(irn))
192 return get_ia32_flags(irn);
194 ir_printf("don't know flags of %+F\n", irn);
199 /* fill register allocator interface */
201 static const arch_irn_ops_t ia32_irn_ops = {
202 ia32_get_irn_reg_req,
211 /**************************************************
214 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
215 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
216 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
217 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
220 **************************************************/
222 typedef struct _ia32_isa_t {
223 const arch_isa_if_t *impl;
227 typedef struct _ia32_code_gen_t {
228 const arch_code_generator_if_t *impl; /* implementation */
229 ir_graph *irg; /* current irg */
230 FILE *out; /* output file */
231 const arch_env_t *arch_env; /* the arch env */
232 set *reg_set; /* set to memorize registers for non-ia32 nodes (e.g. phi nodes) */
233 firm_dbg_module_t *mod; /* debugging module */
238 * Transforms the standard firm graph into
241 static void ia32_prepare_graph(void *self) {
242 ia32_code_gen_t *cg = self;
244 if (! is_pseudo_ir_graph(cg->irg))
245 irg_walk_blkwise_graph(cg->irg, NULL, ia32_transform_node, cg->mod);
251 * Dummy functions for hooks we don't need but which must be filled.
253 static void ia32_before_sched(void *self) {
256 static void ia32_before_ra(void *self) {
262 * Emits the code, closes the output file and frees
263 * the code generator interface.
265 static void ia32_codegen(void *self) {
266 ia32_code_gen_t *cg = self;
267 ir_graph *irg = cg->irg;
270 if (cg->emit_decls) {
271 ia32_gen_decls(cg->out);
275 // ia32_finish_irg(irg);
276 ia32_gen_routine(out, irg, cg->arch_env);
280 /* de-allocate code generator */
281 del_set(cg->reg_set);
285 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env);
287 static const arch_code_generator_if_t ia32_code_gen_if = {
290 ia32_before_sched, /* before scheduling hook */
291 ia32_before_ra, /* before register allocation hook */
292 ia32_codegen /* emit && done */
296 * Initializes the code generator.
298 static void *ia32_cg_init(FILE *F, ir_graph *irg, const arch_env_t *arch_env) {
299 ia32_isa_t *isa = (ia32_isa_t *)arch_env->isa;
300 ia32_code_gen_t *cg = malloc(sizeof(*cg));
302 cg->impl = &ia32_code_gen_if;
304 cg->reg_set = new_set(cmp_irn_reg_assoc, 1024);
305 cg->mod = firm_dbg_register("be.transform.ia32");
307 cg->arch_env = arch_env;
311 if (isa->num_codegens > 1)
316 cur_reg_set = cg->reg_set;
318 return (arch_code_generator_t *)cg;
323 /*****************************************************************
324 * ____ _ _ _____ _____
325 * | _ \ | | | | |_ _|/ ____| /\
326 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
327 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
328 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
329 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
331 *****************************************************************/
334 * Initializes the backend ISA and opens the output file.
336 static void *ia32_init(void) {
337 static int inited = 0;
338 ia32_isa_t *isa = malloc(sizeof(*isa));
340 isa->impl = &ia32_isa_if;
347 isa->num_codegens = 0;
349 ia32_register_init();
350 ia32_create_opcodes();
358 * Closes the output file and frees the ISA structure.
360 static void ia32_done(void *self) {
366 static int ia32_get_n_reg_class(const void *self) {
370 static const arch_register_class_t *ia32_get_reg_class(const void *self, int i) {
371 assert(i >= 0 && i < N_CLASSES && "Invalid ia32 register class requested.");
372 return &ia32_reg_classes[i];
375 static const arch_irn_ops_t *ia32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
376 return &ia32_irn_ops;
379 const arch_irn_handler_t ia32_irn_handler = {
383 const arch_irn_handler_t *ia32_get_irn_handler(const void *self) {
384 return &ia32_irn_handler;
390 * Initializes the code generator interface.
392 static const arch_code_generator_if_t *ia32_get_code_generator_if(void *self) {
393 return &ia32_code_gen_if;
397 * Returns the default scheduler
399 static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) {
400 return trivial_selector;
404 static void ia32_register_options(lc_opt_entry_t *ent)
407 #endif /* WITH_LIBCORE */
409 const arch_isa_if_t ia32_isa_if = {
411 ia32_register_options,
415 ia32_get_n_reg_class,
417 ia32_get_irn_handler,
418 ia32_get_code_generator_if,
419 ia32_get_list_sched_selector